diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-15 16:03:48 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-15 16:03:48 -0500 |
commit | 2b8318881ddbcb67c5e8d2178b42284749442222 (patch) | |
tree | b43ded0118bb7a6d9f89f6875c18d7ef447ba3be /drivers/video/omap2/dss/dsi.c | |
parent | e81d372ff9f694e13fa46e8b5aaed505c7fd2a1f (diff) | |
parent | e7f5c9a16ea2648a3e85af8e34191026bf3dcb62 (diff) |
Merge tag 'fbdev-for-3.8' of git://gitorious.org/linux-omap-dss2/linux
Pull fbdev changes from Tomi Valkeinen:
"OMAPDSS changes, including:
- use dynanic debug prints
- OMAP platform dependency removals
- Creation of compat-layer, helping us to improve omapdrm
- Misc cleanups, aiming to make omadss more in line with the upcoming
common display framework
Exynos DP changes for the 3.8 merge window:
- Device Tree support for Samsung Exynos DP
- SW Link training is cleaned up.
- HPD interrupt is supported.
Samsung Framebuffer changes for the 3.8 merge window:
- The bit definitions of header file are updated.
- Some minor typos are fixed.
- Some minor bugs of s3c_fb_check_var() are fixed.
FB related changes for SH Mobile, Freescale DIU
Add support for the Solomon SSD1307 OLED Controller"
* tag 'fbdev-for-3.8' of git://gitorious.org/linux-omap-dss2/linux: (191 commits)
OMAPDSS: fix TV-out issue with DSI PLL
Revert "OMAPFB: simplify locking"
OMAPFB: remove silly loop in fb2display()
OMAPFB: fix error handling in omapfb_find_best_mode()
OMAPFB: use devm_kzalloc to allocate omapfb2_device
OMAPDSS: DISPC: remove dispc fck uses
OMAPDSS: DISPC: get dss clock rate from dss driver
drivers/video/console/softcursor.c: remove redundant NULL check before kfree()
drivers/video: add support for the Solomon SSD1307 OLED Controller
OMAPDSS: use omapdss_compat_init() in other drivers
OMAPDSS: export dispc functions
OMAPDSS: export dss_feat functions
OMAPDSS: export dss_mgr_ops functions
OMAPDSS: separate compat files in the Makefile
OMAPDSS: move display sysfs init to compat layer
OMAPDSS: DPI: use dispc's check_timings
OMAPDSS: DISPC: add dispc_ovl_check()
OMAPDSS: move irq handling to dispc-compat
OMAPDSS: move omap_dispc_wait_for_irq_interruptible_timeout to dispc-compat.c
OMAPDSS: move blocking mgr enable/disable to compat layer
...
Conflicts:
arch/arm/mach-davinci/devices-da8xx.c
arch/arm/plat-omap/common.c
drivers/media/platform/omap/omap_vout.c
Diffstat (limited to 'drivers/video/omap2/dss/dsi.c')
-rw-r--r-- | drivers/video/omap2/dss/dsi.c | 247 |
1 files changed, 122 insertions, 125 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index bee92846cfab..28d41d16b7be 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
@@ -45,7 +45,6 @@ | |||
45 | #include "dss.h" | 45 | #include "dss.h" |
46 | #include "dss_features.h" | 46 | #include "dss_features.h" |
47 | 47 | ||
48 | /*#define VERBOSE_IRQ*/ | ||
49 | #define DSI_CATCH_MISSING_TE | 48 | #define DSI_CATCH_MISSING_TE |
50 | 49 | ||
51 | struct dsi_reg { u16 idx; }; | 50 | struct dsi_reg { u16 idx; }; |
@@ -535,42 +534,38 @@ static inline void dsi_perf_show(struct platform_device *dsidev, | |||
535 | } | 534 | } |
536 | #endif | 535 | #endif |
537 | 536 | ||
537 | static int verbose_irq; | ||
538 | |||
538 | static void print_irq_status(u32 status) | 539 | static void print_irq_status(u32 status) |
539 | { | 540 | { |
540 | if (status == 0) | 541 | if (status == 0) |
541 | return; | 542 | return; |
542 | 543 | ||
543 | #ifndef VERBOSE_IRQ | 544 | if (!verbose_irq && (status & ~DSI_IRQ_CHANNEL_MASK) == 0) |
544 | if ((status & ~DSI_IRQ_CHANNEL_MASK) == 0) | ||
545 | return; | 545 | return; |
546 | #endif | ||
547 | printk(KERN_DEBUG "DSI IRQ: 0x%x: ", status); | ||
548 | 546 | ||
549 | #define PIS(x) \ | 547 | #define PIS(x) (status & DSI_IRQ_##x) ? (#x " ") : "" |
550 | if (status & DSI_IRQ_##x) \ | 548 | |
551 | printk(#x " "); | 549 | pr_debug("DSI IRQ: 0x%x: %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", |
552 | #ifdef VERBOSE_IRQ | 550 | status, |
553 | PIS(VC0); | 551 | verbose_irq ? PIS(VC0) : "", |
554 | PIS(VC1); | 552 | verbose_irq ? PIS(VC1) : "", |
555 | PIS(VC2); | 553 | verbose_irq ? PIS(VC2) : "", |
556 | PIS(VC3); | 554 | verbose_irq ? PIS(VC3) : "", |
557 | #endif | 555 | PIS(WAKEUP), |
558 | PIS(WAKEUP); | 556 | PIS(RESYNC), |
559 | PIS(RESYNC); | 557 | PIS(PLL_LOCK), |
560 | PIS(PLL_LOCK); | 558 | PIS(PLL_UNLOCK), |
561 | PIS(PLL_UNLOCK); | 559 | PIS(PLL_RECALL), |
562 | PIS(PLL_RECALL); | 560 | PIS(COMPLEXIO_ERR), |
563 | PIS(COMPLEXIO_ERR); | 561 | PIS(HS_TX_TIMEOUT), |
564 | PIS(HS_TX_TIMEOUT); | 562 | PIS(LP_RX_TIMEOUT), |
565 | PIS(LP_RX_TIMEOUT); | 563 | PIS(TE_TRIGGER), |
566 | PIS(TE_TRIGGER); | 564 | PIS(ACK_TRIGGER), |
567 | PIS(ACK_TRIGGER); | 565 | PIS(SYNC_LOST), |
568 | PIS(SYNC_LOST); | 566 | PIS(LDO_POWER_GOOD), |
569 | PIS(LDO_POWER_GOOD); | 567 | PIS(TA_TIMEOUT)); |
570 | PIS(TA_TIMEOUT); | ||
571 | #undef PIS | 568 | #undef PIS |
572 | |||
573 | printk("\n"); | ||
574 | } | 569 | } |
575 | 570 | ||
576 | static void print_irq_status_vc(int channel, u32 status) | 571 | static void print_irq_status_vc(int channel, u32 status) |
@@ -578,28 +573,24 @@ static void print_irq_status_vc(int channel, u32 status) | |||
578 | if (status == 0) | 573 | if (status == 0) |
579 | return; | 574 | return; |
580 | 575 | ||
581 | #ifndef VERBOSE_IRQ | 576 | if (!verbose_irq && (status & ~DSI_VC_IRQ_PACKET_SENT) == 0) |
582 | if ((status & ~DSI_VC_IRQ_PACKET_SENT) == 0) | ||
583 | return; | 577 | return; |
584 | #endif | ||
585 | printk(KERN_DEBUG "DSI VC(%d) IRQ 0x%x: ", channel, status); | ||
586 | 578 | ||
587 | #define PIS(x) \ | 579 | #define PIS(x) (status & DSI_VC_IRQ_##x) ? (#x " ") : "" |
588 | if (status & DSI_VC_IRQ_##x) \ | 580 | |
589 | printk(#x " "); | 581 | pr_debug("DSI VC(%d) IRQ 0x%x: %s%s%s%s%s%s%s%s%s\n", |
590 | PIS(CS); | 582 | channel, |
591 | PIS(ECC_CORR); | 583 | status, |
592 | #ifdef VERBOSE_IRQ | 584 | PIS(CS), |
593 | PIS(PACKET_SENT); | 585 | PIS(ECC_CORR), |
594 | #endif | 586 | PIS(ECC_NO_CORR), |
595 | PIS(FIFO_TX_OVF); | 587 | verbose_irq ? PIS(PACKET_SENT) : "", |
596 | PIS(FIFO_RX_OVF); | 588 | PIS(BTA), |
597 | PIS(BTA); | 589 | PIS(FIFO_TX_OVF), |
598 | PIS(ECC_NO_CORR); | 590 | PIS(FIFO_RX_OVF), |
599 | PIS(FIFO_TX_UDF); | 591 | PIS(FIFO_TX_UDF), |
600 | PIS(PP_BUSY_CHANGE); | 592 | PIS(PP_BUSY_CHANGE)); |
601 | #undef PIS | 593 | #undef PIS |
602 | printk("\n"); | ||
603 | } | 594 | } |
604 | 595 | ||
605 | static void print_irq_status_cio(u32 status) | 596 | static void print_irq_status_cio(u32 status) |
@@ -607,34 +598,31 @@ static void print_irq_status_cio(u32 status) | |||
607 | if (status == 0) | 598 | if (status == 0) |
608 | return; | 599 | return; |
609 | 600 | ||
610 | printk(KERN_DEBUG "DSI CIO IRQ 0x%x: ", status); | 601 | #define PIS(x) (status & DSI_CIO_IRQ_##x) ? (#x " ") : "" |
611 | 602 | ||
612 | #define PIS(x) \ | 603 | pr_debug("DSI CIO IRQ 0x%x: %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", |
613 | if (status & DSI_CIO_IRQ_##x) \ | 604 | status, |
614 | printk(#x " "); | 605 | PIS(ERRSYNCESC1), |
615 | PIS(ERRSYNCESC1); | 606 | PIS(ERRSYNCESC2), |
616 | PIS(ERRSYNCESC2); | 607 | PIS(ERRSYNCESC3), |
617 | PIS(ERRSYNCESC3); | 608 | PIS(ERRESC1), |
618 | PIS(ERRESC1); | 609 | PIS(ERRESC2), |
619 | PIS(ERRESC2); | 610 | PIS(ERRESC3), |
620 | PIS(ERRESC3); | 611 | PIS(ERRCONTROL1), |
621 | PIS(ERRCONTROL1); | 612 | PIS(ERRCONTROL2), |
622 | PIS(ERRCONTROL2); | 613 | PIS(ERRCONTROL3), |
623 | PIS(ERRCONTROL3); | 614 | PIS(STATEULPS1), |
624 | PIS(STATEULPS1); | 615 | PIS(STATEULPS2), |
625 | PIS(STATEULPS2); | 616 | PIS(STATEULPS3), |
626 | PIS(STATEULPS3); | 617 | PIS(ERRCONTENTIONLP0_1), |
627 | PIS(ERRCONTENTIONLP0_1); | 618 | PIS(ERRCONTENTIONLP1_1), |
628 | PIS(ERRCONTENTIONLP1_1); | 619 | PIS(ERRCONTENTIONLP0_2), |
629 | PIS(ERRCONTENTIONLP0_2); | 620 | PIS(ERRCONTENTIONLP1_2), |
630 | PIS(ERRCONTENTIONLP1_2); | 621 | PIS(ERRCONTENTIONLP0_3), |
631 | PIS(ERRCONTENTIONLP0_3); | 622 | PIS(ERRCONTENTIONLP1_3), |
632 | PIS(ERRCONTENTIONLP1_3); | 623 | PIS(ULPSACTIVENOT_ALL0), |
633 | PIS(ULPSACTIVENOT_ALL0); | 624 | PIS(ULPSACTIVENOT_ALL1)); |
634 | PIS(ULPSACTIVENOT_ALL1); | ||
635 | #undef PIS | 625 | #undef PIS |
636 | |||
637 | printk("\n"); | ||
638 | } | 626 | } |
639 | 627 | ||
640 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS | 628 | #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS |
@@ -1116,28 +1104,16 @@ static inline void dsi_enable_pll_clock(struct platform_device *dsidev, | |||
1116 | } | 1104 | } |
1117 | } | 1105 | } |
1118 | 1106 | ||
1119 | #ifdef DEBUG | ||
1120 | static void _dsi_print_reset_status(struct platform_device *dsidev) | 1107 | static void _dsi_print_reset_status(struct platform_device *dsidev) |
1121 | { | 1108 | { |
1122 | u32 l; | 1109 | u32 l; |
1123 | int b0, b1, b2; | 1110 | int b0, b1, b2; |
1124 | 1111 | ||
1125 | if (!dss_debug) | ||
1126 | return; | ||
1127 | |||
1128 | /* A dummy read using the SCP interface to any DSIPHY register is | 1112 | /* A dummy read using the SCP interface to any DSIPHY register is |
1129 | * required after DSIPHY reset to complete the reset of the DSI complex | 1113 | * required after DSIPHY reset to complete the reset of the DSI complex |
1130 | * I/O. */ | 1114 | * I/O. */ |
1131 | l = dsi_read_reg(dsidev, DSI_DSIPHY_CFG5); | 1115 | l = dsi_read_reg(dsidev, DSI_DSIPHY_CFG5); |
1132 | 1116 | ||
1133 | printk(KERN_DEBUG "DSI resets: "); | ||
1134 | |||
1135 | l = dsi_read_reg(dsidev, DSI_PLL_STATUS); | ||
1136 | printk("PLL (%d) ", FLD_GET(l, 0, 0)); | ||
1137 | |||
1138 | l = dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG1); | ||
1139 | printk("CIO (%d) ", FLD_GET(l, 29, 29)); | ||
1140 | |||
1141 | if (dss_has_feature(FEAT_DSI_REVERSE_TXCLKESC)) { | 1117 | if (dss_has_feature(FEAT_DSI_REVERSE_TXCLKESC)) { |
1142 | b0 = 28; | 1118 | b0 = 28; |
1143 | b1 = 27; | 1119 | b1 = 27; |
@@ -1148,18 +1124,21 @@ static void _dsi_print_reset_status(struct platform_device *dsidev) | |||
1148 | b2 = 26; | 1124 | b2 = 26; |
1149 | } | 1125 | } |
1150 | 1126 | ||
1151 | l = dsi_read_reg(dsidev, DSI_DSIPHY_CFG5); | 1127 | #define DSI_FLD_GET(fld, start, end)\ |
1152 | printk("PHY (%x%x%x, %d, %d, %d)\n", | 1128 | FLD_GET(dsi_read_reg(dsidev, DSI_##fld), start, end) |
1153 | FLD_GET(l, b0, b0), | 1129 | |
1154 | FLD_GET(l, b1, b1), | 1130 | pr_debug("DSI resets: PLL (%d) CIO (%d) PHY (%x%x%x, %d, %d, %d)\n", |
1155 | FLD_GET(l, b2, b2), | 1131 | DSI_FLD_GET(PLL_STATUS, 0, 0), |
1156 | FLD_GET(l, 29, 29), | 1132 | DSI_FLD_GET(COMPLEXIO_CFG1, 29, 29), |
1157 | FLD_GET(l, 30, 30), | 1133 | DSI_FLD_GET(DSIPHY_CFG5, b0, b0), |
1158 | FLD_GET(l, 31, 31)); | 1134 | DSI_FLD_GET(DSIPHY_CFG5, b1, b1), |
1135 | DSI_FLD_GET(DSIPHY_CFG5, b2, b2), | ||
1136 | DSI_FLD_GET(DSIPHY_CFG5, 29, 29), | ||
1137 | DSI_FLD_GET(DSIPHY_CFG5, 30, 30), | ||
1138 | DSI_FLD_GET(DSIPHY_CFG5, 31, 31)); | ||
1139 | |||
1140 | #undef DSI_FLD_GET | ||
1159 | } | 1141 | } |
1160 | #else | ||
1161 | #define _dsi_print_reset_status(x) | ||
1162 | #endif | ||
1163 | 1142 | ||
1164 | static inline int dsi_if_enable(struct platform_device *dsidev, bool enable) | 1143 | static inline int dsi_if_enable(struct platform_device *dsidev, bool enable) |
1165 | { | 1144 | { |
@@ -1407,6 +1386,11 @@ retry: | |||
1407 | cur.dsi_pll_hsdiv_dispc_clk = | 1386 | cur.dsi_pll_hsdiv_dispc_clk = |
1408 | cur.clkin4ddr / cur.regm_dispc; | 1387 | cur.clkin4ddr / cur.regm_dispc; |
1409 | 1388 | ||
1389 | if (cur.regm_dispc > 1 && | ||
1390 | cur.regm_dispc % 2 != 0 && | ||
1391 | req_pck >= 1000000) | ||
1392 | continue; | ||
1393 | |||
1410 | /* this will narrow down the search a bit, | 1394 | /* this will narrow down the search a bit, |
1411 | * but still give pixclocks below what was | 1395 | * but still give pixclocks below what was |
1412 | * requested */ | 1396 | * requested */ |
@@ -1621,7 +1605,7 @@ int dsi_pll_set_clock_div(struct platform_device *dsidev, | |||
1621 | u8 regn_start, regn_end, regm_start, regm_end; | 1605 | u8 regn_start, regn_end, regm_start, regm_end; |
1622 | u8 regm_dispc_start, regm_dispc_end, regm_dsi_start, regm_dsi_end; | 1606 | u8 regm_dispc_start, regm_dispc_end, regm_dsi_start, regm_dsi_end; |
1623 | 1607 | ||
1624 | DSSDBGF(); | 1608 | DSSDBG("DSI PLL clock config starts"); |
1625 | 1609 | ||
1626 | dsi->current_cinfo.clkin = cinfo->clkin; | 1610 | dsi->current_cinfo.clkin = cinfo->clkin; |
1627 | dsi->current_cinfo.fint = cinfo->fint; | 1611 | dsi->current_cinfo.fint = cinfo->fint; |
@@ -1757,11 +1741,21 @@ int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk, | |||
1757 | 1741 | ||
1758 | DSSDBG("PLL init\n"); | 1742 | DSSDBG("PLL init\n"); |
1759 | 1743 | ||
1744 | /* | ||
1745 | * It seems that on many OMAPs we need to enable both to have a | ||
1746 | * functional HSDivider. | ||
1747 | */ | ||
1748 | enable_hsclk = enable_hsdiv = true; | ||
1749 | |||
1760 | if (dsi->vdds_dsi_reg == NULL) { | 1750 | if (dsi->vdds_dsi_reg == NULL) { |
1761 | struct regulator *vdds_dsi; | 1751 | struct regulator *vdds_dsi; |
1762 | 1752 | ||
1763 | vdds_dsi = regulator_get(&dsi->pdev->dev, "vdds_dsi"); | 1753 | vdds_dsi = regulator_get(&dsi->pdev->dev, "vdds_dsi"); |
1764 | 1754 | ||
1755 | /* DT HACK: try VCXIO to make omapdss work for o4 sdp/panda */ | ||
1756 | if (IS_ERR(vdds_dsi)) | ||
1757 | vdds_dsi = regulator_get(&dsi->pdev->dev, "VCXIO"); | ||
1758 | |||
1765 | if (IS_ERR(vdds_dsi)) { | 1759 | if (IS_ERR(vdds_dsi)) { |
1766 | DSSERR("can't get VDDS_DSI regulator\n"); | 1760 | DSSERR("can't get VDDS_DSI regulator\n"); |
1767 | return PTR_ERR(vdds_dsi); | 1761 | return PTR_ERR(vdds_dsi); |
@@ -2440,7 +2434,7 @@ static int dsi_cio_init(struct platform_device *dsidev) | |||
2440 | int r; | 2434 | int r; |
2441 | u32 l; | 2435 | u32 l; |
2442 | 2436 | ||
2443 | DSSDBGF(); | 2437 | DSSDBG("DSI CIO init starts"); |
2444 | 2438 | ||
2445 | r = dss_dsi_enable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); | 2439 | r = dss_dsi_enable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); |
2446 | if (r) | 2440 | if (r) |
@@ -2791,7 +2785,7 @@ static void dsi_vc_initial_config(struct platform_device *dsidev, int channel) | |||
2791 | { | 2785 | { |
2792 | u32 r; | 2786 | u32 r; |
2793 | 2787 | ||
2794 | DSSDBGF("%d", channel); | 2788 | DSSDBG("Initial config of virtual channel %d", channel); |
2795 | 2789 | ||
2796 | r = dsi_read_reg(dsidev, DSI_VC_CTRL(channel)); | 2790 | r = dsi_read_reg(dsidev, DSI_VC_CTRL(channel)); |
2797 | 2791 | ||
@@ -2823,7 +2817,7 @@ static int dsi_vc_config_source(struct platform_device *dsidev, int channel, | |||
2823 | if (dsi->vc[channel].source == source) | 2817 | if (dsi->vc[channel].source == source) |
2824 | return 0; | 2818 | return 0; |
2825 | 2819 | ||
2826 | DSSDBGF("%d", channel); | 2820 | DSSDBG("Source config of virtual channel %d", channel); |
2827 | 2821 | ||
2828 | dsi_sync_vc(dsidev, channel); | 2822 | dsi_sync_vc(dsidev, channel); |
2829 | 2823 | ||
@@ -3581,7 +3575,7 @@ static int dsi_enter_ulps(struct platform_device *dsidev) | |||
3581 | int r, i; | 3575 | int r, i; |
3582 | unsigned mask; | 3576 | unsigned mask; |
3583 | 3577 | ||
3584 | DSSDBGF(); | 3578 | DSSDBG("Entering ULPS"); |
3585 | 3579 | ||
3586 | WARN_ON(!dsi_bus_is_locked(dsidev)); | 3580 | WARN_ON(!dsi_bus_is_locked(dsidev)); |
3587 | 3581 | ||
@@ -4285,7 +4279,7 @@ int omapdss_dsi_set_clocks(struct omap_dss_device *dssdev, | |||
4285 | unsigned long pck; | 4279 | unsigned long pck; |
4286 | int r; | 4280 | int r; |
4287 | 4281 | ||
4288 | DSSDBGF("ddr_clk %lu, lp_clk %lu", ddr_clk, lp_clk); | 4282 | DSSDBG("Setting DSI clocks: ddr_clk %lu, lp_clk %lu", ddr_clk, lp_clk); |
4289 | 4283 | ||
4290 | mutex_lock(&dsi->lock); | 4284 | mutex_lock(&dsi->lock); |
4291 | 4285 | ||
@@ -4541,7 +4535,7 @@ static void dsi_framedone_timeout_work_callback(struct work_struct *work) | |||
4541 | dsi_handle_framedone(dsi->pdev, -ETIMEDOUT); | 4535 | dsi_handle_framedone(dsi->pdev, -ETIMEDOUT); |
4542 | } | 4536 | } |
4543 | 4537 | ||
4544 | static void dsi_framedone_irq_callback(void *data, u32 mask) | 4538 | static void dsi_framedone_irq_callback(void *data) |
4545 | { | 4539 | { |
4546 | struct platform_device *dsidev = (struct platform_device *) data; | 4540 | struct platform_device *dsidev = (struct platform_device *) data; |
4547 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); | 4541 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); |
@@ -4615,7 +4609,6 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev) | |||
4615 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); | 4609 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); |
4616 | struct omap_overlay_manager *mgr = dssdev->output->manager; | 4610 | struct omap_overlay_manager *mgr = dssdev->output->manager; |
4617 | int r; | 4611 | int r; |
4618 | u32 irq = 0; | ||
4619 | 4612 | ||
4620 | if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { | 4613 | if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { |
4621 | dsi->timings.hsw = 1; | 4614 | dsi->timings.hsw = 1; |
@@ -4625,12 +4618,10 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev) | |||
4625 | dsi->timings.vfp = 0; | 4618 | dsi->timings.vfp = 0; |
4626 | dsi->timings.vbp = 0; | 4619 | dsi->timings.vbp = 0; |
4627 | 4620 | ||
4628 | irq = dispc_mgr_get_framedone_irq(mgr->id); | 4621 | r = dss_mgr_register_framedone_handler(mgr, |
4629 | 4622 | dsi_framedone_irq_callback, dsidev); | |
4630 | r = omap_dispc_register_isr(dsi_framedone_irq_callback, | ||
4631 | (void *) dsidev, irq); | ||
4632 | if (r) { | 4623 | if (r) { |
4633 | DSSERR("can't get FRAMEDONE irq\n"); | 4624 | DSSERR("can't register FRAMEDONE handler\n"); |
4634 | goto err; | 4625 | goto err; |
4635 | } | 4626 | } |
4636 | 4627 | ||
@@ -4668,8 +4659,8 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev) | |||
4668 | return 0; | 4659 | return 0; |
4669 | err1: | 4660 | err1: |
4670 | if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) | 4661 | if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) |
4671 | omap_dispc_unregister_isr(dsi_framedone_irq_callback, | 4662 | dss_mgr_unregister_framedone_handler(mgr, |
4672 | (void *) dsidev, irq); | 4663 | dsi_framedone_irq_callback, dsidev); |
4673 | err: | 4664 | err: |
4674 | return r; | 4665 | return r; |
4675 | } | 4666 | } |
@@ -4680,14 +4671,9 @@ static void dsi_display_uninit_dispc(struct omap_dss_device *dssdev) | |||
4680 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); | 4671 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); |
4681 | struct omap_overlay_manager *mgr = dssdev->output->manager; | 4672 | struct omap_overlay_manager *mgr = dssdev->output->manager; |
4682 | 4673 | ||
4683 | if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { | 4674 | if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) |
4684 | u32 irq; | 4675 | dss_mgr_unregister_framedone_handler(mgr, |
4685 | 4676 | dsi_framedone_irq_callback, dsidev); | |
4686 | irq = dispc_mgr_get_framedone_irq(mgr->id); | ||
4687 | |||
4688 | omap_dispc_unregister_isr(dsi_framedone_irq_callback, | ||
4689 | (void *) dsidev, irq); | ||
4690 | } | ||
4691 | } | 4677 | } |
4692 | 4678 | ||
4693 | static int dsi_configure_dsi_clocks(struct omap_dss_device *dssdev) | 4679 | static int dsi_configure_dsi_clocks(struct omap_dss_device *dssdev) |
@@ -4730,7 +4716,6 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev) | |||
4730 | if (r) | 4716 | if (r) |
4731 | goto err1; | 4717 | goto err1; |
4732 | 4718 | ||
4733 | dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src); | ||
4734 | dss_select_dsi_clk_source(dsi->module_id, dssdev->clocks.dsi.dsi_fclk_src); | 4719 | dss_select_dsi_clk_source(dsi->module_id, dssdev->clocks.dsi.dsi_fclk_src); |
4735 | dss_select_lcd_clk_source(mgr->id, | 4720 | dss_select_lcd_clk_source(mgr->id, |
4736 | dssdev->clocks.dispc.channel.lcd_clk_src); | 4721 | dssdev->clocks.dispc.channel.lcd_clk_src); |
@@ -4765,7 +4750,6 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev) | |||
4765 | err3: | 4750 | err3: |
4766 | dsi_cio_uninit(dsidev); | 4751 | dsi_cio_uninit(dsidev); |
4767 | err2: | 4752 | err2: |
4768 | dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); | ||
4769 | dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); | 4753 | dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); |
4770 | dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); | 4754 | dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); |
4771 | 4755 | ||
@@ -4792,7 +4776,6 @@ static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev, | |||
4792 | dsi_vc_enable(dsidev, 2, 0); | 4776 | dsi_vc_enable(dsidev, 2, 0); |
4793 | dsi_vc_enable(dsidev, 3, 0); | 4777 | dsi_vc_enable(dsidev, 3, 0); |
4794 | 4778 | ||
4795 | dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); | ||
4796 | dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); | 4779 | dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); |
4797 | dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); | 4780 | dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK); |
4798 | dsi_cio_uninit(dsidev); | 4781 | dsi_cio_uninit(dsidev); |
@@ -4981,6 +4964,10 @@ static int __init dsi_init_display(struct omap_dss_device *dssdev) | |||
4981 | 4964 | ||
4982 | vdds_dsi = regulator_get(&dsi->pdev->dev, "vdds_dsi"); | 4965 | vdds_dsi = regulator_get(&dsi->pdev->dev, "vdds_dsi"); |
4983 | 4966 | ||
4967 | /* DT HACK: try VCXIO to make omapdss work for o4 sdp/panda */ | ||
4968 | if (IS_ERR(vdds_dsi)) | ||
4969 | vdds_dsi = regulator_get(&dsi->pdev->dev, "VCXIO"); | ||
4970 | |||
4984 | if (IS_ERR(vdds_dsi)) { | 4971 | if (IS_ERR(vdds_dsi)) { |
4985 | DSSERR("can't get VDDS_DSI regulator\n"); | 4972 | DSSERR("can't get VDDS_DSI regulator\n"); |
4986 | return PTR_ERR(vdds_dsi); | 4973 | return PTR_ERR(vdds_dsi); |
@@ -5121,7 +5108,7 @@ static struct omap_dss_device * __init dsi_find_dssdev(struct platform_device *p | |||
5121 | { | 5108 | { |
5122 | struct omap_dss_board_info *pdata = pdev->dev.platform_data; | 5109 | struct omap_dss_board_info *pdata = pdev->dev.platform_data; |
5123 | struct dsi_data *dsi = dsi_get_dsidrv_data(pdev); | 5110 | struct dsi_data *dsi = dsi_get_dsidrv_data(pdev); |
5124 | const char *def_disp_name = dss_get_default_display_name(); | 5111 | const char *def_disp_name = omapdss_get_default_display_name(); |
5125 | struct omap_dss_device *def_dssdev; | 5112 | struct omap_dss_device *def_dssdev; |
5126 | int i; | 5113 | int i; |
5127 | 5114 | ||
@@ -5151,6 +5138,7 @@ static struct omap_dss_device * __init dsi_find_dssdev(struct platform_device *p | |||
5151 | 5138 | ||
5152 | static void __init dsi_probe_pdata(struct platform_device *dsidev) | 5139 | static void __init dsi_probe_pdata(struct platform_device *dsidev) |
5153 | { | 5140 | { |
5141 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); | ||
5154 | struct omap_dss_device *plat_dssdev; | 5142 | struct omap_dss_device *plat_dssdev; |
5155 | struct omap_dss_device *dssdev; | 5143 | struct omap_dss_device *dssdev; |
5156 | int r; | 5144 | int r; |
@@ -5173,9 +5161,18 @@ static void __init dsi_probe_pdata(struct platform_device *dsidev) | |||
5173 | return; | 5161 | return; |
5174 | } | 5162 | } |
5175 | 5163 | ||
5164 | r = omapdss_output_set_device(&dsi->output, dssdev); | ||
5165 | if (r) { | ||
5166 | DSSERR("failed to connect output to new device: %s\n", | ||
5167 | dssdev->name); | ||
5168 | dss_put_device(dssdev); | ||
5169 | return; | ||
5170 | } | ||
5171 | |||
5176 | r = dss_add_device(dssdev); | 5172 | r = dss_add_device(dssdev); |
5177 | if (r) { | 5173 | if (r) { |
5178 | DSSERR("device %s register failed: %d\n", dssdev->name, r); | 5174 | DSSERR("device %s register failed: %d\n", dssdev->name, r); |
5175 | omapdss_output_unset_device(&dsi->output); | ||
5179 | dss_put_device(dssdev); | 5176 | dss_put_device(dssdev); |
5180 | return; | 5177 | return; |
5181 | } | 5178 | } |