aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video/omap2/dss/dispc.c
diff options
context:
space:
mode:
authorTomi Valkeinen <tomi.valkeinen@ti.com>2011-08-15 04:51:50 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-09-30 09:16:20 -0400
commitfe3cc9d6cd4c8279f4ea70acc71525a489cfc38a (patch)
treecaddf6e9886345ab9f07eb9be124ce03398e29d9 /drivers/video/omap2/dss/dispc.c
parent4a9e78abb76a2f1ddccab7098bdf73a2f095aaa6 (diff)
OMAP: DSS2: DISPC: use lookup tables for bit shifts
Use lookup tables instead of switch/if in some DISPC functions to make the code cleaner. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Archit Taneja <archit@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dispc.c')
-rw-r--r--drivers/video/omap2/dss/dispc.c204
1 files changed, 50 insertions, 154 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 43dbfb1da778..2a0fb5ca13d6 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -737,6 +737,9 @@ static void _dispc_set_pre_mult_alpha(enum omap_plane plane, bool enable)
737 737
738static void _dispc_setup_global_alpha(enum omap_plane plane, u8 global_alpha) 738static void _dispc_setup_global_alpha(enum omap_plane plane, u8 global_alpha)
739{ 739{
740 static const unsigned shifts[] = { 0, 8, 16, };
741 int shift;
742
740 if (!dss_has_feature(FEAT_GLOBAL_ALPHA)) 743 if (!dss_has_feature(FEAT_GLOBAL_ALPHA))
741 return; 744 return;
742 745
@@ -744,10 +747,8 @@ static void _dispc_setup_global_alpha(enum omap_plane plane, u8 global_alpha)
744 plane == OMAP_DSS_VIDEO1) 747 plane == OMAP_DSS_VIDEO1)
745 return; 748 return;
746 749
747 if (plane == OMAP_DSS_GFX) 750 shift = shifts[plane];
748 REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, 7, 0); 751 REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, shift + 7, shift);
749 else if (plane == OMAP_DSS_VIDEO2)
750 REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, 23, 16);
751} 752}
752 753
753static void _dispc_set_pix_inc(enum omap_plane plane, s32 inc) 754static void _dispc_set_pix_inc(enum omap_plane plane, s32 inc)
@@ -891,21 +892,10 @@ static void dispc_set_channel_out(enum omap_plane plane,
891static void dispc_set_burst_size(enum omap_plane plane, 892static void dispc_set_burst_size(enum omap_plane plane,
892 enum omap_burst_size burst_size) 893 enum omap_burst_size burst_size)
893{ 894{
895 static const unsigned shifts[] = { 6, 14, 14, };
894 int shift; 896 int shift;
895 897
896 switch (plane) { 898 shift = shifts[plane];
897 case OMAP_DSS_GFX:
898 shift = 6;
899 break;
900 case OMAP_DSS_VIDEO1:
901 case OMAP_DSS_VIDEO2:
902 shift = 14;
903 break;
904 default:
905 BUG();
906 return;
907 }
908
909 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), burst_size, shift + 1, shift); 899 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), burst_size, shift + 1, shift);
910} 900}
911 901
@@ -987,14 +977,11 @@ static void _dispc_set_vid_color_conv(enum omap_plane plane, bool enable)
987 977
988void dispc_enable_replication(enum omap_plane plane, bool enable) 978void dispc_enable_replication(enum omap_plane plane, bool enable)
989{ 979{
990 int bit; 980 static const unsigned shifts[] = { 5, 10, 10 };
991 981 int shift;
992 if (plane == OMAP_DSS_GFX)
993 bit = 5;
994 else
995 bit = 10;
996 982
997 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, bit, bit); 983 shift = shifts[plane];
984 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift);
998} 985}
999 986
1000void dispc_set_lcd_size(enum omap_channel channel, u16 width, u16 height) 987void dispc_set_lcd_size(enum omap_channel channel, u16 width, u16 height)
@@ -3044,6 +3031,17 @@ static void dispc_error_worker(struct work_struct *work)
3044 int i; 3031 int i;
3045 u32 errors; 3032 u32 errors;
3046 unsigned long flags; 3033 unsigned long flags;
3034 static const unsigned fifo_underflow_bits[] = {
3035 DISPC_IRQ_GFX_FIFO_UNDERFLOW,
3036 DISPC_IRQ_VID1_FIFO_UNDERFLOW,
3037 DISPC_IRQ_VID2_FIFO_UNDERFLOW,
3038 };
3039
3040 static const unsigned sync_lost_bits[] = {
3041 DISPC_IRQ_SYNC_LOST,
3042 DISPC_IRQ_SYNC_LOST_DIGIT,
3043 DISPC_IRQ_SYNC_LOST2,
3044 };
3047 3045
3048 spin_lock_irqsave(&dispc.irq_lock, flags); 3046 spin_lock_irqsave(&dispc.irq_lock, flags);
3049 errors = dispc.error_irqs; 3047 errors = dispc.error_irqs;
@@ -3052,154 +3050,52 @@ static void dispc_error_worker(struct work_struct *work)
3052 3050
3053 dispc_runtime_get(); 3051 dispc_runtime_get();
3054 3052
3055 if (errors & DISPC_IRQ_GFX_FIFO_UNDERFLOW) { 3053 for (i = 0; i < omap_dss_get_num_overlays(); ++i) {
3056 DSSERR("GFX_FIFO_UNDERFLOW, disabling GFX\n"); 3054 struct omap_overlay *ovl;
3057 for (i = 0; i < omap_dss_get_num_overlays(); ++i) { 3055 unsigned bit;
3058 struct omap_overlay *ovl;
3059 ovl = omap_dss_get_overlay(i);
3060
3061 if (ovl->id == 0) {
3062 dispc_enable_plane(ovl->id, 0);
3063 dispc_go(ovl->manager->id);
3064 mdelay(50);
3065 break;
3066 }
3067 }
3068 }
3069
3070 if (errors & DISPC_IRQ_VID1_FIFO_UNDERFLOW) {
3071 DSSERR("VID1_FIFO_UNDERFLOW, disabling VID1\n");
3072 for (i = 0; i < omap_dss_get_num_overlays(); ++i) {
3073 struct omap_overlay *ovl;
3074 ovl = omap_dss_get_overlay(i);
3075
3076 if (ovl->id == 1) {
3077 dispc_enable_plane(ovl->id, 0);
3078 dispc_go(ovl->manager->id);
3079 mdelay(50);
3080 break;
3081 }
3082 }
3083 }
3084
3085 if (errors & DISPC_IRQ_VID2_FIFO_UNDERFLOW) {
3086 DSSERR("VID2_FIFO_UNDERFLOW, disabling VID2\n");
3087 for (i = 0; i < omap_dss_get_num_overlays(); ++i) {
3088 struct omap_overlay *ovl;
3089 ovl = omap_dss_get_overlay(i);
3090
3091 if (ovl->id == 2) {
3092 dispc_enable_plane(ovl->id, 0);
3093 dispc_go(ovl->manager->id);
3094 mdelay(50);
3095 break;
3096 }
3097 }
3098 }
3099
3100 if (errors & DISPC_IRQ_SYNC_LOST) {
3101 struct omap_overlay_manager *manager = NULL;
3102 bool enable = false;
3103
3104 DSSERR("SYNC_LOST, disabling LCD\n");
3105
3106 for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) {
3107 struct omap_overlay_manager *mgr;
3108 mgr = omap_dss_get_overlay_manager(i);
3109 3056
3110 if (mgr->id == OMAP_DSS_CHANNEL_LCD) { 3057 ovl = omap_dss_get_overlay(i);
3111 manager = mgr; 3058 bit = fifo_underflow_bits[i];
3112 enable = mgr->device->state ==
3113 OMAP_DSS_DISPLAY_ACTIVE;
3114 mgr->device->driver->disable(mgr->device);
3115 break;
3116 }
3117 }
3118 3059
3119 if (manager) { 3060 if (bit & errors) {
3120 struct omap_dss_device *dssdev = manager->device; 3061 DSSERR("FIFO UNDERFLOW on %s, disabling the overlay\n",
3121 for (i = 0; i < omap_dss_get_num_overlays(); ++i) { 3062 ovl->name);
3122 struct omap_overlay *ovl; 3063 dispc_enable_plane(ovl->id, false);
3123 ovl = omap_dss_get_overlay(i); 3064 dispc_go(ovl->manager->id);
3124
3125 if (ovl->id != 0 && ovl->manager == manager)
3126 dispc_enable_plane(ovl->id, 0);
3127 }
3128
3129 dispc_go(manager->id);
3130 mdelay(50); 3065 mdelay(50);
3131 if (enable)
3132 dssdev->driver->enable(dssdev);
3133 } 3066 }
3134 } 3067 }
3135 3068
3136 if (errors & DISPC_IRQ_SYNC_LOST_DIGIT) { 3069 for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) {
3137 struct omap_overlay_manager *manager = NULL; 3070 struct omap_overlay_manager *mgr;
3138 bool enable = false; 3071 unsigned bit;
3139
3140 DSSERR("SYNC_LOST_DIGIT, disabling TV\n");
3141
3142 for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) {
3143 struct omap_overlay_manager *mgr;
3144 mgr = omap_dss_get_overlay_manager(i);
3145
3146 if (mgr->id == OMAP_DSS_CHANNEL_DIGIT) {
3147 manager = mgr;
3148 enable = mgr->device->state ==
3149 OMAP_DSS_DISPLAY_ACTIVE;
3150 mgr->device->driver->disable(mgr->device);
3151 break;
3152 }
3153 }
3154
3155 if (manager) {
3156 struct omap_dss_device *dssdev = manager->device;
3157 for (i = 0; i < omap_dss_get_num_overlays(); ++i) {
3158 struct omap_overlay *ovl;
3159 ovl = omap_dss_get_overlay(i);
3160 3072
3161 if (ovl->id != 0 && ovl->manager == manager) 3073 mgr = omap_dss_get_overlay_manager(i);
3162 dispc_enable_plane(ovl->id, 0); 3074 bit = sync_lost_bits[i];
3163 }
3164 3075
3165 dispc_go(manager->id); 3076 if (bit & errors) {
3166 mdelay(50); 3077 struct omap_dss_device *dssdev = mgr->device;
3167 if (enable) 3078 bool enable;
3168 dssdev->driver->enable(dssdev);
3169 }
3170 }
3171
3172 if (errors & DISPC_IRQ_SYNC_LOST2) {
3173 struct omap_overlay_manager *manager = NULL;
3174 bool enable = false;
3175
3176 DSSERR("SYNC_LOST for LCD2, disabling LCD2\n");
3177 3079
3178 for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) { 3080 DSSERR("SYNC_LOST on channel %s, restarting the output "
3179 struct omap_overlay_manager *mgr; 3081 "with video overlays disabled\n",
3180 mgr = omap_dss_get_overlay_manager(i); 3082 mgr->name);
3181 3083
3182 if (mgr->id == OMAP_DSS_CHANNEL_LCD2) { 3084 enable = dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
3183 manager = mgr; 3085 dssdev->driver->disable(dssdev);
3184 enable = mgr->device->state ==
3185 OMAP_DSS_DISPLAY_ACTIVE;
3186 mgr->device->driver->disable(mgr->device);
3187 break;
3188 }
3189 }
3190 3086
3191 if (manager) {
3192 struct omap_dss_device *dssdev = manager->device;
3193 for (i = 0; i < omap_dss_get_num_overlays(); ++i) { 3087 for (i = 0; i < omap_dss_get_num_overlays(); ++i) {
3194 struct omap_overlay *ovl; 3088 struct omap_overlay *ovl;
3195 ovl = omap_dss_get_overlay(i); 3089 ovl = omap_dss_get_overlay(i);
3196 3090
3197 if (ovl->id != 0 && ovl->manager == manager) 3091 if (ovl->id != OMAP_DSS_GFX &&
3198 dispc_enable_plane(ovl->id, 0); 3092 ovl->manager == mgr)
3093 dispc_enable_plane(ovl->id, false);
3199 } 3094 }
3200 3095
3201 dispc_go(manager->id); 3096 dispc_go(mgr->id);
3202 mdelay(50); 3097 mdelay(50);
3098
3203 if (enable) 3099 if (enable)
3204 dssdev->driver->enable(dssdev); 3100 dssdev->driver->enable(dssdev);
3205 } 3101 }