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authorAndres Salomon <dilinger@queued.net>2008-04-28 05:15:27 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-28 11:58:39 -0400
commitf694e53bd0db69557ee8e0db2d1602818ff173b0 (patch)
treed904b492105055a2adf00c60fa0324c0905b3bbe /drivers/video/geode/lxfb.h
parentaec40532c4d1183fa1ec415bb7dae08e19fc6b01 (diff)
lxfb: add power management functionality
This adds the ability to suspend/resume the lxfb driver, which includes: - Register and palette saving code; registers are stored in lxfb_par. A few MSR values are saved as well. - lx_powerup and lx_powerdown functions which restore/save registers and enable/disable graphic engines. - lxfb_suspend/lxfb_resume Originally based on a patch by Jordan Crouse. [akpm@linux-foundation.org: be conventional, save an ifdef] Signed-off-by: Andres Salomon <dilinger@debian.org> Cc: "Antonino A. Daplas" <adaplas@pol.net> Cc: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/geode/lxfb.h')
-rw-r--r--drivers/video/geode/lxfb.h45
1 files changed, 45 insertions, 0 deletions
diff --git a/drivers/video/geode/lxfb.h b/drivers/video/geode/lxfb.h
index b3fbc56ccbd7..3b9416f4ee20 100644
--- a/drivers/video/geode/lxfb.h
+++ b/drivers/video/geode/lxfb.h
@@ -3,6 +3,16 @@
3 3
4#include <linux/fb.h> 4#include <linux/fb.h>
5 5
6#define GP_REG_COUNT (0x7c / 4)
7#define DC_REG_COUNT (0xf0 / 4)
8#define VP_REG_COUNT (0x158 / 8)
9#define FP_REG_COUNT (0x60 / 8)
10
11#define DC_PAL_COUNT 0x104
12#define DC_HFILT_COUNT 0x100
13#define DC_VFILT_COUNT 0x100
14#define VP_COEFF_SIZE 0x1000
15
6#define OUTPUT_CRT 0x01 16#define OUTPUT_CRT 0x01
7#define OUTPUT_PANEL 0x02 17#define OUTPUT_PANEL 0x02
8 18
@@ -12,6 +22,27 @@ struct lxfb_par {
12 void __iomem *gp_regs; 22 void __iomem *gp_regs;
13 void __iomem *dc_regs; 23 void __iomem *dc_regs;
14 void __iomem *vp_regs; 24 void __iomem *vp_regs;
25#ifdef CONFIG_PM
26 int powered_down;
27
28 /* register state, for power mgmt functionality */
29 struct {
30 uint64_t padsel;
31 uint64_t dotpll;
32 uint64_t dfglcfg;
33 uint64_t dcspare;
34 } msr;
35
36 uint32_t gp[GP_REG_COUNT];
37 uint32_t dc[DC_REG_COUNT];
38 uint64_t vp[VP_REG_COUNT];
39 uint64_t fp[FP_REG_COUNT];
40
41 uint32_t pal[DC_PAL_COUNT];
42 uint32_t hcoeff[DC_HFILT_COUNT * 2];
43 uint32_t vcoeff[DC_VFILT_COUNT];
44 uint32_t vp_coeff[VP_COEFF_SIZE / 4];
45#endif
15}; 46};
16 47
17static inline unsigned int lx_get_pitch(unsigned int xres, int bpp) 48static inline unsigned int lx_get_pitch(unsigned int xres, int bpp)
@@ -27,6 +58,11 @@ int lx_blank_display(struct fb_info *, int);
27void lx_set_palette_reg(struct fb_info *, unsigned int, unsigned int, 58void lx_set_palette_reg(struct fb_info *, unsigned int, unsigned int,
28 unsigned int, unsigned int); 59 unsigned int, unsigned int);
29 60
61#ifdef CONFIG_PM
62int lx_powerdown(struct fb_info *info);
63int lx_powerup(struct fb_info *info);
64#endif
65
30 66
31/* Graphics Processor registers (table 6-29 from the data book) */ 67/* Graphics Processor registers (table 6-29 from the data book) */
32enum gp_registers { 68enum gp_registers {
@@ -182,6 +218,9 @@ enum dc_registers {
182#define DC_DV_CTL_DV_LINE_SIZE_2K (1 << 10) 218#define DC_DV_CTL_DV_LINE_SIZE_2K (1 << 10)
183#define DC_DV_CTL_DV_LINE_SIZE_4K (1 << 11) 219#define DC_DV_CTL_DV_LINE_SIZE_4K (1 << 11)
184#define DC_DV_CTL_DV_LINE_SIZE_8K ((1 << 10) | (1 << 11)) 220#define DC_DV_CTL_DV_LINE_SIZE_8K ((1 << 10) | (1 << 11))
221#define DC_DV_CTL_CLEAR_DV_RAM (1 << 0)
222
223#define DC_IRQ_FILT_CTL_H_FILT_SEL (1 << 10)
185 224
186#define DC_CLR_KEY_CLR_KEY_EN (1 << 24) 225#define DC_CLR_KEY_CLR_KEY_EN (1 << 24)
187 226
@@ -267,6 +306,8 @@ enum vp_registers {
267 VP_A2YE, 306 VP_A2YE,
268 307
269 VP_A3YE, /* 0x150 */ 308 VP_A3YE, /* 0x150 */
309
310 VP_VCR = 0x1000, /* 0x1000 - 0x1fff */
270}; 311};
271 312
272#define VP_VCFG_VID_EN (1 << 0) 313#define VP_VCFG_VID_EN (1 << 0)
@@ -319,6 +360,10 @@ enum fp_registers {
319#define FP_PT2_SCRC (1 << 27) /* shfclk free */ 360#define FP_PT2_SCRC (1 << 27) /* shfclk free */
320 361
321#define FP_PM_P (1 << 24) /* panel power ctl */ 362#define FP_PM_P (1 << 24) /* panel power ctl */
363#define FP_PM_PANEL_PWR_UP (1 << 3) /* r/o */
364#define FP_PM_PANEL_PWR_DOWN (1 << 2) /* r/o */
365#define FP_PM_PANEL_OFF (1 << 1) /* r/o */
366#define FP_PM_PANEL_ON (1 << 0) /* r/o */
322 367
323#define FP_DFC_BC ((1 << 4) | (1 << 5) | (1 << 6)) 368#define FP_DFC_BC ((1 << 4) | (1 << 5) | (1 << 6))
324 369