aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video/da8xx-fb.c
diff options
context:
space:
mode:
authorManjunathappa, Prakash <prakash.pm@ti.com>2011-07-18 00:28:53 -0400
committerFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2011-10-04 05:48:58 -0400
commit4d7408014e4f085c43b511b436ac60d1d61e6e17 (patch)
treef075dc05472ca975b4e9e2919eb1806396a96824 /drivers/video/da8xx-fb.c
parentd121c3f3cedb84601ee4839d6a6c33d1e9240cc9 (diff)
video: da8xx-fb: Increased resolution configuration of revised LCDC IP
Revised LCD controller in upcoming TI SoC which is an updated version of LCDC IP that was found on TI's DA850 SoC supports 2048*2048 resolution. Below are the encoding details: Width: Pixels Per Line = {pplmsb, ppllsb, 4'b1111} + 1 Where pplmsb:1bit==>Raster Timing0[3], ppllsb:6bits==>Raster Timing0[9:4]. And encoded value can range from 16 to 2048 in multiples of 16. Height: Lines Per Panel = {lpp_b10, lpp} Where lpp:10bits==>Raster Timing1[9:0], lpp_b10:1bit==>Raster Timing2[26]. And encoded value can range from 1 to 2048, programmable range is 0 to 2047. Patch is verified on emulation platform of upcoming SoC for updated feature and on DA850 platform to make sure nothing existing breaks. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Diffstat (limited to 'drivers/video/da8xx-fb.c')
-rw-r--r--drivers/video/da8xx-fb.c31
1 files changed, 28 insertions, 3 deletions
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 217c05f74541..55f91d9ab00b 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -460,18 +460,43 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
460 460
461 /* Set the Panel Width */ 461 /* Set the Panel Width */
462 /* Pixels per line = (PPL + 1)*16 */ 462 /* Pixels per line = (PPL + 1)*16 */
463 /*0x3F in bits 4..9 gives max horisontal resolution = 1024 pixels*/ 463 if (lcd_revision == LCD_VERSION_1) {
464 width &= 0x3f0; 464 /*
465 * 0x3F in bits 4..9 gives max horizontal resolution = 1024
466 * pixels.
467 */
468 width &= 0x3f0;
469 } else {
470 /*
471 * 0x7F in bits 4..10 gives max horizontal resolution = 2048
472 * pixels.
473 */
474 width &= 0x7f0;
475 }
476
465 reg = lcdc_read(LCD_RASTER_TIMING_0_REG); 477 reg = lcdc_read(LCD_RASTER_TIMING_0_REG);
466 reg &= 0xfffffc00; 478 reg &= 0xfffffc00;
467 reg |= ((width >> 4) - 1) << 4; 479 if (lcd_revision == LCD_VERSION_1) {
480 reg |= ((width >> 4) - 1) << 4;
481 } else {
482 width = (width >> 4) - 1;
483 reg |= ((width & 0x3f) << 4) | ((width & 0x40) >> 3);
484 }
468 lcdc_write(reg, LCD_RASTER_TIMING_0_REG); 485 lcdc_write(reg, LCD_RASTER_TIMING_0_REG);
469 486
470 /* Set the Panel Height */ 487 /* Set the Panel Height */
488 /* Set bits 9:0 of Lines Per Pixel */
471 reg = lcdc_read(LCD_RASTER_TIMING_1_REG); 489 reg = lcdc_read(LCD_RASTER_TIMING_1_REG);
472 reg = ((height - 1) & 0x3ff) | (reg & 0xfffffc00); 490 reg = ((height - 1) & 0x3ff) | (reg & 0xfffffc00);
473 lcdc_write(reg, LCD_RASTER_TIMING_1_REG); 491 lcdc_write(reg, LCD_RASTER_TIMING_1_REG);
474 492
493 /* Set bit 10 of Lines Per Pixel */
494 if (lcd_revision == LCD_VERSION_2) {
495 reg = lcdc_read(LCD_RASTER_TIMING_2_REG);
496 reg |= ((height - 1) & 0x400) << 16;
497 lcdc_write(reg, LCD_RASTER_TIMING_2_REG);
498 }
499
475 /* Set the Raster Order of the Frame Buffer */ 500 /* Set the Raster Order of the Frame Buffer */
476 reg = lcdc_read(LCD_RASTER_CTRL_REG) & ~(1 << 8); 501 reg = lcdc_read(LCD_RASTER_CTRL_REG) & ~(1 << 8);
477 if (raster_order) 502 if (raster_order)