diff options
author | Jan Andersson <jan@gaisler.com> | 2011-05-03 14:11:57 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-05-03 14:43:21 -0400 |
commit | c430131a02d677aa708f56342c1565edfdacb3c0 (patch) | |
tree | 15e9930a2512e4b05b7cfd4684f36dd26b0b990f /drivers/usb/host/ehci.h | |
parent | 2ce2c3ac8852cfc8f74f4b7b9a2c4cdff007f96a (diff) |
USB: EHCI: Support controllers with big endian capability regs
The two first HC capability registers (CAPLENGTH and HCIVERSION)
are defined as one 8-bit and one 16-bit register. Most HC
implementations have selected to treat these registers as part
of a 32-bit register, giving the same layout for both big and
small endian systems.
This patch adds a new quirk, big_endian_capbase, to support
controllers with big endian register interfaces that treat
HCIVERSION and CAPLENGTH as individual registers.
Signed-off-by: Jan Andersson <jan@gaisler.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ehci.h')
-rw-r--r-- | drivers/usb/host/ehci.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index e9ba8e252489..d0792f591590 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h | |||
@@ -128,6 +128,7 @@ struct ehci_hcd { /* one per controller */ | |||
128 | unsigned has_fsl_port_bug:1; /* FreeScale */ | 128 | unsigned has_fsl_port_bug:1; /* FreeScale */ |
129 | unsigned big_endian_mmio:1; | 129 | unsigned big_endian_mmio:1; |
130 | unsigned big_endian_desc:1; | 130 | unsigned big_endian_desc:1; |
131 | unsigned big_endian_capbase:1; | ||
131 | unsigned has_amcc_usb23:1; | 132 | unsigned has_amcc_usb23:1; |
132 | unsigned need_io_watchdog:1; | 133 | unsigned need_io_watchdog:1; |
133 | unsigned broken_periodic:1; | 134 | unsigned broken_periodic:1; |
@@ -605,12 +606,18 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) | |||
605 | * This attempts to support either format at compile time without a | 606 | * This attempts to support either format at compile time without a |
606 | * runtime penalty, or both formats with the additional overhead | 607 | * runtime penalty, or both formats with the additional overhead |
607 | * of checking a flag bit. | 608 | * of checking a flag bit. |
609 | * | ||
610 | * ehci_big_endian_capbase is a special quirk for controllers that | ||
611 | * implement the HC capability registers as separate registers and not | ||
612 | * as fields of a 32-bit register. | ||
608 | */ | 613 | */ |
609 | 614 | ||
610 | #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO | 615 | #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO |
611 | #define ehci_big_endian_mmio(e) ((e)->big_endian_mmio) | 616 | #define ehci_big_endian_mmio(e) ((e)->big_endian_mmio) |
617 | #define ehci_big_endian_capbase(e) ((e)->big_endian_capbase) | ||
612 | #else | 618 | #else |
613 | #define ehci_big_endian_mmio(e) 0 | 619 | #define ehci_big_endian_mmio(e) 0 |
620 | #define ehci_big_endian_capbase(e) 0 | ||
614 | #endif | 621 | #endif |
615 | 622 | ||
616 | /* | 623 | /* |