ENGR00307558-6 usb: chipidea: OTG fsm timers initialization.

This patch adds OTG fsm timers initialization, which use controller's 1ms
interrupt as timeout counter, also adds some local timers which are not
in otg_fsm_timer list.

Signed-off-by: Li Jun <b47624@freescale.com>

1 files changed, 190 insertions, 0 deletions

diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index 4a40399df9e9..51b8a0fff3e5 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -26,6 +26,22 @@
 #include "otg.h"
 #include "otg_fsm.h"
 
+static struct ci_otg_fsm_timer *otg_timer_initializer
+(struct ci_hdrc *ci, void (*function)(void *, unsigned long),
+                        unsigned long expires, unsigned long data)
+{
+        struct ci_otg_fsm_timer *timer;
+
+        timer = devm_kzalloc(ci->dev, sizeof(struct ci_otg_fsm_timer),
+                                                                GFP_KERNEL);
+        if (!timer)
+                return NULL;
+        timer->function = function;
+        timer->expires = expires;
+        timer->data = data;
+        return timer;
+}
+
 /*
  * Add timer to active timer list
  */
@@ -77,6 +93,164 @@ static void ci_otg_del_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
                 hw_write_otgsc(ci, OTGSC_1MSIE, 0);
 }
 
+/* The timeout callback function to set time out bit */
+static void set_tmout(void *ptr, unsigned long indicator)
+{
+        *(int *)indicator = 1;
+}
+
+static void set_tmout_and_fsm(void *ptr, unsigned long indicator)
+{
+        struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+        set_tmout(ci, indicator);
+
+        disable_irq_nosync(ci->irq);
+        queue_work(ci->wq, &ci->work);
+}
+
+static void a_wait_vfall_tmout_func(void *ptr, unsigned long indicator)
+{
+        struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+        set_tmout(ci, indicator);
+
+        /* Disable port power for detect SRP */
+        hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0);
+        /* Clear exsiting DP irq */
+        hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
+        /* Enable data pulse irq */
+        hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
+        disable_irq_nosync(ci->irq);
+        queue_work(ci->wq, &ci->work);
+}
+
+static void b_ase0_brst_tmout_func(void *ptr, unsigned long indicator)
+{
+        struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+        set_tmout(ci, indicator);
+        if (!hw_read_otgsc(ci, OTGSC_BSV))
+                ci->fsm.b_sess_vld = 0;
+
+        disable_irq_nosync(ci->irq);
+        queue_work(ci->wq, &ci->work);
+}
+
+static void b_ssend_srp_tmout_func(void *ptr, unsigned long indicator)
+{
+        struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+        set_tmout(ci, indicator);
+
+        /* only vbus fall below B_sess_vld in b_idle state */
+        if (ci->transceiver->state == OTG_STATE_B_IDLE) {
+                disable_irq_nosync(ci->irq);
+                queue_work(ci->wq, &ci->work);
+        }
+}
+
+static void b_sess_vld_tmout_func(void *ptr, unsigned long indicator)
+{
+        struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+        /* Check if A detached */
+        if (!(hw_read_otgsc(ci, OTGSC_BSV))) {
+                ci->fsm.b_sess_vld = 0;
+                ci_otg_add_timer(ci, B_SSEND_SRP);
+                disable_irq_nosync(ci->irq);
+                queue_work(ci->wq, &ci->work);
+        }
+}
+
+static void b_data_pulse_end(void *ptr, unsigned long indicator)
+{
+        struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+        ci->fsm.b_srp_done = 1;
+        ci->fsm.b_bus_req = 0;
+        if (ci->fsm.power_up)
+                ci->fsm.power_up = 0;
+
+        hw_write_otgsc(ci, OTGSC_HABA, 0);
+
+        disable_irq_nosync(ci->irq);
+        queue_work(ci->wq, &ci->work);
+}
+
+/* Initialize timers */
+static int ci_otg_init_timers(struct ci_hdrc *ci)
+{
+        struct otg_fsm *fsm = &ci->fsm;
+
+        /* FSM used timers */
+        ci->fsm_timer->timer_list[A_WAIT_VRISE] =
+                otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_VRISE,
+                        (unsigned long)&fsm->a_wait_vrise_tmout);
+        if (ci->fsm_timer->timer_list[A_WAIT_VRISE] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[A_WAIT_VFALL] =
+                otg_timer_initializer(ci, &a_wait_vfall_tmout_func,
+                TA_WAIT_VFALL, (unsigned long)&fsm->a_wait_vfall_tmout);
+        if (ci->fsm_timer->timer_list[A_WAIT_VFALL] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[A_WAIT_BCON] =
+                otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_BCON,
+                                (unsigned long)&fsm->a_wait_bcon_tmout);
+        if (ci->fsm_timer->timer_list[A_WAIT_BCON] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[A_AIDL_BDIS] =
+                otg_timer_initializer(ci, &set_tmout_and_fsm, TA_AIDL_BDIS,
+                                (unsigned long)&fsm->a_aidl_bdis_tmout);
+        if (ci->fsm_timer->timer_list[A_AIDL_BDIS] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[A_BIDL_ADIS] =
+                otg_timer_initializer(ci, &set_tmout_and_fsm, TA_BIDL_ADIS,
+                                (unsigned long)&fsm->a_bidl_adis_tmout);
+        if (ci->fsm_timer->timer_list[A_BIDL_ADIS] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[B_ASE0_BRST] =
+                otg_timer_initializer(ci, &b_ase0_brst_tmout_func, TB_ASE0_BRST,
+                                        (unsigned long)&fsm->b_ase0_brst_tmout);
+        if (ci->fsm_timer->timer_list[B_ASE0_BRST] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[B_SE0_SRP] =
+                otg_timer_initializer(ci, &set_tmout_and_fsm, TB_SE0_SRP,
+                                        (unsigned long)&fsm->b_se0_srp);
+        if (ci->fsm_timer->timer_list[B_SE0_SRP] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[B_SSEND_SRP] =
+                otg_timer_initializer(ci, &b_ssend_srp_tmout_func, TB_SSEND_SRP,
+                                        (unsigned long)&fsm->b_ssend_srp);
+        if (ci->fsm_timer->timer_list[B_SSEND_SRP] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[B_SRP_FAIL] =
+                otg_timer_initializer(ci, &set_tmout, TB_SRP_FAIL,
+                                (unsigned long)&fsm->b_srp_done);
+        if (ci->fsm_timer->timer_list[B_SRP_FAIL] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[B_DATA_PLS] =
+                otg_timer_initializer(ci, &b_data_pulse_end, TB_DATA_PLS, 0);
+        if (ci->fsm_timer->timer_list[B_DATA_PLS] == NULL)
+                return -ENOMEM;
+
+        ci->fsm_timer->timer_list[B_SESS_VLD] = otg_timer_initializer(ci,
+                                        &b_sess_vld_tmout_func, TB_SESS_VLD, 0);
+        if (ci->fsm_timer->timer_list[B_SESS_VLD] == NULL)
+                return -ENOMEM;
+
+        return 0;
+}
+
 /* -------------------------------------------------------------*/
 /* Operations that will be called from OTG Finite State Machine */
 /* -------------------------------------------------------------*/
@@ -223,6 +397,7 @@ static struct otg_fsm_ops ci_otg_ops = {
 
 int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
 {
+        int retval = 0;
         struct usb_otg *otg;
 
         otg = devm_kzalloc(ci->dev,
@@ -246,6 +421,21 @@ int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
 
         mutex_init(&ci->fsm.lock);
 
+        ci->fsm_timer = devm_kzalloc(ci->dev,
+                        sizeof(struct ci_otg_fsm_timer_list), GFP_KERNEL);
+        if (!ci->fsm_timer) {
+                dev_err(ci->dev,
+                "Failed to allocate timer structure for ci hdrc otg!\n");
+                return -ENOMEM;
+        }
+
+        INIT_LIST_HEAD(&ci->fsm_timer->active_timers);
+        retval = ci_otg_init_timers(ci);
+        if (retval) {
+                dev_err(ci->dev, "Couldn't init OTG timers\n");
+                return retval;
+        }
+
         /* Enable A vbus valid irq */
         hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE);