diff options
author | Paul Mundt <lethal@linux-sh.org> | 2011-06-08 05:19:37 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-06-08 05:19:37 -0400 |
commit | debf9507166eede1e676d27d3298cdfb27399cb4 (patch) | |
tree | 3c41311a485be79ab16d707c8c7f997990e95cd8 /drivers/tty/serial/sh-sci.h | |
parent | b03034016184b7e9fd19f2a24ffb131953fdcc41 (diff) |
serial: sh-sci: Generalize overrun handling.
This consolidates all of the broken out overrun handling and ensures that
we have sensible defaults per-port type, in addition to making sure that
overruns are flagged appropriately in the error mask for parts that
haven't explicitly disabled support for it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/tty/serial/sh-sci.h')
-rw-r--r-- | drivers/tty/serial/sh-sci.h | 52 |
1 files changed, 2 insertions, 50 deletions
diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h index ed1c09c0454a..caab353a98b5 100644 --- a/drivers/tty/serial/sh-sci.h +++ b/drivers/tty/serial/sh-sci.h | |||
@@ -19,11 +19,9 @@ | |||
19 | defined(CONFIG_ARCH_SH7372) | 19 | defined(CONFIG_ARCH_SH7372) |
20 | # define PORT_PTCR 0xA405011EUL | 20 | # define PORT_PTCR 0xA405011EUL |
21 | # define PORT_PVCR 0xA4050122UL | 21 | # define PORT_PVCR 0xA4050122UL |
22 | # define SCIF_ORER 0x0200 /* overrun error bit */ | ||
23 | #elif defined(CONFIG_SH_RTS7751R2D) | 22 | #elif defined(CONFIG_SH_RTS7751R2D) |
24 | # define SCSPTR1 0xFFE0001C /* 8 bit SCIF */ | 23 | # define SCSPTR1 0xFFE0001C /* 8 bit SCIF */ |
25 | # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ | 24 | # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ |
26 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
27 | #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ | 25 | #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ |
28 | defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ | 26 | defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ |
29 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ | 27 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ |
@@ -32,15 +30,12 @@ | |||
32 | defined(CONFIG_CPU_SUBTYPE_SH7751R) | 30 | defined(CONFIG_CPU_SUBTYPE_SH7751R) |
33 | # define SCSPTR1 0xffe0001c /* 8 bit SCI */ | 31 | # define SCSPTR1 0xffe0001c /* 8 bit SCI */ |
34 | # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ | 32 | # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ |
35 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
36 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | 33 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) |
37 | # define SCSPTR0 0xfe600024 /* 16 bit SCIF */ | 34 | # define SCSPTR0 0xfe600024 /* 16 bit SCIF */ |
38 | # define SCSPTR1 0xfe610024 /* 16 bit SCIF */ | 35 | # define SCSPTR1 0xfe610024 /* 16 bit SCIF */ |
39 | # define SCSPTR2 0xfe620024 /* 16 bit SCIF */ | 36 | # define SCSPTR2 0xfe620024 /* 16 bit SCIF */ |
40 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
41 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 37 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
42 | # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ | 38 | # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ |
43 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
44 | # define PACR 0xa4050100 | 39 | # define PACR 0xa4050100 |
45 | # define PBCR 0xa4050102 | 40 | # define PBCR 0xa4050102 |
46 | #elif defined(CONFIG_CPU_SUBTYPE_SH7343) | 41 | #elif defined(CONFIG_CPU_SUBTYPE_SH7343) |
@@ -48,35 +43,24 @@ | |||
48 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 43 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
49 | # define PWDR 0xA4050166 | 44 | # define PWDR 0xA4050166 |
50 | # define PSCR 0xA405011E | 45 | # define PSCR 0xA405011E |
51 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
52 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) | 46 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) |
53 | # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ | 47 | # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ |
54 | # define SCSPTR0 SCPDR0 | 48 | # define SCSPTR0 SCPDR0 |
55 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
56 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) | 49 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) |
57 | # define SCSPTR0 0xa4050160 | 50 | # define SCSPTR0 0xa4050160 |
58 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
59 | #elif defined(CONFIG_CPU_SUBTYPE_SH7724) | ||
60 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
61 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | 51 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) |
62 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ | 52 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ |
63 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
64 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) | 53 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) |
65 | # define SCSPTR0 0xfe4b0020 | 54 | # define SCSPTR0 0xfe4b0020 |
66 | # define SCIF_ORER 0x0001 | ||
67 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | 55 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
68 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ | 56 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ |
69 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
70 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) | 57 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) |
71 | # define SCSPTR0 0xff923020 /* 16 bit SCIF */ | 58 | # define SCSPTR0 0xff923020 /* 16 bit SCIF */ |
72 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
73 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | 59 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) |
74 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ | 60 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ |
75 | # define SCIF_ORER 0x0001 /* Overrun error bit */ | ||
76 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 61 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
77 | defined(CONFIG_CPU_SUBTYPE_SH7786) | 62 | defined(CONFIG_CPU_SUBTYPE_SH7786) |
78 | # define SCSPTR0 0xffea0024 /* 16 bit SCIF */ | 63 | # define SCSPTR0 0xffea0024 /* 16 bit SCIF */ |
79 | # define SCIF_ORER 0x0001 /* Overrun error bit */ | ||
80 | #elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ | 64 | #elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ |
81 | defined(CONFIG_CPU_SUBTYPE_SH7203) || \ | 65 | defined(CONFIG_CPU_SUBTYPE_SH7203) || \ |
82 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ | 66 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ |
@@ -84,36 +68,12 @@ | |||
84 | # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ | 68 | # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ |
85 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) | 69 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) |
86 | # define SCSPTR0 0xf8400020 /* 16 bit SCIF */ | 70 | # define SCSPTR0 0xf8400020 /* 16 bit SCIF */ |
87 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
88 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) | 71 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) |
89 | # define SCSPTR0 0xffc30020 /* 16 bit SCIF */ | 72 | # define SCSPTR0 0xffc30020 /* 16 bit SCIF */ |
90 | # define SCIF_ORER 0x0001 /* Overrun error bit */ | ||
91 | #else | 73 | #else |
92 | # error CPU subtype not defined | 74 | # error CPU subtype not defined |
93 | #endif | 75 | #endif |
94 | 76 | ||
95 | /* SCxSR SCI */ | ||
96 | #define SCI_TDRE 0x80 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ | ||
97 | #define SCI_RDRF 0x40 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ | ||
98 | #define SCI_ORER 0x20 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ | ||
99 | #define SCI_FER 0x10 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ | ||
100 | #define SCI_PER 0x08 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ | ||
101 | #define SCI_TEND 0x04 /* 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ | ||
102 | /* SCI_MPB 0x02 * 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ | ||
103 | /* SCI_MPBT 0x01 * 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ | ||
104 | |||
105 | #define SCI_ERRORS ( SCI_PER | SCI_FER | SCI_ORER) | ||
106 | |||
107 | /* SCxSR SCIF */ | ||
108 | #define SCIF_ER 0x0080 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ | ||
109 | #define SCIF_TEND 0x0040 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ | ||
110 | #define SCIF_TDFE 0x0020 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ | ||
111 | #define SCIF_BRK 0x0010 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ | ||
112 | #define SCIF_FER 0x0008 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ | ||
113 | #define SCIF_PER 0x0004 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ | ||
114 | #define SCIF_RDF 0x0002 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ | ||
115 | #define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ | ||
116 | |||
117 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 77 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
118 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 78 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
119 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 79 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
@@ -121,35 +81,27 @@ | |||
121 | defined(CONFIG_ARCH_SH7367) || \ | 81 | defined(CONFIG_ARCH_SH7367) || \ |
122 | defined(CONFIG_ARCH_SH7377) || \ | 82 | defined(CONFIG_ARCH_SH7377) || \ |
123 | defined(CONFIG_ARCH_SH7372) | 83 | defined(CONFIG_ARCH_SH7372) |
124 | # define SCIF_ORER 0x0200 | ||
125 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) | ||
126 | # define SCIF_RFDC_MASK 0x007f | 84 | # define SCIF_RFDC_MASK 0x007f |
127 | # define SCIF_TXROOM_MAX 64 | 85 | # define SCIF_TXROOM_MAX 64 |
128 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | 86 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
129 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK ) | ||
130 | # define SCIF_RFDC_MASK 0x007f | 87 | # define SCIF_RFDC_MASK 0x007f |
131 | # define SCIF_TXROOM_MAX 64 | 88 | # define SCIF_TXROOM_MAX 64 |
132 | /* SH7763 SCIF2 support */ | 89 | /* SH7763 SCIF2 support */ |
133 | # define SCIF2_RFDC_MASK 0x001f | 90 | # define SCIF2_RFDC_MASK 0x001f |
134 | # define SCIF2_TXROOM_MAX 16 | 91 | # define SCIF2_TXROOM_MAX 16 |
135 | #else | 92 | #else |
136 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) | ||
137 | # define SCIF_RFDC_MASK 0x001f | 93 | # define SCIF_RFDC_MASK 0x001f |
138 | # define SCIF_TXROOM_MAX 16 | 94 | # define SCIF_TXROOM_MAX 16 |
139 | #endif | 95 | #endif |
140 | 96 | ||
141 | #ifndef SCIF_ORER | ||
142 | #define SCIF_ORER 0x0000 | ||
143 | #endif | ||
144 | |||
145 | #define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) | 97 | #define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) |
146 | #define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS) | ||
147 | #define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF) | 98 | #define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF) |
148 | #define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE) | 99 | #define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE) |
149 | #define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER) | 100 | #define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER) |
150 | #define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER) | 101 | #define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER) |
151 | #define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK) | 102 | #define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK) |
152 | #define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER) | 103 | |
104 | #define SCxSR_ERRORS(port) (to_sci_port(port)->cfg->error_mask) | ||
153 | 105 | ||
154 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 106 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
155 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 107 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |