diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2011-07-09 13:16:36 -0400 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2011-07-14 15:27:54 -0400 |
commit | 3451fb15635d11c52a2ba4d3f1ae3a6b4c265070 (patch) | |
tree | 45b6afeca80b71265a917d659c7b7c0debcf87fc /drivers/spi/spi-imx.c | |
parent | edd501bbf177ab62f963476c917cbdb0dc7dc862 (diff) |
spi/imx: use mx21 to name SPI_IMX_VER_0_0 function and macro
SPI_IMX_VER_0_0 covers i.mx21 and i.mx27. It makes more sense to
use mx21 rather than mx27 to name SPI_IMX_VER_0_0 function and
macro, since i.mx21 comes out ealier than i.mx27.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/spi-imx.c')
-rw-r--r-- | drivers/spi/spi-imx.c | 62 |
1 files changed, 31 insertions, 31 deletions
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 1c55dc9adb02..f3edb5652fc6 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c | |||
@@ -406,70 +406,70 @@ static void __maybe_unused spi_imx0_4_reset(struct spi_imx_data *spi_imx) | |||
406 | readl(spi_imx->base + MXC_CSPIRXDATA); | 406 | readl(spi_imx->base + MXC_CSPIRXDATA); |
407 | } | 407 | } |
408 | 408 | ||
409 | #define MX27_INTREG_RR (1 << 4) | 409 | #define MX21_INTREG_RR (1 << 4) |
410 | #define MX27_INTREG_TEEN (1 << 9) | 410 | #define MX21_INTREG_TEEN (1 << 9) |
411 | #define MX27_INTREG_RREN (1 << 13) | 411 | #define MX21_INTREG_RREN (1 << 13) |
412 | 412 | ||
413 | #define MX27_CSPICTRL_POL (1 << 5) | 413 | #define MX21_CSPICTRL_POL (1 << 5) |
414 | #define MX27_CSPICTRL_PHA (1 << 6) | 414 | #define MX21_CSPICTRL_PHA (1 << 6) |
415 | #define MX27_CSPICTRL_SSPOL (1 << 8) | 415 | #define MX21_CSPICTRL_SSPOL (1 << 8) |
416 | #define MX27_CSPICTRL_XCH (1 << 9) | 416 | #define MX21_CSPICTRL_XCH (1 << 9) |
417 | #define MX27_CSPICTRL_ENABLE (1 << 10) | 417 | #define MX21_CSPICTRL_ENABLE (1 << 10) |
418 | #define MX27_CSPICTRL_MASTER (1 << 11) | 418 | #define MX21_CSPICTRL_MASTER (1 << 11) |
419 | #define MX27_CSPICTRL_DR_SHIFT 14 | 419 | #define MX21_CSPICTRL_DR_SHIFT 14 |
420 | #define MX27_CSPICTRL_CS_SHIFT 19 | 420 | #define MX21_CSPICTRL_CS_SHIFT 19 |
421 | 421 | ||
422 | static void __maybe_unused mx27_intctrl(struct spi_imx_data *spi_imx, int enable) | 422 | static void __maybe_unused mx21_intctrl(struct spi_imx_data *spi_imx, int enable) |
423 | { | 423 | { |
424 | unsigned int val = 0; | 424 | unsigned int val = 0; |
425 | 425 | ||
426 | if (enable & MXC_INT_TE) | 426 | if (enable & MXC_INT_TE) |
427 | val |= MX27_INTREG_TEEN; | 427 | val |= MX21_INTREG_TEEN; |
428 | if (enable & MXC_INT_RR) | 428 | if (enable & MXC_INT_RR) |
429 | val |= MX27_INTREG_RREN; | 429 | val |= MX21_INTREG_RREN; |
430 | 430 | ||
431 | writel(val, spi_imx->base + MXC_CSPIINT); | 431 | writel(val, spi_imx->base + MXC_CSPIINT); |
432 | } | 432 | } |
433 | 433 | ||
434 | static void __maybe_unused mx27_trigger(struct spi_imx_data *spi_imx) | 434 | static void __maybe_unused mx21_trigger(struct spi_imx_data *spi_imx) |
435 | { | 435 | { |
436 | unsigned int reg; | 436 | unsigned int reg; |
437 | 437 | ||
438 | reg = readl(spi_imx->base + MXC_CSPICTRL); | 438 | reg = readl(spi_imx->base + MXC_CSPICTRL); |
439 | reg |= MX27_CSPICTRL_XCH; | 439 | reg |= MX21_CSPICTRL_XCH; |
440 | writel(reg, spi_imx->base + MXC_CSPICTRL); | 440 | writel(reg, spi_imx->base + MXC_CSPICTRL); |
441 | } | 441 | } |
442 | 442 | ||
443 | static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, | 443 | static int __maybe_unused mx21_config(struct spi_imx_data *spi_imx, |
444 | struct spi_imx_config *config) | 444 | struct spi_imx_config *config) |
445 | { | 445 | { |
446 | unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER; | 446 | unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER; |
447 | int cs = spi_imx->chipselect[config->cs]; | 447 | int cs = spi_imx->chipselect[config->cs]; |
448 | 448 | ||
449 | reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) << | 449 | reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) << |
450 | MX27_CSPICTRL_DR_SHIFT; | 450 | MX21_CSPICTRL_DR_SHIFT; |
451 | reg |= config->bpw - 1; | 451 | reg |= config->bpw - 1; |
452 | 452 | ||
453 | if (config->mode & SPI_CPHA) | 453 | if (config->mode & SPI_CPHA) |
454 | reg |= MX27_CSPICTRL_PHA; | 454 | reg |= MX21_CSPICTRL_PHA; |
455 | if (config->mode & SPI_CPOL) | 455 | if (config->mode & SPI_CPOL) |
456 | reg |= MX27_CSPICTRL_POL; | 456 | reg |= MX21_CSPICTRL_POL; |
457 | if (config->mode & SPI_CS_HIGH) | 457 | if (config->mode & SPI_CS_HIGH) |
458 | reg |= MX27_CSPICTRL_SSPOL; | 458 | reg |= MX21_CSPICTRL_SSPOL; |
459 | if (cs < 0) | 459 | if (cs < 0) |
460 | reg |= (cs + 32) << MX27_CSPICTRL_CS_SHIFT; | 460 | reg |= (cs + 32) << MX21_CSPICTRL_CS_SHIFT; |
461 | 461 | ||
462 | writel(reg, spi_imx->base + MXC_CSPICTRL); | 462 | writel(reg, spi_imx->base + MXC_CSPICTRL); |
463 | 463 | ||
464 | return 0; | 464 | return 0; |
465 | } | 465 | } |
466 | 466 | ||
467 | static int __maybe_unused mx27_rx_available(struct spi_imx_data *spi_imx) | 467 | static int __maybe_unused mx21_rx_available(struct spi_imx_data *spi_imx) |
468 | { | 468 | { |
469 | return readl(spi_imx->base + MXC_CSPIINT) & MX27_INTREG_RR; | 469 | return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR; |
470 | } | 470 | } |
471 | 471 | ||
472 | static void __maybe_unused spi_imx0_0_reset(struct spi_imx_data *spi_imx) | 472 | static void __maybe_unused mx21_reset(struct spi_imx_data *spi_imx) |
473 | { | 473 | { |
474 | writel(1, spi_imx->base + MXC_RESET); | 474 | writel(1, spi_imx->base + MXC_RESET); |
475 | } | 475 | } |
@@ -552,11 +552,11 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] = { | |||
552 | #endif | 552 | #endif |
553 | #ifdef CONFIG_SPI_IMX_VER_0_0 | 553 | #ifdef CONFIG_SPI_IMX_VER_0_0 |
554 | [SPI_IMX_VER_0_0] = { | 554 | [SPI_IMX_VER_0_0] = { |
555 | .intctrl = mx27_intctrl, | 555 | .intctrl = mx21_intctrl, |
556 | .config = mx27_config, | 556 | .config = mx21_config, |
557 | .trigger = mx27_trigger, | 557 | .trigger = mx21_trigger, |
558 | .rx_available = mx27_rx_available, | 558 | .rx_available = mx21_rx_available, |
559 | .reset = spi_imx0_0_reset, | 559 | .reset = mx21_reset, |
560 | .fifosize = 8, | 560 | .fifosize = 8, |
561 | }, | 561 | }, |
562 | #endif | 562 | #endif |