diff options
author | Paul Mundt <lethal@linux-sh.org> | 2011-01-13 01:06:28 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-13 01:06:28 -0500 |
commit | f43dc23d5ea91fca257be02138a255f02d98e806 (patch) | |
tree | b29722f6e965316e90ac97abf79923ced250dc21 /drivers/serial/sh-sci.c | |
parent | f8e53553f452dcbf67cb89c8cba63a1cd6eb4cc0 (diff) | |
parent | 4162cf64973df51fc885825bc9ca4d055891c49f (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 into common/serial-rework
Conflicts:
arch/sh/kernel/cpu/sh2/setup-sh7619.c
arch/sh/kernel/cpu/sh2a/setup-mxg.c
arch/sh/kernel/cpu/sh2a/setup-sh7201.c
arch/sh/kernel/cpu/sh2a/setup-sh7203.c
arch/sh/kernel/cpu/sh2a/setup-sh7206.c
arch/sh/kernel/cpu/sh3/setup-sh7705.c
arch/sh/kernel/cpu/sh3/setup-sh770x.c
arch/sh/kernel/cpu/sh3/setup-sh7710.c
arch/sh/kernel/cpu/sh3/setup-sh7720.c
arch/sh/kernel/cpu/sh4/setup-sh4-202.c
arch/sh/kernel/cpu/sh4/setup-sh7750.c
arch/sh/kernel/cpu/sh4/setup-sh7760.c
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
arch/sh/kernel/cpu/sh4a/setup-shx3.c
arch/sh/kernel/cpu/sh5/setup-sh5.c
drivers/serial/sh-sci.c
drivers/serial/sh-sci.h
include/linux/serial_sci.h
Diffstat (limited to 'drivers/serial/sh-sci.c')
-rw-r--r-- | drivers/serial/sh-sci.c | 947 |
1 files changed, 797 insertions, 150 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 403b01b382e2..251c08c55ae0 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) | 4 | * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) |
5 | * | 5 | * |
6 | * Copyright (C) 2002 - 2008 Paul Mundt | 6 | * Copyright (C) 2002 - 2011 Paul Mundt |
7 | * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007). | 7 | * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007). |
8 | * | 8 | * |
9 | * based off of the old drivers/char/sh-sci.c by: | 9 | * based off of the old drivers/char/sh-sci.c by: |
@@ -48,9 +48,11 @@ | |||
48 | #include <linux/ctype.h> | 48 | #include <linux/ctype.h> |
49 | #include <linux/err.h> | 49 | #include <linux/err.h> |
50 | #include <linux/list.h> | 50 | #include <linux/list.h> |
51 | #include <linux/dmaengine.h> | ||
52 | #include <linux/scatterlist.h> | ||
53 | #include <linux/slab.h> | ||
51 | 54 | ||
52 | #ifdef CONFIG_SUPERH | 55 | #ifdef CONFIG_SUPERH |
53 | #include <asm/clock.h> | ||
54 | #include <asm/sh_bios.h> | 56 | #include <asm/sh_bios.h> |
55 | #endif | 57 | #endif |
56 | 58 | ||
@@ -85,22 +87,42 @@ struct sci_port { | |||
85 | /* SCBRR calculation algo */ | 87 | /* SCBRR calculation algo */ |
86 | unsigned int scbrr_algo_id; | 88 | unsigned int scbrr_algo_id; |
87 | 89 | ||
88 | #ifdef CONFIG_HAVE_CLK | ||
89 | /* Interface clock */ | 90 | /* Interface clock */ |
90 | struct clk *iclk; | 91 | struct clk *iclk; |
91 | /* Data clock */ | 92 | /* Function clock */ |
92 | struct clk *dclk; | 93 | struct clk *fclk; |
93 | #endif | 94 | |
94 | struct list_head node; | 95 | struct list_head node; |
96 | |||
97 | struct dma_chan *chan_tx; | ||
98 | struct dma_chan *chan_rx; | ||
99 | |||
100 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
101 | struct device *dma_dev; | ||
102 | unsigned int slave_tx; | ||
103 | unsigned int slave_rx; | ||
104 | struct dma_async_tx_descriptor *desc_tx; | ||
105 | struct dma_async_tx_descriptor *desc_rx[2]; | ||
106 | dma_cookie_t cookie_tx; | ||
107 | dma_cookie_t cookie_rx[2]; | ||
108 | dma_cookie_t active_rx; | ||
109 | struct scatterlist sg_tx; | ||
110 | unsigned int sg_len_tx; | ||
111 | struct scatterlist sg_rx[2]; | ||
112 | size_t buf_len_rx; | ||
113 | struct sh_dmae_slave param_tx; | ||
114 | struct sh_dmae_slave param_rx; | ||
115 | struct work_struct work_tx; | ||
116 | struct work_struct work_rx; | ||
117 | struct timer_list rx_timer; | ||
118 | unsigned int rx_timeout; | ||
119 | #endif | ||
95 | }; | 120 | }; |
96 | 121 | ||
97 | struct sh_sci_priv { | 122 | struct sh_sci_priv { |
98 | spinlock_t lock; | 123 | spinlock_t lock; |
99 | struct list_head ports; | 124 | struct list_head ports; |
100 | |||
101 | #ifdef CONFIG_HAVE_CLK | ||
102 | struct notifier_block clk_nb; | 125 | struct notifier_block clk_nb; |
103 | #endif | ||
104 | }; | 126 | }; |
105 | 127 | ||
106 | /* Function prototypes */ | 128 | /* Function prototypes */ |
@@ -137,7 +159,11 @@ static int sci_poll_get_char(struct uart_port *port) | |||
137 | handle_error(port); | 159 | handle_error(port); |
138 | continue; | 160 | continue; |
139 | } | 161 | } |
140 | } while (!(status & SCxSR_RDxF(port))); | 162 | break; |
163 | } while (1); | ||
164 | |||
165 | if (!(status & SCxSR_RDxF(port))) | ||
166 | return NO_POLL_CHAR; | ||
141 | 167 | ||
142 | c = sci_in(port, SCxRDR); | 168 | c = sci_in(port, SCxRDR); |
143 | 169 | ||
@@ -162,32 +188,6 @@ static void sci_poll_put_char(struct uart_port *port, unsigned char c) | |||
162 | } | 188 | } |
163 | #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */ | 189 | #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */ |
164 | 190 | ||
165 | #if defined(__H8300S__) | ||
166 | enum { sci_disable, sci_enable }; | ||
167 | |||
168 | static void h8300_sci_config(struct uart_port *port, unsigned int ctrl) | ||
169 | { | ||
170 | volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL; | ||
171 | int ch = (port->mapbase - SMR0) >> 3; | ||
172 | unsigned char mask = 1 << (ch+1); | ||
173 | |||
174 | if (ctrl == sci_disable) | ||
175 | *mstpcrl |= mask; | ||
176 | else | ||
177 | *mstpcrl &= ~mask; | ||
178 | } | ||
179 | |||
180 | static void h8300_sci_enable(struct uart_port *port) | ||
181 | { | ||
182 | h8300_sci_config(port, sci_enable); | ||
183 | } | ||
184 | |||
185 | static void h8300_sci_disable(struct uart_port *port) | ||
186 | { | ||
187 | h8300_sci_config(port, sci_disable); | ||
188 | } | ||
189 | #endif | ||
190 | |||
191 | #if defined(__H8300H__) || defined(__H8300S__) | 191 | #if defined(__H8300H__) || defined(__H8300S__) |
192 | static void sci_init_pins(struct uart_port *port, unsigned int cflag) | 192 | static void sci_init_pins(struct uart_port *port, unsigned int cflag) |
193 | { | 193 | { |
@@ -259,9 +259,9 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | |||
259 | Set SCP6MD1,0 = {01} (output) */ | 259 | Set SCP6MD1,0 = {01} (output) */ |
260 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); | 260 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); |
261 | 261 | ||
262 | data = ctrl_inb(SCPDR); | 262 | data = __raw_readb(SCPDR); |
263 | /* Set /RTS2 (bit6) = 0 */ | 263 | /* Set /RTS2 (bit6) = 0 */ |
264 | ctrl_outb(data & 0xbf, SCPDR); | 264 | __raw_writeb(data & 0xbf, SCPDR); |
265 | } | 265 | } |
266 | } | 266 | } |
267 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 267 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
@@ -278,7 +278,8 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | |||
278 | __raw_writew(data, PSCR); | 278 | __raw_writew(data, PSCR); |
279 | } | 279 | } |
280 | } | 280 | } |
281 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | 281 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \ |
282 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | ||
282 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 283 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
283 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 284 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
284 | defined(CONFIG_CPU_SUBTYPE_SH7786) || \ | 285 | defined(CONFIG_CPU_SUBTYPE_SH7786) || \ |
@@ -305,29 +306,44 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | |||
305 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 306 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
306 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 307 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
307 | defined(CONFIG_CPU_SUBTYPE_SH7786) | 308 | defined(CONFIG_CPU_SUBTYPE_SH7786) |
308 | static inline int scif_txroom(struct uart_port *port) | 309 | static int scif_txfill(struct uart_port *port) |
310 | { | ||
311 | return sci_in(port, SCTFDR) & 0xff; | ||
312 | } | ||
313 | |||
314 | static int scif_txroom(struct uart_port *port) | ||
309 | { | 315 | { |
310 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); | 316 | return SCIF_TXROOM_MAX - scif_txfill(port); |
311 | } | 317 | } |
312 | 318 | ||
313 | static inline int scif_rxroom(struct uart_port *port) | 319 | static int scif_rxfill(struct uart_port *port) |
314 | { | 320 | { |
315 | return sci_in(port, SCRFDR) & 0xff; | 321 | return sci_in(port, SCRFDR) & 0xff; |
316 | } | 322 | } |
317 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | 323 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
318 | static inline int scif_txroom(struct uart_port *port) | 324 | static int scif_txfill(struct uart_port *port) |
319 | { | 325 | { |
320 | if ((port->mapbase == 0xffe00000) || | 326 | if (port->mapbase == 0xffe00000 || |
321 | (port->mapbase == 0xffe08000)) { | 327 | port->mapbase == 0xffe08000) |
322 | /* SCIF0/1*/ | 328 | /* SCIF0/1*/ |
323 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); | 329 | return sci_in(port, SCTFDR) & 0xff; |
324 | } else { | 330 | else |
325 | /* SCIF2 */ | 331 | /* SCIF2 */ |
326 | return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); | 332 | return sci_in(port, SCFDR) >> 8; |
327 | } | ||
328 | } | 333 | } |
329 | 334 | ||
330 | static inline int scif_rxroom(struct uart_port *port) | 335 | static int scif_txroom(struct uart_port *port) |
336 | { | ||
337 | if (port->mapbase == 0xffe00000 || | ||
338 | port->mapbase == 0xffe08000) | ||
339 | /* SCIF0/1*/ | ||
340 | return SCIF_TXROOM_MAX - scif_txfill(port); | ||
341 | else | ||
342 | /* SCIF2 */ | ||
343 | return SCIF2_TXROOM_MAX - scif_txfill(port); | ||
344 | } | ||
345 | |||
346 | static int scif_rxfill(struct uart_port *port) | ||
331 | { | 347 | { |
332 | if ((port->mapbase == 0xffe00000) || | 348 | if ((port->mapbase == 0xffe00000) || |
333 | (port->mapbase == 0xffe08000)) { | 349 | (port->mapbase == 0xffe08000)) { |
@@ -338,24 +354,55 @@ static inline int scif_rxroom(struct uart_port *port) | |||
338 | return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; | 354 | return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; |
339 | } | 355 | } |
340 | } | 356 | } |
357 | #elif defined(CONFIG_ARCH_SH7372) | ||
358 | static int scif_txfill(struct uart_port *port) | ||
359 | { | ||
360 | if (port->type == PORT_SCIFA) | ||
361 | return sci_in(port, SCFDR) >> 8; | ||
362 | else | ||
363 | return sci_in(port, SCTFDR); | ||
364 | } | ||
365 | |||
366 | static int scif_txroom(struct uart_port *port) | ||
367 | { | ||
368 | return port->fifosize - scif_txfill(port); | ||
369 | } | ||
370 | |||
371 | static int scif_rxfill(struct uart_port *port) | ||
372 | { | ||
373 | if (port->type == PORT_SCIFA) | ||
374 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; | ||
375 | else | ||
376 | return sci_in(port, SCRFDR); | ||
377 | } | ||
341 | #else | 378 | #else |
342 | static inline int scif_txroom(struct uart_port *port) | 379 | static int scif_txfill(struct uart_port *port) |
380 | { | ||
381 | return sci_in(port, SCFDR) >> 8; | ||
382 | } | ||
383 | |||
384 | static int scif_txroom(struct uart_port *port) | ||
343 | { | 385 | { |
344 | return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); | 386 | return SCIF_TXROOM_MAX - scif_txfill(port); |
345 | } | 387 | } |
346 | 388 | ||
347 | static inline int scif_rxroom(struct uart_port *port) | 389 | static int scif_rxfill(struct uart_port *port) |
348 | { | 390 | { |
349 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; | 391 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; |
350 | } | 392 | } |
351 | #endif | 393 | #endif |
352 | 394 | ||
353 | static inline int sci_txroom(struct uart_port *port) | 395 | static int sci_txfill(struct uart_port *port) |
354 | { | 396 | { |
355 | return (sci_in(port, SCxSR) & SCI_TDRE) != 0; | 397 | return !(sci_in(port, SCxSR) & SCI_TDRE); |
356 | } | 398 | } |
357 | 399 | ||
358 | static inline int sci_rxroom(struct uart_port *port) | 400 | static int sci_txroom(struct uart_port *port) |
401 | { | ||
402 | return !sci_txfill(port); | ||
403 | } | ||
404 | |||
405 | static int sci_rxfill(struct uart_port *port) | ||
359 | { | 406 | { |
360 | return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; | 407 | return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; |
361 | } | 408 | } |
@@ -366,7 +413,7 @@ static inline int sci_rxroom(struct uart_port *port) | |||
366 | 413 | ||
367 | static void sci_transmit_chars(struct uart_port *port) | 414 | static void sci_transmit_chars(struct uart_port *port) |
368 | { | 415 | { |
369 | struct circ_buf *xmit = &port->info->xmit; | 416 | struct circ_buf *xmit = &port->state->xmit; |
370 | unsigned int stopped = uart_tx_stopped(port); | 417 | unsigned int stopped = uart_tx_stopped(port); |
371 | unsigned short status; | 418 | unsigned short status; |
372 | unsigned short ctrl; | 419 | unsigned short ctrl; |
@@ -431,7 +478,7 @@ static void sci_transmit_chars(struct uart_port *port) | |||
431 | static inline void sci_receive_chars(struct uart_port *port) | 478 | static inline void sci_receive_chars(struct uart_port *port) |
432 | { | 479 | { |
433 | struct sci_port *sci_port = to_sci_port(port); | 480 | struct sci_port *sci_port = to_sci_port(port); |
434 | struct tty_struct *tty = port->info->port.tty; | 481 | struct tty_struct *tty = port->state->port.tty; |
435 | int i, count, copied = 0; | 482 | int i, count, copied = 0; |
436 | unsigned short status; | 483 | unsigned short status; |
437 | unsigned char flag; | 484 | unsigned char flag; |
@@ -442,9 +489,9 @@ static inline void sci_receive_chars(struct uart_port *port) | |||
442 | 489 | ||
443 | while (1) { | 490 | while (1) { |
444 | if (port->type == PORT_SCI) | 491 | if (port->type == PORT_SCI) |
445 | count = sci_rxroom(port); | 492 | count = sci_rxfill(port); |
446 | else | 493 | else |
447 | count = scif_rxroom(port); | 494 | count = scif_rxfill(port); |
448 | 495 | ||
449 | /* Don't copy more bytes than there is room for in the buffer */ | 496 | /* Don't copy more bytes than there is room for in the buffer */ |
450 | count = tty_buffer_request_room(tty, count); | 497 | count = tty_buffer_request_room(tty, count); |
@@ -489,10 +536,10 @@ static inline void sci_receive_chars(struct uart_port *port) | |||
489 | } | 536 | } |
490 | 537 | ||
491 | /* Store data and status */ | 538 | /* Store data and status */ |
492 | if (status&SCxSR_FER(port)) { | 539 | if (status & SCxSR_FER(port)) { |
493 | flag = TTY_FRAME; | 540 | flag = TTY_FRAME; |
494 | dev_notice(port->dev, "frame error\n"); | 541 | dev_notice(port->dev, "frame error\n"); |
495 | } else if (status&SCxSR_PER(port)) { | 542 | } else if (status & SCxSR_PER(port)) { |
496 | flag = TTY_PARITY; | 543 | flag = TTY_PARITY; |
497 | dev_notice(port->dev, "parity error\n"); | 544 | dev_notice(port->dev, "parity error\n"); |
498 | } else | 545 | } else |
@@ -551,7 +598,7 @@ static inline int sci_handle_errors(struct uart_port *port) | |||
551 | { | 598 | { |
552 | int copied = 0; | 599 | int copied = 0; |
553 | unsigned short status = sci_in(port, SCxSR); | 600 | unsigned short status = sci_in(port, SCxSR); |
554 | struct tty_struct *tty = port->info->port.tty; | 601 | struct tty_struct *tty = port->state->port.tty; |
555 | 602 | ||
556 | if (status & SCxSR_ORER(port)) { | 603 | if (status & SCxSR_ORER(port)) { |
557 | /* overrun error */ | 604 | /* overrun error */ |
@@ -605,7 +652,7 @@ static inline int sci_handle_errors(struct uart_port *port) | |||
605 | 652 | ||
606 | static inline int sci_handle_fifo_overrun(struct uart_port *port) | 653 | static inline int sci_handle_fifo_overrun(struct uart_port *port) |
607 | { | 654 | { |
608 | struct tty_struct *tty = port->info->port.tty; | 655 | struct tty_struct *tty = port->state->port.tty; |
609 | int copied = 0; | 656 | int copied = 0; |
610 | 657 | ||
611 | if (port->type != PORT_SCIF) | 658 | if (port->type != PORT_SCIF) |
@@ -628,7 +675,7 @@ static inline int sci_handle_breaks(struct uart_port *port) | |||
628 | { | 675 | { |
629 | int copied = 0; | 676 | int copied = 0; |
630 | unsigned short status = sci_in(port, SCxSR); | 677 | unsigned short status = sci_in(port, SCxSR); |
631 | struct tty_struct *tty = port->info->port.tty; | 678 | struct tty_struct *tty = port->state->port.tty; |
632 | struct sci_port *s = to_sci_port(port); | 679 | struct sci_port *s = to_sci_port(port); |
633 | 680 | ||
634 | if (uart_handle_break(port)) | 681 | if (uart_handle_break(port)) |
@@ -654,13 +701,39 @@ static inline int sci_handle_breaks(struct uart_port *port) | |||
654 | return copied; | 701 | return copied; |
655 | } | 702 | } |
656 | 703 | ||
657 | static irqreturn_t sci_rx_interrupt(int irq, void *port) | 704 | static irqreturn_t sci_rx_interrupt(int irq, void *ptr) |
658 | { | 705 | { |
706 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
707 | struct uart_port *port = ptr; | ||
708 | struct sci_port *s = to_sci_port(port); | ||
709 | |||
710 | if (s->chan_rx) { | ||
711 | u16 scr = sci_in(port, SCSCR); | ||
712 | u16 ssr = sci_in(port, SCxSR); | ||
713 | |||
714 | /* Disable future Rx interrupts */ | ||
715 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
716 | disable_irq_nosync(irq); | ||
717 | scr |= 0x4000; | ||
718 | } else { | ||
719 | scr &= ~SCSCR_RIE; | ||
720 | } | ||
721 | sci_out(port, SCSCR, scr); | ||
722 | /* Clear current interrupt */ | ||
723 | sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port))); | ||
724 | dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n", | ||
725 | jiffies, s->rx_timeout); | ||
726 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); | ||
727 | |||
728 | return IRQ_HANDLED; | ||
729 | } | ||
730 | #endif | ||
731 | |||
659 | /* I think sci_receive_chars has to be called irrespective | 732 | /* I think sci_receive_chars has to be called irrespective |
660 | * of whether the I_IXOFF is set, otherwise, how is the interrupt | 733 | * of whether the I_IXOFF is set, otherwise, how is the interrupt |
661 | * to be disabled? | 734 | * to be disabled? |
662 | */ | 735 | */ |
663 | sci_receive_chars(port); | 736 | sci_receive_chars(ptr); |
664 | 737 | ||
665 | return IRQ_HANDLED; | 738 | return IRQ_HANDLED; |
666 | } | 739 | } |
@@ -668,10 +741,11 @@ static irqreturn_t sci_rx_interrupt(int irq, void *port) | |||
668 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) | 741 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) |
669 | { | 742 | { |
670 | struct uart_port *port = ptr; | 743 | struct uart_port *port = ptr; |
744 | unsigned long flags; | ||
671 | 745 | ||
672 | spin_lock_irq(&port->lock); | 746 | spin_lock_irqsave(&port->lock, flags); |
673 | sci_transmit_chars(port); | 747 | sci_transmit_chars(port); |
674 | spin_unlock_irq(&port->lock); | 748 | spin_unlock_irqrestore(&port->lock, flags); |
675 | 749 | ||
676 | return IRQ_HANDLED; | 750 | return IRQ_HANDLED; |
677 | } | 751 | } |
@@ -711,32 +785,53 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr) | |||
711 | return IRQ_HANDLED; | 785 | return IRQ_HANDLED; |
712 | } | 786 | } |
713 | 787 | ||
788 | static inline unsigned long port_rx_irq_mask(struct uart_port *port) | ||
789 | { | ||
790 | /* | ||
791 | * Not all ports (such as SCIFA) will support REIE. Rather than | ||
792 | * special-casing the port type, we check the port initialization | ||
793 | * IRQ enable mask to see whether the IRQ is desired at all. If | ||
794 | * it's unset, it's logically inferred that there's no point in | ||
795 | * testing for it. | ||
796 | */ | ||
797 | return SCSCR_RIE | (to_sci_port(port)->scscr & SCSR_REIE); | ||
798 | } | ||
799 | |||
714 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) | 800 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) |
715 | { | 801 | { |
716 | unsigned short ssr_status, scr_status; | 802 | unsigned short ssr_status, scr_status, err_enabled; |
717 | struct uart_port *port = ptr; | 803 | struct uart_port *port = ptr; |
804 | struct sci_port *s = to_sci_port(port); | ||
718 | irqreturn_t ret = IRQ_NONE; | 805 | irqreturn_t ret = IRQ_NONE; |
719 | 806 | ||
720 | ssr_status = sci_in(port, SCxSR); | 807 | ssr_status = sci_in(port, SCxSR); |
721 | scr_status = sci_in(port, SCSCR); | 808 | scr_status = sci_in(port, SCSCR); |
809 | err_enabled = scr_status & port_rx_irq_mask(port); | ||
722 | 810 | ||
723 | /* Tx Interrupt */ | 811 | /* Tx Interrupt */ |
724 | if ((ssr_status & 0x0020) && (scr_status & SCSCR_TIE)) | 812 | if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCSCR_TIE) && |
813 | !s->chan_tx) | ||
725 | ret = sci_tx_interrupt(irq, ptr); | 814 | ret = sci_tx_interrupt(irq, ptr); |
726 | /* Rx Interrupt */ | 815 | |
727 | if ((ssr_status & 0x0002) && (scr_status & SCSCR_RIE)) | 816 | /* |
817 | * Rx Interrupt: if we're using DMA, the DMA controller clears RDF / | ||
818 | * DR flags | ||
819 | */ | ||
820 | if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) && | ||
821 | (scr_status & SCSCR_RIE)) | ||
728 | ret = sci_rx_interrupt(irq, ptr); | 822 | ret = sci_rx_interrupt(irq, ptr); |
823 | |||
729 | /* Error Interrupt */ | 824 | /* Error Interrupt */ |
730 | if ((ssr_status & 0x0080) && (scr_status & SCSCR_REIE)) | 825 | if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled) |
731 | ret = sci_er_interrupt(irq, ptr); | 826 | ret = sci_er_interrupt(irq, ptr); |
827 | |||
732 | /* Break Interrupt */ | 828 | /* Break Interrupt */ |
733 | if ((ssr_status & 0x0010) && (scr_status & SCSCR_REIE)) | 829 | if ((ssr_status & SCxSR_BRK(port)) && err_enabled) |
734 | ret = sci_br_interrupt(irq, ptr); | 830 | ret = sci_br_interrupt(irq, ptr); |
735 | 831 | ||
736 | return ret; | 832 | return ret; |
737 | } | 833 | } |
738 | 834 | ||
739 | #ifdef CONFIG_HAVE_CLK | ||
740 | /* | 835 | /* |
741 | * Here we define a transistion notifier so that we can update all of our | 836 | * Here we define a transistion notifier so that we can update all of our |
742 | * ports' baud rate when the peripheral clock changes. | 837 | * ports' baud rate when the peripheral clock changes. |
@@ -753,8 +848,7 @@ static int sci_notifier(struct notifier_block *self, | |||
753 | (phase == CPUFREQ_RESUMECHANGE)) { | 848 | (phase == CPUFREQ_RESUMECHANGE)) { |
754 | spin_lock_irqsave(&priv->lock, flags); | 849 | spin_lock_irqsave(&priv->lock, flags); |
755 | list_for_each_entry(sci_port, &priv->ports, node) | 850 | list_for_each_entry(sci_port, &priv->ports, node) |
756 | sci_port->port.uartclk = clk_get_rate(sci_port->dclk); | 851 | sci_port->port.uartclk = clk_get_rate(sci_port->iclk); |
757 | |||
758 | spin_unlock_irqrestore(&priv->lock, flags); | 852 | spin_unlock_irqrestore(&priv->lock, flags); |
759 | } | 853 | } |
760 | 854 | ||
@@ -765,23 +859,18 @@ static void sci_clk_enable(struct uart_port *port) | |||
765 | { | 859 | { |
766 | struct sci_port *sci_port = to_sci_port(port); | 860 | struct sci_port *sci_port = to_sci_port(port); |
767 | 861 | ||
768 | clk_enable(sci_port->dclk); | 862 | clk_enable(sci_port->iclk); |
769 | sci_port->port.uartclk = clk_get_rate(sci_port->dclk); | 863 | sci_port->port.uartclk = clk_get_rate(sci_port->iclk); |
770 | 864 | clk_enable(sci_port->fclk); | |
771 | if (sci_port->iclk) | ||
772 | clk_enable(sci_port->iclk); | ||
773 | } | 865 | } |
774 | 866 | ||
775 | static void sci_clk_disable(struct uart_port *port) | 867 | static void sci_clk_disable(struct uart_port *port) |
776 | { | 868 | { |
777 | struct sci_port *sci_port = to_sci_port(port); | 869 | struct sci_port *sci_port = to_sci_port(port); |
778 | 870 | ||
779 | if (sci_port->iclk) | 871 | clk_disable(sci_port->fclk); |
780 | clk_disable(sci_port->iclk); | 872 | clk_disable(sci_port->iclk); |
781 | |||
782 | clk_disable(sci_port->dclk); | ||
783 | } | 873 | } |
784 | #endif | ||
785 | 874 | ||
786 | static int sci_request_irq(struct sci_port *port) | 875 | static int sci_request_irq(struct sci_port *port) |
787 | { | 876 | { |
@@ -836,8 +925,10 @@ static void sci_free_irq(struct sci_port *port) | |||
836 | 925 | ||
837 | static unsigned int sci_tx_empty(struct uart_port *port) | 926 | static unsigned int sci_tx_empty(struct uart_port *port) |
838 | { | 927 | { |
839 | /* Can't detect */ | 928 | unsigned short status = sci_in(port, SCxSR); |
840 | return TIOCSER_TEMT; | 929 | unsigned short in_tx_fifo = scif_txfill(port); |
930 | |||
931 | return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0; | ||
841 | } | 932 | } |
842 | 933 | ||
843 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) | 934 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) |
@@ -849,20 +940,314 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) | |||
849 | 940 | ||
850 | static unsigned int sci_get_mctrl(struct uart_port *port) | 941 | static unsigned int sci_get_mctrl(struct uart_port *port) |
851 | { | 942 | { |
852 | /* This routine is used for geting signals of: DTR, DCD, DSR, RI, | 943 | /* This routine is used for getting signals of: DTR, DCD, DSR, RI, |
853 | and CTS/RTS */ | 944 | and CTS/RTS */ |
854 | 945 | ||
855 | return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; | 946 | return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; |
856 | } | 947 | } |
857 | 948 | ||
949 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
950 | static void sci_dma_tx_complete(void *arg) | ||
951 | { | ||
952 | struct sci_port *s = arg; | ||
953 | struct uart_port *port = &s->port; | ||
954 | struct circ_buf *xmit = &port->state->xmit; | ||
955 | unsigned long flags; | ||
956 | |||
957 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); | ||
958 | |||
959 | spin_lock_irqsave(&port->lock, flags); | ||
960 | |||
961 | xmit->tail += sg_dma_len(&s->sg_tx); | ||
962 | xmit->tail &= UART_XMIT_SIZE - 1; | ||
963 | |||
964 | port->icount.tx += sg_dma_len(&s->sg_tx); | ||
965 | |||
966 | async_tx_ack(s->desc_tx); | ||
967 | s->cookie_tx = -EINVAL; | ||
968 | s->desc_tx = NULL; | ||
969 | |||
970 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
971 | uart_write_wakeup(port); | ||
972 | |||
973 | if (!uart_circ_empty(xmit)) { | ||
974 | schedule_work(&s->work_tx); | ||
975 | } else if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
976 | u16 ctrl = sci_in(port, SCSCR); | ||
977 | sci_out(port, SCSCR, ctrl & ~SCSCR_TIE); | ||
978 | } | ||
979 | |||
980 | spin_unlock_irqrestore(&port->lock, flags); | ||
981 | } | ||
982 | |||
983 | /* Locking: called with port lock held */ | ||
984 | static int sci_dma_rx_push(struct sci_port *s, struct tty_struct *tty, | ||
985 | size_t count) | ||
986 | { | ||
987 | struct uart_port *port = &s->port; | ||
988 | int i, active, room; | ||
989 | |||
990 | room = tty_buffer_request_room(tty, count); | ||
991 | |||
992 | if (s->active_rx == s->cookie_rx[0]) { | ||
993 | active = 0; | ||
994 | } else if (s->active_rx == s->cookie_rx[1]) { | ||
995 | active = 1; | ||
996 | } else { | ||
997 | dev_err(port->dev, "cookie %d not found!\n", s->active_rx); | ||
998 | return 0; | ||
999 | } | ||
1000 | |||
1001 | if (room < count) | ||
1002 | dev_warn(port->dev, "Rx overrun: dropping %u bytes\n", | ||
1003 | count - room); | ||
1004 | if (!room) | ||
1005 | return room; | ||
1006 | |||
1007 | for (i = 0; i < room; i++) | ||
1008 | tty_insert_flip_char(tty, ((u8 *)sg_virt(&s->sg_rx[active]))[i], | ||
1009 | TTY_NORMAL); | ||
1010 | |||
1011 | port->icount.rx += room; | ||
1012 | |||
1013 | return room; | ||
1014 | } | ||
1015 | |||
1016 | static void sci_dma_rx_complete(void *arg) | ||
1017 | { | ||
1018 | struct sci_port *s = arg; | ||
1019 | struct uart_port *port = &s->port; | ||
1020 | struct tty_struct *tty = port->state->port.tty; | ||
1021 | unsigned long flags; | ||
1022 | int count; | ||
1023 | |||
1024 | dev_dbg(port->dev, "%s(%d) active #%d\n", __func__, port->line, s->active_rx); | ||
1025 | |||
1026 | spin_lock_irqsave(&port->lock, flags); | ||
1027 | |||
1028 | count = sci_dma_rx_push(s, tty, s->buf_len_rx); | ||
1029 | |||
1030 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); | ||
1031 | |||
1032 | spin_unlock_irqrestore(&port->lock, flags); | ||
1033 | |||
1034 | if (count) | ||
1035 | tty_flip_buffer_push(tty); | ||
1036 | |||
1037 | schedule_work(&s->work_rx); | ||
1038 | } | ||
1039 | |||
1040 | static void sci_start_rx(struct uart_port *port); | ||
1041 | static void sci_start_tx(struct uart_port *port); | ||
1042 | |||
1043 | static void sci_rx_dma_release(struct sci_port *s, bool enable_pio) | ||
1044 | { | ||
1045 | struct dma_chan *chan = s->chan_rx; | ||
1046 | struct uart_port *port = &s->port; | ||
1047 | |||
1048 | s->chan_rx = NULL; | ||
1049 | s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL; | ||
1050 | dma_release_channel(chan); | ||
1051 | if (sg_dma_address(&s->sg_rx[0])) | ||
1052 | dma_free_coherent(port->dev, s->buf_len_rx * 2, | ||
1053 | sg_virt(&s->sg_rx[0]), sg_dma_address(&s->sg_rx[0])); | ||
1054 | if (enable_pio) | ||
1055 | sci_start_rx(port); | ||
1056 | } | ||
1057 | |||
1058 | static void sci_tx_dma_release(struct sci_port *s, bool enable_pio) | ||
1059 | { | ||
1060 | struct dma_chan *chan = s->chan_tx; | ||
1061 | struct uart_port *port = &s->port; | ||
1062 | |||
1063 | s->chan_tx = NULL; | ||
1064 | s->cookie_tx = -EINVAL; | ||
1065 | dma_release_channel(chan); | ||
1066 | if (enable_pio) | ||
1067 | sci_start_tx(port); | ||
1068 | } | ||
1069 | |||
1070 | static void sci_submit_rx(struct sci_port *s) | ||
1071 | { | ||
1072 | struct dma_chan *chan = s->chan_rx; | ||
1073 | int i; | ||
1074 | |||
1075 | for (i = 0; i < 2; i++) { | ||
1076 | struct scatterlist *sg = &s->sg_rx[i]; | ||
1077 | struct dma_async_tx_descriptor *desc; | ||
1078 | |||
1079 | desc = chan->device->device_prep_slave_sg(chan, | ||
1080 | sg, 1, DMA_FROM_DEVICE, DMA_PREP_INTERRUPT); | ||
1081 | |||
1082 | if (desc) { | ||
1083 | s->desc_rx[i] = desc; | ||
1084 | desc->callback = sci_dma_rx_complete; | ||
1085 | desc->callback_param = s; | ||
1086 | s->cookie_rx[i] = desc->tx_submit(desc); | ||
1087 | } | ||
1088 | |||
1089 | if (!desc || s->cookie_rx[i] < 0) { | ||
1090 | if (i) { | ||
1091 | async_tx_ack(s->desc_rx[0]); | ||
1092 | s->cookie_rx[0] = -EINVAL; | ||
1093 | } | ||
1094 | if (desc) { | ||
1095 | async_tx_ack(desc); | ||
1096 | s->cookie_rx[i] = -EINVAL; | ||
1097 | } | ||
1098 | dev_warn(s->port.dev, | ||
1099 | "failed to re-start DMA, using PIO\n"); | ||
1100 | sci_rx_dma_release(s, true); | ||
1101 | return; | ||
1102 | } | ||
1103 | dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__, | ||
1104 | s->cookie_rx[i], i); | ||
1105 | } | ||
1106 | |||
1107 | s->active_rx = s->cookie_rx[0]; | ||
1108 | |||
1109 | dma_async_issue_pending(chan); | ||
1110 | } | ||
1111 | |||
1112 | static void work_fn_rx(struct work_struct *work) | ||
1113 | { | ||
1114 | struct sci_port *s = container_of(work, struct sci_port, work_rx); | ||
1115 | struct uart_port *port = &s->port; | ||
1116 | struct dma_async_tx_descriptor *desc; | ||
1117 | int new; | ||
1118 | |||
1119 | if (s->active_rx == s->cookie_rx[0]) { | ||
1120 | new = 0; | ||
1121 | } else if (s->active_rx == s->cookie_rx[1]) { | ||
1122 | new = 1; | ||
1123 | } else { | ||
1124 | dev_err(port->dev, "cookie %d not found!\n", s->active_rx); | ||
1125 | return; | ||
1126 | } | ||
1127 | desc = s->desc_rx[new]; | ||
1128 | |||
1129 | if (dma_async_is_tx_complete(s->chan_rx, s->active_rx, NULL, NULL) != | ||
1130 | DMA_SUCCESS) { | ||
1131 | /* Handle incomplete DMA receive */ | ||
1132 | struct tty_struct *tty = port->state->port.tty; | ||
1133 | struct dma_chan *chan = s->chan_rx; | ||
1134 | struct sh_desc *sh_desc = container_of(desc, struct sh_desc, | ||
1135 | async_tx); | ||
1136 | unsigned long flags; | ||
1137 | int count; | ||
1138 | |||
1139 | chan->device->device_control(chan, DMA_TERMINATE_ALL, 0); | ||
1140 | dev_dbg(port->dev, "Read %u bytes with cookie %d\n", | ||
1141 | sh_desc->partial, sh_desc->cookie); | ||
1142 | |||
1143 | spin_lock_irqsave(&port->lock, flags); | ||
1144 | count = sci_dma_rx_push(s, tty, sh_desc->partial); | ||
1145 | spin_unlock_irqrestore(&port->lock, flags); | ||
1146 | |||
1147 | if (count) | ||
1148 | tty_flip_buffer_push(tty); | ||
1149 | |||
1150 | sci_submit_rx(s); | ||
1151 | |||
1152 | return; | ||
1153 | } | ||
1154 | |||
1155 | s->cookie_rx[new] = desc->tx_submit(desc); | ||
1156 | if (s->cookie_rx[new] < 0) { | ||
1157 | dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); | ||
1158 | sci_rx_dma_release(s, true); | ||
1159 | return; | ||
1160 | } | ||
1161 | |||
1162 | s->active_rx = s->cookie_rx[!new]; | ||
1163 | |||
1164 | dev_dbg(port->dev, "%s: cookie %d #%d, new active #%d\n", __func__, | ||
1165 | s->cookie_rx[new], new, s->active_rx); | ||
1166 | } | ||
1167 | |||
1168 | static void work_fn_tx(struct work_struct *work) | ||
1169 | { | ||
1170 | struct sci_port *s = container_of(work, struct sci_port, work_tx); | ||
1171 | struct dma_async_tx_descriptor *desc; | ||
1172 | struct dma_chan *chan = s->chan_tx; | ||
1173 | struct uart_port *port = &s->port; | ||
1174 | struct circ_buf *xmit = &port->state->xmit; | ||
1175 | struct scatterlist *sg = &s->sg_tx; | ||
1176 | |||
1177 | /* | ||
1178 | * DMA is idle now. | ||
1179 | * Port xmit buffer is already mapped, and it is one page... Just adjust | ||
1180 | * offsets and lengths. Since it is a circular buffer, we have to | ||
1181 | * transmit till the end, and then the rest. Take the port lock to get a | ||
1182 | * consistent xmit buffer state. | ||
1183 | */ | ||
1184 | spin_lock_irq(&port->lock); | ||
1185 | sg->offset = xmit->tail & (UART_XMIT_SIZE - 1); | ||
1186 | sg_dma_address(sg) = (sg_dma_address(sg) & ~(UART_XMIT_SIZE - 1)) + | ||
1187 | sg->offset; | ||
1188 | sg_dma_len(sg) = min((int)CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE), | ||
1189 | CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE)); | ||
1190 | spin_unlock_irq(&port->lock); | ||
1191 | |||
1192 | BUG_ON(!sg_dma_len(sg)); | ||
1193 | |||
1194 | desc = chan->device->device_prep_slave_sg(chan, | ||
1195 | sg, s->sg_len_tx, DMA_TO_DEVICE, | ||
1196 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | ||
1197 | if (!desc) { | ||
1198 | /* switch to PIO */ | ||
1199 | sci_tx_dma_release(s, true); | ||
1200 | return; | ||
1201 | } | ||
1202 | |||
1203 | dma_sync_sg_for_device(port->dev, sg, 1, DMA_TO_DEVICE); | ||
1204 | |||
1205 | spin_lock_irq(&port->lock); | ||
1206 | s->desc_tx = desc; | ||
1207 | desc->callback = sci_dma_tx_complete; | ||
1208 | desc->callback_param = s; | ||
1209 | spin_unlock_irq(&port->lock); | ||
1210 | s->cookie_tx = desc->tx_submit(desc); | ||
1211 | if (s->cookie_tx < 0) { | ||
1212 | dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n"); | ||
1213 | /* switch to PIO */ | ||
1214 | sci_tx_dma_release(s, true); | ||
1215 | return; | ||
1216 | } | ||
1217 | |||
1218 | dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", __func__, | ||
1219 | xmit->buf, xmit->tail, xmit->head, s->cookie_tx); | ||
1220 | |||
1221 | dma_async_issue_pending(chan); | ||
1222 | } | ||
1223 | #endif | ||
1224 | |||
858 | static void sci_start_tx(struct uart_port *port) | 1225 | static void sci_start_tx(struct uart_port *port) |
859 | { | 1226 | { |
1227 | struct sci_port *s = to_sci_port(port); | ||
860 | unsigned short ctrl; | 1228 | unsigned short ctrl; |
861 | 1229 | ||
862 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ | 1230 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
863 | ctrl = sci_in(port, SCSCR); | 1231 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { |
864 | ctrl |= SCSCR_TIE; | 1232 | u16 new, scr = sci_in(port, SCSCR); |
865 | sci_out(port, SCSCR, ctrl); | 1233 | if (s->chan_tx) |
1234 | new = scr | 0x8000; | ||
1235 | else | ||
1236 | new = scr & ~0x8000; | ||
1237 | if (new != scr) | ||
1238 | sci_out(port, SCSCR, new); | ||
1239 | } | ||
1240 | |||
1241 | if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && | ||
1242 | s->cookie_tx < 0) | ||
1243 | schedule_work(&s->work_tx); | ||
1244 | #endif | ||
1245 | |||
1246 | if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
1247 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ | ||
1248 | ctrl = sci_in(port, SCSCR); | ||
1249 | sci_out(port, SCSCR, ctrl | SCSCR_TIE); | ||
1250 | } | ||
866 | } | 1251 | } |
867 | 1252 | ||
868 | static void sci_stop_tx(struct uart_port *port) | 1253 | static void sci_stop_tx(struct uart_port *port) |
@@ -871,17 +1256,24 @@ static void sci_stop_tx(struct uart_port *port) | |||
871 | 1256 | ||
872 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ | 1257 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ |
873 | ctrl = sci_in(port, SCSCR); | 1258 | ctrl = sci_in(port, SCSCR); |
1259 | |||
1260 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
1261 | ctrl &= ~0x8000; | ||
1262 | |||
874 | ctrl &= ~SCSCR_TIE; | 1263 | ctrl &= ~SCSCR_TIE; |
1264 | |||
875 | sci_out(port, SCSCR, ctrl); | 1265 | sci_out(port, SCSCR, ctrl); |
876 | } | 1266 | } |
877 | 1267 | ||
878 | static void sci_start_rx(struct uart_port *port, unsigned int tty_start) | 1268 | static void sci_start_rx(struct uart_port *port) |
879 | { | 1269 | { |
880 | unsigned short ctrl; | 1270 | unsigned short ctrl; |
881 | 1271 | ||
882 | /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ | 1272 | ctrl = sci_in(port, SCSCR) | port_rx_irq_mask(port); |
883 | ctrl = sci_in(port, SCSCR); | 1273 | |
884 | ctrl |= SCSCR_RIE | SCSCR_REIE; | 1274 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) |
1275 | ctrl &= ~0x4000; | ||
1276 | |||
885 | sci_out(port, SCSCR, ctrl); | 1277 | sci_out(port, SCSCR, ctrl); |
886 | } | 1278 | } |
887 | 1279 | ||
@@ -889,9 +1281,13 @@ static void sci_stop_rx(struct uart_port *port) | |||
889 | { | 1281 | { |
890 | unsigned short ctrl; | 1282 | unsigned short ctrl; |
891 | 1283 | ||
892 | /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ | ||
893 | ctrl = sci_in(port, SCSCR); | 1284 | ctrl = sci_in(port, SCSCR); |
894 | ctrl &= ~(SCSCR_RIE | SCSCR_REIE); | 1285 | |
1286 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) | ||
1287 | ctrl &= ~0x4000; | ||
1288 | |||
1289 | ctrl &= ~port_rx_irq_mask(port); | ||
1290 | |||
895 | sci_out(port, SCSCR, ctrl); | 1291 | sci_out(port, SCSCR, ctrl); |
896 | } | 1292 | } |
897 | 1293 | ||
@@ -905,16 +1301,157 @@ static void sci_break_ctl(struct uart_port *port, int break_state) | |||
905 | /* Nothing here yet .. */ | 1301 | /* Nothing here yet .. */ |
906 | } | 1302 | } |
907 | 1303 | ||
1304 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
1305 | static bool filter(struct dma_chan *chan, void *slave) | ||
1306 | { | ||
1307 | struct sh_dmae_slave *param = slave; | ||
1308 | |||
1309 | dev_dbg(chan->device->dev, "%s: slave ID %d\n", __func__, | ||
1310 | param->slave_id); | ||
1311 | |||
1312 | if (param->dma_dev == chan->device->dev) { | ||
1313 | chan->private = param; | ||
1314 | return true; | ||
1315 | } else { | ||
1316 | return false; | ||
1317 | } | ||
1318 | } | ||
1319 | |||
1320 | static void rx_timer_fn(unsigned long arg) | ||
1321 | { | ||
1322 | struct sci_port *s = (struct sci_port *)arg; | ||
1323 | struct uart_port *port = &s->port; | ||
1324 | u16 scr = sci_in(port, SCSCR); | ||
1325 | |||
1326 | if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { | ||
1327 | scr &= ~0x4000; | ||
1328 | enable_irq(s->irqs[1]); | ||
1329 | } | ||
1330 | sci_out(port, SCSCR, scr | SCSCR_RIE); | ||
1331 | dev_dbg(port->dev, "DMA Rx timed out\n"); | ||
1332 | schedule_work(&s->work_rx); | ||
1333 | } | ||
1334 | |||
1335 | static void sci_request_dma(struct uart_port *port) | ||
1336 | { | ||
1337 | struct sci_port *s = to_sci_port(port); | ||
1338 | struct sh_dmae_slave *param; | ||
1339 | struct dma_chan *chan; | ||
1340 | dma_cap_mask_t mask; | ||
1341 | int nent; | ||
1342 | |||
1343 | dev_dbg(port->dev, "%s: port %d DMA %p\n", __func__, | ||
1344 | port->line, s->dma_dev); | ||
1345 | |||
1346 | if (!s->dma_dev) | ||
1347 | return; | ||
1348 | |||
1349 | dma_cap_zero(mask); | ||
1350 | dma_cap_set(DMA_SLAVE, mask); | ||
1351 | |||
1352 | param = &s->param_tx; | ||
1353 | |||
1354 | /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_TX */ | ||
1355 | param->slave_id = s->slave_tx; | ||
1356 | param->dma_dev = s->dma_dev; | ||
1357 | |||
1358 | s->cookie_tx = -EINVAL; | ||
1359 | chan = dma_request_channel(mask, filter, param); | ||
1360 | dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); | ||
1361 | if (chan) { | ||
1362 | s->chan_tx = chan; | ||
1363 | sg_init_table(&s->sg_tx, 1); | ||
1364 | /* UART circular tx buffer is an aligned page. */ | ||
1365 | BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK); | ||
1366 | sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf), | ||
1367 | UART_XMIT_SIZE, (int)port->state->xmit.buf & ~PAGE_MASK); | ||
1368 | nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE); | ||
1369 | if (!nent) | ||
1370 | sci_tx_dma_release(s, false); | ||
1371 | else | ||
1372 | dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__, | ||
1373 | sg_dma_len(&s->sg_tx), | ||
1374 | port->state->xmit.buf, sg_dma_address(&s->sg_tx)); | ||
1375 | |||
1376 | s->sg_len_tx = nent; | ||
1377 | |||
1378 | INIT_WORK(&s->work_tx, work_fn_tx); | ||
1379 | } | ||
1380 | |||
1381 | param = &s->param_rx; | ||
1382 | |||
1383 | /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_RX */ | ||
1384 | param->slave_id = s->slave_rx; | ||
1385 | param->dma_dev = s->dma_dev; | ||
1386 | |||
1387 | chan = dma_request_channel(mask, filter, param); | ||
1388 | dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); | ||
1389 | if (chan) { | ||
1390 | dma_addr_t dma[2]; | ||
1391 | void *buf[2]; | ||
1392 | int i; | ||
1393 | |||
1394 | s->chan_rx = chan; | ||
1395 | |||
1396 | s->buf_len_rx = 2 * max(16, (int)port->fifosize); | ||
1397 | buf[0] = dma_alloc_coherent(port->dev, s->buf_len_rx * 2, | ||
1398 | &dma[0], GFP_KERNEL); | ||
1399 | |||
1400 | if (!buf[0]) { | ||
1401 | dev_warn(port->dev, | ||
1402 | "failed to allocate dma buffer, using PIO\n"); | ||
1403 | sci_rx_dma_release(s, true); | ||
1404 | return; | ||
1405 | } | ||
1406 | |||
1407 | buf[1] = buf[0] + s->buf_len_rx; | ||
1408 | dma[1] = dma[0] + s->buf_len_rx; | ||
1409 | |||
1410 | for (i = 0; i < 2; i++) { | ||
1411 | struct scatterlist *sg = &s->sg_rx[i]; | ||
1412 | |||
1413 | sg_init_table(sg, 1); | ||
1414 | sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx, | ||
1415 | (int)buf[i] & ~PAGE_MASK); | ||
1416 | sg_dma_address(sg) = dma[i]; | ||
1417 | } | ||
1418 | |||
1419 | INIT_WORK(&s->work_rx, work_fn_rx); | ||
1420 | setup_timer(&s->rx_timer, rx_timer_fn, (unsigned long)s); | ||
1421 | |||
1422 | sci_submit_rx(s); | ||
1423 | } | ||
1424 | } | ||
1425 | |||
1426 | static void sci_free_dma(struct uart_port *port) | ||
1427 | { | ||
1428 | struct sci_port *s = to_sci_port(port); | ||
1429 | |||
1430 | if (!s->dma_dev) | ||
1431 | return; | ||
1432 | |||
1433 | if (s->chan_tx) | ||
1434 | sci_tx_dma_release(s, false); | ||
1435 | if (s->chan_rx) | ||
1436 | sci_rx_dma_release(s, false); | ||
1437 | } | ||
1438 | #endif | ||
1439 | |||
908 | static int sci_startup(struct uart_port *port) | 1440 | static int sci_startup(struct uart_port *port) |
909 | { | 1441 | { |
910 | struct sci_port *s = to_sci_port(port); | 1442 | struct sci_port *s = to_sci_port(port); |
911 | 1443 | ||
1444 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); | ||
1445 | |||
912 | if (s->enable) | 1446 | if (s->enable) |
913 | s->enable(port); | 1447 | s->enable(port); |
914 | 1448 | ||
915 | sci_request_irq(s); | 1449 | sci_request_irq(s); |
1450 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
1451 | sci_request_dma(port); | ||
1452 | #endif | ||
916 | sci_start_tx(port); | 1453 | sci_start_tx(port); |
917 | sci_start_rx(port, 1); | 1454 | sci_start_rx(port); |
918 | 1455 | ||
919 | return 0; | 1456 | return 0; |
920 | } | 1457 | } |
@@ -923,8 +1460,13 @@ static void sci_shutdown(struct uart_port *port) | |||
923 | { | 1460 | { |
924 | struct sci_port *s = to_sci_port(port); | 1461 | struct sci_port *s = to_sci_port(port); |
925 | 1462 | ||
1463 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); | ||
1464 | |||
926 | sci_stop_rx(port); | 1465 | sci_stop_rx(port); |
927 | sci_stop_tx(port); | 1466 | sci_stop_tx(port); |
1467 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
1468 | sci_free_dma(port); | ||
1469 | #endif | ||
928 | sci_free_irq(s); | 1470 | sci_free_irq(s); |
929 | 1471 | ||
930 | if (s->disable) | 1472 | if (s->disable) |
@@ -956,11 +1498,22 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
956 | struct ktermios *old) | 1498 | struct ktermios *old) |
957 | { | 1499 | { |
958 | struct sci_port *s = to_sci_port(port); | 1500 | struct sci_port *s = to_sci_port(port); |
959 | unsigned int status, baud, smr_val; | 1501 | unsigned int status, baud, smr_val, max_baud; |
960 | int t = -1; | 1502 | int t = -1; |
1503 | u16 scfcr = 0; | ||
1504 | |||
1505 | /* | ||
1506 | * earlyprintk comes here early on with port->uartclk set to zero. | ||
1507 | * the clock framework is not up and running at this point so here | ||
1508 | * we assume that 115200 is the maximum baud rate. please note that | ||
1509 | * the baud rate is not programmed during earlyprintk - it is assumed | ||
1510 | * that the previous boot loader has enabled required clocks and | ||
1511 | * setup the baud rate generator hardware for us already. | ||
1512 | */ | ||
1513 | max_baud = port->uartclk ? port->uartclk / 16 : 115200; | ||
961 | 1514 | ||
962 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | 1515 | baud = uart_get_baud_rate(port, termios, old, 0, max_baud); |
963 | if (likely(baud)) | 1516 | if (likely(baud && port->uartclk)) |
964 | t = sci_scbrr_calc(s->scbrr_algo_id, baud, port->uartclk); | 1517 | t = sci_scbrr_calc(s->scbrr_algo_id, baud, port->uartclk); |
965 | 1518 | ||
966 | do { | 1519 | do { |
@@ -970,7 +1523,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
970 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ | 1523 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ |
971 | 1524 | ||
972 | if (port->type != PORT_SCI) | 1525 | if (port->type != PORT_SCI) |
973 | sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); | 1526 | sci_out(port, SCFCR, scfcr | SCFCR_RFRST | SCFCR_TFRST); |
974 | 1527 | ||
975 | smr_val = sci_in(port, SCSMR) & 3; | 1528 | smr_val = sci_in(port, SCSMR) & 3; |
976 | if ((termios->c_cflag & CSIZE) == CS7) | 1529 | if ((termios->c_cflag & CSIZE) == CS7) |
@@ -986,6 +1539,9 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
986 | 1539 | ||
987 | sci_out(port, SCSMR, smr_val); | 1540 | sci_out(port, SCSMR, smr_val); |
988 | 1541 | ||
1542 | dev_dbg(port->dev, "%s: SMR %x, t %x, SCSCR %x\n", __func__, smr_val, t, | ||
1543 | SCSCR_INIT(port)); | ||
1544 | |||
989 | if (t > 0) { | 1545 | if (t > 0) { |
990 | if (t >= 256) { | 1546 | if (t >= 256) { |
991 | sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); | 1547 | sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); |
@@ -998,12 +1554,34 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
998 | } | 1554 | } |
999 | 1555 | ||
1000 | sci_init_pins(port, termios->c_cflag); | 1556 | sci_init_pins(port, termios->c_cflag); |
1001 | sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0); | 1557 | sci_out(port, SCFCR, scfcr | ((termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0)); |
1002 | 1558 | ||
1003 | sci_out(port, SCSCR, s->scscr); | 1559 | sci_out(port, SCSCR, s->scscr); |
1004 | 1560 | ||
1561 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
1562 | /* | ||
1563 | * Calculate delay for 1.5 DMA buffers: see | ||
1564 | * drivers/serial/serial_core.c::uart_update_timeout(). With 10 bits | ||
1565 | * (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above function | ||
1566 | * calculates 1 jiffie for the data plus 5 jiffies for the "slop(e)." | ||
1567 | * Then below we calculate 3 jiffies (12ms) for 1.5 DMA buffers (3 FIFO | ||
1568 | * sizes), but it has been found out experimentally, that this is not | ||
1569 | * enough: the driver too often needlessly runs on a DMA timeout. 20ms | ||
1570 | * as a minimum seem to work perfectly. | ||
1571 | */ | ||
1572 | if (s->chan_rx) { | ||
1573 | s->rx_timeout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 / | ||
1574 | port->fifosize / 2; | ||
1575 | dev_dbg(port->dev, | ||
1576 | "DMA Rx t-out %ums, tty t-out %u jiffies\n", | ||
1577 | s->rx_timeout * 1000 / HZ, port->timeout); | ||
1578 | if (s->rx_timeout < msecs_to_jiffies(20)) | ||
1579 | s->rx_timeout = msecs_to_jiffies(20); | ||
1580 | } | ||
1581 | #endif | ||
1582 | |||
1005 | if ((termios->c_cflag & CREAD) != 0) | 1583 | if ((termios->c_cflag & CREAD) != 0) |
1006 | sci_start_rx(port, 0); | 1584 | sci_start_rx(port); |
1007 | } | 1585 | } |
1008 | 1586 | ||
1009 | static const char *sci_type(struct uart_port *port) | 1587 | static const char *sci_type(struct uart_port *port) |
@@ -1017,6 +1595,8 @@ static const char *sci_type(struct uart_port *port) | |||
1017 | return "scif"; | 1595 | return "scif"; |
1018 | case PORT_SCIFA: | 1596 | case PORT_SCIFA: |
1019 | return "scifa"; | 1597 | return "scifa"; |
1598 | case PORT_SCIFB: | ||
1599 | return "scifb"; | ||
1020 | } | 1600 | } |
1021 | 1601 | ||
1022 | return NULL; | 1602 | return NULL; |
@@ -1093,45 +1673,79 @@ static struct uart_ops sci_uart_ops = { | |||
1093 | #endif | 1673 | #endif |
1094 | }; | 1674 | }; |
1095 | 1675 | ||
1096 | static void __devinit sci_init_single(struct platform_device *dev, | 1676 | static int __devinit sci_init_single(struct platform_device *dev, |
1097 | struct sci_port *sci_port, | 1677 | struct sci_port *sci_port, |
1098 | unsigned int index, | 1678 | unsigned int index, |
1099 | struct plat_sci_port *p) | 1679 | struct plat_sci_port *p) |
1100 | { | 1680 | { |
1101 | sci_port->port.ops = &sci_uart_ops; | 1681 | struct uart_port *port = &sci_port->port; |
1102 | sci_port->port.iotype = UPIO_MEM; | ||
1103 | sci_port->port.line = index; | ||
1104 | sci_port->port.fifosize = 1; | ||
1105 | 1682 | ||
1106 | #if defined(__H8300H__) || defined(__H8300S__) | 1683 | port->ops = &sci_uart_ops; |
1107 | #ifdef __H8300S__ | 1684 | port->iotype = UPIO_MEM; |
1108 | sci_port->enable = h8300_sci_enable; | 1685 | port->line = index; |
1109 | sci_port->disable = h8300_sci_disable; | 1686 | |
1110 | #endif | 1687 | switch (p->type) { |
1111 | sci_port->port.uartclk = CONFIG_CPU_CLOCK; | 1688 | case PORT_SCIFB: |
1112 | #elif defined(CONFIG_HAVE_CLK) | 1689 | port->fifosize = 256; |
1113 | sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL; | 1690 | break; |
1114 | sci_port->dclk = clk_get(&dev->dev, "peripheral_clk"); | 1691 | case PORT_SCIFA: |
1115 | sci_port->enable = sci_clk_enable; | 1692 | port->fifosize = 64; |
1116 | sci_port->disable = sci_clk_disable; | 1693 | break; |
1117 | #else | 1694 | case PORT_SCIF: |
1118 | #error "Need a valid uartclk" | 1695 | port->fifosize = 16; |
1119 | #endif | 1696 | break; |
1697 | default: | ||
1698 | port->fifosize = 1; | ||
1699 | break; | ||
1700 | } | ||
1701 | |||
1702 | if (dev) { | ||
1703 | sci_port->iclk = clk_get(&dev->dev, "sci_ick"); | ||
1704 | if (IS_ERR(sci_port->iclk)) { | ||
1705 | sci_port->iclk = clk_get(&dev->dev, "peripheral_clk"); | ||
1706 | if (IS_ERR(sci_port->iclk)) { | ||
1707 | dev_err(&dev->dev, "can't get iclk\n"); | ||
1708 | return PTR_ERR(sci_port->iclk); | ||
1709 | } | ||
1710 | } | ||
1711 | |||
1712 | /* | ||
1713 | * The function clock is optional, ignore it if we can't | ||
1714 | * find it. | ||
1715 | */ | ||
1716 | sci_port->fclk = clk_get(&dev->dev, "sci_fck"); | ||
1717 | if (IS_ERR(sci_port->fclk)) | ||
1718 | sci_port->fclk = NULL; | ||
1719 | |||
1720 | sci_port->enable = sci_clk_enable; | ||
1721 | sci_port->disable = sci_clk_disable; | ||
1722 | port->dev = &dev->dev; | ||
1723 | } | ||
1120 | 1724 | ||
1121 | sci_port->break_timer.data = (unsigned long)sci_port; | 1725 | sci_port->break_timer.data = (unsigned long)sci_port; |
1122 | sci_port->break_timer.function = sci_break_timer; | 1726 | sci_port->break_timer.function = sci_break_timer; |
1123 | init_timer(&sci_port->break_timer); | 1727 | init_timer(&sci_port->break_timer); |
1124 | 1728 | ||
1125 | sci_port->port.mapbase = p->mapbase; | 1729 | port->mapbase = p->mapbase; |
1126 | sci_port->port.membase = p->membase; | 1730 | port->membase = p->membase; |
1127 | 1731 | ||
1732 | port->irq = p->irqs[SCIx_TXI_IRQ]; | ||
1733 | port->flags = p->flags; | ||
1734 | sci_port->type = port->type = p->type; | ||
1128 | sci_port->scscr = p->scscr; | 1735 | sci_port->scscr = p->scscr; |
1129 | sci_port->port.irq = p->irqs[SCIx_TXI_IRQ]; | 1736 | sci_port->scbrr_algo_id = p->scbrr_algo_id; |
1130 | sci_port->port.flags = p->flags; | 1737 | |
1131 | sci_port->port.dev = &dev->dev; | 1738 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
1132 | sci_port->type = sci_port->port.type = p->type; | 1739 | sci_port->dma_dev = p->dma_dev; |
1740 | sci_port->slave_tx = p->dma_slave_tx; | ||
1741 | sci_port->slave_rx = p->dma_slave_rx; | ||
1742 | |||
1743 | dev_dbg(port->dev, "%s: DMA device %p, tx %d, rx %d\n", __func__, | ||
1744 | p->dma_dev, p->dma_slave_tx, p->dma_slave_rx); | ||
1745 | #endif | ||
1133 | 1746 | ||
1134 | memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); | 1747 | memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); |
1748 | return 0; | ||
1135 | } | 1749 | } |
1136 | 1750 | ||
1137 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | 1751 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
@@ -1168,11 +1782,11 @@ static void serial_console_write(struct console *co, const char *s, | |||
1168 | while ((sci_in(port, SCxSR) & bits) != bits) | 1782 | while ((sci_in(port, SCxSR) & bits) != bits) |
1169 | cpu_relax(); | 1783 | cpu_relax(); |
1170 | 1784 | ||
1171 | if (sci_port->disable); | 1785 | if (sci_port->disable) |
1172 | sci_port->disable(port); | 1786 | sci_port->disable(port); |
1173 | } | 1787 | } |
1174 | 1788 | ||
1175 | static int __init serial_console_setup(struct console *co, char *options) | 1789 | static int __devinit serial_console_setup(struct console *co, char *options) |
1176 | { | 1790 | { |
1177 | struct sci_port *sci_port; | 1791 | struct sci_port *sci_port; |
1178 | struct uart_port *port; | 1792 | struct uart_port *port; |
@@ -1190,9 +1804,14 @@ static int __init serial_console_setup(struct console *co, char *options) | |||
1190 | if (co->index >= SCI_NPORTS) | 1804 | if (co->index >= SCI_NPORTS) |
1191 | co->index = 0; | 1805 | co->index = 0; |
1192 | 1806 | ||
1193 | sci_port = &sci_ports[co->index]; | 1807 | if (co->data) { |
1194 | port = &sci_port->port; | 1808 | port = co->data; |
1195 | co->data = port; | 1809 | sci_port = to_sci_port(port); |
1810 | } else { | ||
1811 | sci_port = &sci_ports[co->index]; | ||
1812 | port = &sci_port->port; | ||
1813 | co->data = port; | ||
1814 | } | ||
1196 | 1815 | ||
1197 | /* | 1816 | /* |
1198 | * Also need to check port->type, we don't actually have any | 1817 | * Also need to check port->type, we don't actually have any |
@@ -1236,6 +1855,15 @@ static int __init sci_console_init(void) | |||
1236 | return 0; | 1855 | return 0; |
1237 | } | 1856 | } |
1238 | console_initcall(sci_console_init); | 1857 | console_initcall(sci_console_init); |
1858 | |||
1859 | static struct sci_port early_serial_port; | ||
1860 | static struct console early_serial_console = { | ||
1861 | .name = "early_ttySC", | ||
1862 | .write = serial_console_write, | ||
1863 | .flags = CON_PRINTBUFFER, | ||
1864 | }; | ||
1865 | static char early_serial_buf[32]; | ||
1866 | |||
1239 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | 1867 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ |
1240 | 1868 | ||
1241 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) | 1869 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) |
@@ -1264,14 +1892,14 @@ static int sci_remove(struct platform_device *dev) | |||
1264 | struct sci_port *p; | 1892 | struct sci_port *p; |
1265 | unsigned long flags; | 1893 | unsigned long flags; |
1266 | 1894 | ||
1267 | #ifdef CONFIG_HAVE_CLK | ||
1268 | cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); | 1895 | cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); |
1269 | #endif | ||
1270 | 1896 | ||
1271 | spin_lock_irqsave(&priv->lock, flags); | 1897 | spin_lock_irqsave(&priv->lock, flags); |
1272 | list_for_each_entry(p, &priv->ports, node) | 1898 | list_for_each_entry(p, &priv->ports, node) { |
1273 | uart_remove_one_port(&sci_uart_driver, &p->port); | 1899 | uart_remove_one_port(&sci_uart_driver, &p->port); |
1274 | 1900 | clk_put(p->iclk); | |
1901 | clk_put(p->fclk); | ||
1902 | } | ||
1275 | spin_unlock_irqrestore(&priv->lock, flags); | 1903 | spin_unlock_irqrestore(&priv->lock, flags); |
1276 | 1904 | ||
1277 | kfree(priv); | 1905 | kfree(priv); |
@@ -1297,7 +1925,9 @@ static int __devinit sci_probe_single(struct platform_device *dev, | |||
1297 | return 0; | 1925 | return 0; |
1298 | } | 1926 | } |
1299 | 1927 | ||
1300 | sci_init_single(dev, sciport, index, p); | 1928 | ret = sci_init_single(dev, sciport, index, p); |
1929 | if (ret) | ||
1930 | return ret; | ||
1301 | 1931 | ||
1302 | ret = uart_add_one_port(&sci_uart_driver, &sciport->port); | 1932 | ret = uart_add_one_port(&sci_uart_driver, &sciport->port); |
1303 | if (ret) | 1933 | if (ret) |
@@ -1324,6 +1954,21 @@ static int __devinit sci_probe(struct platform_device *dev) | |||
1324 | struct sh_sci_priv *priv; | 1954 | struct sh_sci_priv *priv; |
1325 | int i, ret = -EINVAL; | 1955 | int i, ret = -EINVAL; |
1326 | 1956 | ||
1957 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | ||
1958 | if (is_early_platform_device(dev)) { | ||
1959 | if (dev->id == -1) | ||
1960 | return -ENOTSUPP; | ||
1961 | early_serial_console.index = dev->id; | ||
1962 | early_serial_console.data = &early_serial_port.port; | ||
1963 | sci_init_single(NULL, &early_serial_port, dev->id, p); | ||
1964 | serial_console_setup(&early_serial_console, early_serial_buf); | ||
1965 | if (!strstr(early_serial_buf, "keep")) | ||
1966 | early_serial_console.flags |= CON_BOOT; | ||
1967 | register_console(&early_serial_console); | ||
1968 | return 0; | ||
1969 | } | ||
1970 | #endif | ||
1971 | |||
1327 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | 1972 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
1328 | if (!priv) | 1973 | if (!priv) |
1329 | return -ENOMEM; | 1974 | return -ENOMEM; |
@@ -1332,10 +1977,8 @@ static int __devinit sci_probe(struct platform_device *dev) | |||
1332 | spin_lock_init(&priv->lock); | 1977 | spin_lock_init(&priv->lock); |
1333 | platform_set_drvdata(dev, priv); | 1978 | platform_set_drvdata(dev, priv); |
1334 | 1979 | ||
1335 | #ifdef CONFIG_HAVE_CLK | ||
1336 | priv->clk_nb.notifier_call = sci_notifier; | 1980 | priv->clk_nb.notifier_call = sci_notifier; |
1337 | cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); | 1981 | cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); |
1338 | #endif | ||
1339 | 1982 | ||
1340 | if (dev->id != -1) { | 1983 | if (dev->id != -1) { |
1341 | ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]); | 1984 | ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]); |
@@ -1388,14 +2031,14 @@ static int sci_resume(struct device *dev) | |||
1388 | return 0; | 2031 | return 0; |
1389 | } | 2032 | } |
1390 | 2033 | ||
1391 | static struct dev_pm_ops sci_dev_pm_ops = { | 2034 | static const struct dev_pm_ops sci_dev_pm_ops = { |
1392 | .suspend = sci_suspend, | 2035 | .suspend = sci_suspend, |
1393 | .resume = sci_resume, | 2036 | .resume = sci_resume, |
1394 | }; | 2037 | }; |
1395 | 2038 | ||
1396 | static struct platform_driver sci_driver = { | 2039 | static struct platform_driver sci_driver = { |
1397 | .probe = sci_probe, | 2040 | .probe = sci_probe, |
1398 | .remove = __devexit_p(sci_remove), | 2041 | .remove = sci_remove, |
1399 | .driver = { | 2042 | .driver = { |
1400 | .name = "sh-sci", | 2043 | .name = "sh-sci", |
1401 | .owner = THIS_MODULE, | 2044 | .owner = THIS_MODULE, |
@@ -1425,6 +2068,10 @@ static void __exit sci_exit(void) | |||
1425 | uart_unregister_driver(&sci_uart_driver); | 2068 | uart_unregister_driver(&sci_uart_driver); |
1426 | } | 2069 | } |
1427 | 2070 | ||
2071 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | ||
2072 | early_platform_init_buffer("earlyprintk", &sci_driver, | ||
2073 | early_serial_buf, ARRAY_SIZE(early_serial_buf)); | ||
2074 | #endif | ||
1428 | module_init(sci_init); | 2075 | module_init(sci_init); |
1429 | module_exit(sci_exit); | 2076 | module_exit(sci_exit); |
1430 | 2077 | ||