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authorBrian King <brking@linux.vnet.ibm.com>2012-03-14 22:20:10 -0400
committerJames Bottomley <JBottomley@Parallels.com>2012-03-28 10:04:47 -0400
commit89aad428317322044673cd9a3e1685a83abcba98 (patch)
tree44421af5c1c1bd61eee0cb8fb5f9b6f09c7ff2d1 /drivers/scsi/ipr.h
parenta5fb407eed819e950e369060a822640582a1e538 (diff)
[SCSI] ipr: Increase max concurrent oustanding commands
Increase the total number of max concurrent outstanding commands for the most recent family of adapters in order to improve overall adapter performance. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/ipr.h')
-rw-r--r--drivers/scsi/ipr.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index 40cbee72b83c..a79de2aab469 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -53,7 +53,7 @@
53 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of 53 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
54 * ops the mid-layer can send to the adapter. 54 * ops the mid-layer can send to the adapter.
55 */ 55 */
56#define IPR_NUM_BASE_CMD_BLKS 100 56#define IPR_NUM_BASE_CMD_BLKS (ioa_cfg->max_cmds)
57 57
58#define PCI_DEVICE_ID_IBM_OBSIDIAN_E 0x0339 58#define PCI_DEVICE_ID_IBM_OBSIDIAN_E 0x0339
59 59
@@ -153,7 +153,7 @@
153#define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \ 153#define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \
154 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 4) 154 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 4)
155 155
156#define IPR_MAX_COMMANDS IPR_NUM_BASE_CMD_BLKS 156#define IPR_MAX_COMMANDS 100
157#define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \ 157#define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \
158 IPR_NUM_INTERNAL_CMD_BLKS) 158 IPR_NUM_INTERNAL_CMD_BLKS)
159 159
@@ -1305,6 +1305,7 @@ struct ipr_interrupts {
1305 1305
1306struct ipr_chip_cfg_t { 1306struct ipr_chip_cfg_t {
1307 u32 mailbox; 1307 u32 mailbox;
1308 u16 max_cmds;
1308 u8 cache_line_size; 1309 u8 cache_line_size;
1309 u8 clear_isr; 1310 u8 clear_isr;
1310 struct ipr_interrupt_offsets regs; 1311 struct ipr_interrupt_offsets regs;
@@ -1503,8 +1504,9 @@ struct ipr_ioa_cfg {
1503 struct ata_host ata_host; 1504 struct ata_host ata_host;
1504 char ipr_cmd_label[8]; 1505 char ipr_cmd_label[8];
1505#define IPR_CMD_LABEL "ipr_cmd" 1506#define IPR_CMD_LABEL "ipr_cmd"
1506 struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS]; 1507 u32 max_cmds;
1507 dma_addr_t ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS]; 1508 struct ipr_cmnd **ipr_cmnd_list;
1509 dma_addr_t *ipr_cmnd_list_dma;
1508}; /* struct ipr_ioa_cfg */ 1510}; /* struct ipr_ioa_cfg */
1509 1511
1510struct ipr_cmnd { 1512struct ipr_cmnd {