diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-04-10 04:52:59 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-04-10 04:52:59 -0400 |
commit | b920eb41a8241c54efbbd4f2ed6d074f497b0d9e (patch) | |
tree | 5941091817e932add192f8e58dc88d483322e214 /drivers/regulator/wm8350-regulator.c | |
parent | a9d5801041eecc7baceff49a28e82f91f207a961 (diff) | |
parent | 0034102808e0dbbf3a2394b82b1bb40b5778de9e (diff) |
Merge tag 'v3.4-rc2' into regulator-drivers
Linux 3.4-rc2 contains some fixes that further patches depend upon.
Diffstat (limited to 'drivers/regulator/wm8350-regulator.c')
-rw-r--r-- | drivers/regulator/wm8350-regulator.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c index 4dcbab1314a5..94e550dc70b6 100644 --- a/drivers/regulator/wm8350-regulator.c +++ b/drivers/regulator/wm8350-regulator.c | |||
@@ -99,7 +99,7 @@ static int get_isink_val(int min_uA, int max_uA, u16 *setting) | |||
99 | { | 99 | { |
100 | int i; | 100 | int i; |
101 | 101 | ||
102 | for (i = ARRAY_SIZE(isink_cur) - 1; i >= 0; i--) { | 102 | for (i = 0; i < ARRAY_SIZE(isink_cur); i++) { |
103 | if (min_uA <= isink_cur[i] && max_uA >= isink_cur[i]) { | 103 | if (min_uA <= isink_cur[i] && max_uA >= isink_cur[i]) { |
104 | *setting = i; | 104 | *setting = i; |
105 | return 0; | 105 | return 0; |
@@ -186,7 +186,7 @@ static int wm8350_isink_get_current(struct regulator_dev *rdev) | |||
186 | return 0; | 186 | return 0; |
187 | } | 187 | } |
188 | 188 | ||
189 | return DIV_ROUND_CLOSEST(isink_cur[val], 100); | 189 | return isink_cur[val]; |
190 | } | 190 | } |
191 | 191 | ||
192 | /* turn on ISINK followed by DCDC */ | 192 | /* turn on ISINK followed by DCDC */ |
@@ -495,25 +495,25 @@ static int wm8350_dcdc_set_suspend_enable(struct regulator_dev *rdev) | |||
495 | val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER) | 495 | val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER) |
496 | & ~WM8350_DCDC_HIB_MODE_MASK; | 496 | & ~WM8350_DCDC_HIB_MODE_MASK; |
497 | wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, | 497 | wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, |
498 | wm8350->pmic.dcdc1_hib_mode); | 498 | val | wm8350->pmic.dcdc1_hib_mode); |
499 | break; | 499 | break; |
500 | case WM8350_DCDC_3: | 500 | case WM8350_DCDC_3: |
501 | val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER) | 501 | val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER) |
502 | & ~WM8350_DCDC_HIB_MODE_MASK; | 502 | & ~WM8350_DCDC_HIB_MODE_MASK; |
503 | wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, | 503 | wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, |
504 | wm8350->pmic.dcdc3_hib_mode); | 504 | val | wm8350->pmic.dcdc3_hib_mode); |
505 | break; | 505 | break; |
506 | case WM8350_DCDC_4: | 506 | case WM8350_DCDC_4: |
507 | val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER) | 507 | val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER) |
508 | & ~WM8350_DCDC_HIB_MODE_MASK; | 508 | & ~WM8350_DCDC_HIB_MODE_MASK; |
509 | wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, | 509 | wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, |
510 | wm8350->pmic.dcdc4_hib_mode); | 510 | val | wm8350->pmic.dcdc4_hib_mode); |
511 | break; | 511 | break; |
512 | case WM8350_DCDC_6: | 512 | case WM8350_DCDC_6: |
513 | val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER) | 513 | val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER) |
514 | & ~WM8350_DCDC_HIB_MODE_MASK; | 514 | & ~WM8350_DCDC_HIB_MODE_MASK; |
515 | wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, | 515 | wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, |
516 | wm8350->pmic.dcdc6_hib_mode); | 516 | val | wm8350->pmic.dcdc6_hib_mode); |
517 | break; | 517 | break; |
518 | case WM8350_DCDC_2: | 518 | case WM8350_DCDC_2: |
519 | case WM8350_DCDC_5: | 519 | case WM8350_DCDC_5: |
@@ -535,25 +535,25 @@ static int wm8350_dcdc_set_suspend_disable(struct regulator_dev *rdev) | |||
535 | val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER); | 535 | val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER); |
536 | wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; | 536 | wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; |
537 | wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, | 537 | wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER, |
538 | WM8350_DCDC_HIB_MODE_DIS); | 538 | val | WM8350_DCDC_HIB_MODE_DIS); |
539 | break; | 539 | break; |
540 | case WM8350_DCDC_3: | 540 | case WM8350_DCDC_3: |
541 | val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER); | 541 | val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER); |
542 | wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; | 542 | wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; |
543 | wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, | 543 | wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER, |
544 | WM8350_DCDC_HIB_MODE_DIS); | 544 | val | WM8350_DCDC_HIB_MODE_DIS); |
545 | break; | 545 | break; |
546 | case WM8350_DCDC_4: | 546 | case WM8350_DCDC_4: |
547 | val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER); | 547 | val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER); |
548 | wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; | 548 | wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; |
549 | wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, | 549 | wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER, |
550 | WM8350_DCDC_HIB_MODE_DIS); | 550 | val | WM8350_DCDC_HIB_MODE_DIS); |
551 | break; | 551 | break; |
552 | case WM8350_DCDC_6: | 552 | case WM8350_DCDC_6: |
553 | val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER); | 553 | val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER); |
554 | wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; | 554 | wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK; |
555 | wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, | 555 | wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER, |
556 | WM8350_DCDC_HIB_MODE_DIS); | 556 | val | WM8350_DCDC_HIB_MODE_DIS); |
557 | break; | 557 | break; |
558 | case WM8350_DCDC_2: | 558 | case WM8350_DCDC_2: |
559 | case WM8350_DCDC_5: | 559 | case WM8350_DCDC_5: |
@@ -575,13 +575,13 @@ static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev) | |||
575 | val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) | 575 | val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) |
576 | & ~WM8350_DC2_HIB_MODE_MASK; | 576 | & ~WM8350_DC2_HIB_MODE_MASK; |
577 | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | | 577 | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | |
578 | WM8350_DC2_HIB_MODE_ACTIVE); | 578 | (WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT)); |
579 | break; | 579 | break; |
580 | case WM8350_DCDC_5: | 580 | case WM8350_DCDC_5: |
581 | val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) | 581 | val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) |
582 | & ~WM8350_DC2_HIB_MODE_MASK; | 582 | & ~WM8350_DC5_HIB_MODE_MASK; |
583 | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | | 583 | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | |
584 | WM8350_DC5_HIB_MODE_ACTIVE); | 584 | (WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT)); |
585 | break; | 585 | break; |
586 | default: | 586 | default: |
587 | return -EINVAL; | 587 | return -EINVAL; |
@@ -600,13 +600,13 @@ static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev) | |||
600 | val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) | 600 | val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL) |
601 | & ~WM8350_DC2_HIB_MODE_MASK; | 601 | & ~WM8350_DC2_HIB_MODE_MASK; |
602 | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | | 602 | wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val | |
603 | WM8350_DC2_HIB_MODE_DISABLE); | 603 | (WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT)); |
604 | break; | 604 | break; |
605 | case WM8350_DCDC_5: | 605 | case WM8350_DCDC_5: |
606 | val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) | 606 | val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL) |
607 | & ~WM8350_DC2_HIB_MODE_MASK; | 607 | & ~WM8350_DC5_HIB_MODE_MASK; |
608 | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | | 608 | wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val | |
609 | WM8350_DC2_HIB_MODE_DISABLE); | 609 | (WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT)); |
610 | break; | 610 | break; |
611 | default: | 611 | default: |
612 | return -EINVAL; | 612 | return -EINVAL; |
@@ -749,7 +749,7 @@ static int wm8350_ldo_set_suspend_disable(struct regulator_dev *rdev) | |||
749 | 749 | ||
750 | /* all LDOs have same mV bits */ | 750 | /* all LDOs have same mV bits */ |
751 | val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK; | 751 | val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK; |
752 | wm8350_reg_write(wm8350, volt_reg, WM8350_LDO1_HIB_MODE_DIS); | 752 | wm8350_reg_write(wm8350, volt_reg, val | WM8350_LDO1_HIB_MODE_DIS); |
753 | return 0; | 753 | return 0; |
754 | } | 754 | } |
755 | 755 | ||