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authorMagnus Damm <damm@opensource.se>2013-03-26 09:49:49 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-04-02 21:30:38 -0400
commitc98f6c21afaf4692886cea0f5b63ead9945d85cc (patch)
tree1aa7e6f751c81e45ab0980447275119103341405 /drivers/pinctrl
parentba774cc7380e83f942c08564d3c142af2fbd05be (diff)
sh-pfc: Add r8a73a4 pinmux support
Add initial PFC support for the r8a73a4 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors are Morimoto-san with help from Yoshii-san, thanks to them for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/sh-pfc/Kconfig5
-rw-r--r--drivers/pinctrl/sh-pfc/Makefile1
-rw-r--r--drivers/pinctrl/sh-pfc/core.c3
-rw-r--r--drivers/pinctrl/sh-pfc/core.h1
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a73a4.c2826
5 files changed, 2836 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
index af16f8f6ab6c..0e1f99c33d47 100644
--- a/drivers/pinctrl/sh-pfc/Kconfig
+++ b/drivers/pinctrl/sh-pfc/Kconfig
@@ -22,6 +22,11 @@ config GPIO_SH_PFC
22 This enables support for GPIOs within the SoC's pin function 22 This enables support for GPIOs within the SoC's pin function
23 controller. 23 controller.
24 24
25config PINCTRL_PFC_R8A73A4
26 def_bool y
27 depends on ARCH_R8A73A4
28 select PINCTRL_SH_PFC
29
25config PINCTRL_PFC_R8A7740 30config PINCTRL_PFC_R8A7740
26 def_bool y 31 def_bool y
27 depends on ARCH_R8A7740 32 depends on ARCH_R8A7740
diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile
index e8b9562c47e1..211cd8e98a8a 100644
--- a/drivers/pinctrl/sh-pfc/Makefile
+++ b/drivers/pinctrl/sh-pfc/Makefile
@@ -3,6 +3,7 @@ ifeq ($(CONFIG_GPIO_SH_PFC),y)
3sh-pfc-objs += gpio.o 3sh-pfc-objs += gpio.o
4endif 4endif
5obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc.o 5obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc.o
6obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o
6obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o 7obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o
7obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o 8obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o
8obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o 9obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index ced9a95aa1fc..b551336924a5 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -418,6 +418,9 @@ static int sh_pfc_remove(struct platform_device *pdev)
418} 418}
419 419
420static const struct platform_device_id sh_pfc_id_table[] = { 420static const struct platform_device_id sh_pfc_id_table[] = {
421#ifdef CONFIG_PINCTRL_PFC_R8A73A4
422 { "pfc-r8a73a4", (kernel_ulong_t)&r8a73a4_pinmux_info },
423#endif
421#ifdef CONFIG_PINCTRL_PFC_R8A7740 424#ifdef CONFIG_PINCTRL_PFC_R8A7740
422 { "pfc-r8a7740", (kernel_ulong_t)&r8a7740_pinmux_info }, 425 { "pfc-r8a7740", (kernel_ulong_t)&r8a7740_pinmux_info },
423#endif 426#endif
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
index 763d717ca979..89cb4289d761 100644
--- a/drivers/pinctrl/sh-pfc/core.h
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -54,6 +54,7 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
54int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin); 54int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
55int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type); 55int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
56 56
57extern const struct sh_pfc_soc_info r8a73a4_pinmux_info;
57extern const struct sh_pfc_soc_info r8a7740_pinmux_info; 58extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
58extern const struct sh_pfc_soc_info r8a7779_pinmux_info; 59extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
59extern const struct sh_pfc_soc_info sh7203_pinmux_info; 60extern const struct sh_pfc_soc_info sh7203_pinmux_info;
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
new file mode 100644
index 000000000000..47d75d5548eb
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
@@ -0,0 +1,2826 @@
1/*
2 * Copyright (C) 2012-2013 Renesas Solutions Corp.
3 * Copyright (C) 2013 Magnus Damm
4 * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of the
9 * License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <mach/irqs.h>
22#include <mach/r8a73a4.h>
23
24#include "sh_pfc.h"
25
26#define CPU_ALL_PORT(fn, pfx, sfx) \
27 /* Port0 - Port30 */ \
28 PORT_10(fn, pfx, sfx), \
29 PORT_10(fn, pfx##1, sfx), \
30 PORT_10(fn, pfx##2, sfx), \
31 PORT_1(fn, pfx##30, sfx), \
32 /* Port32 - Port40 */ \
33 PORT_1(fn, pfx##32, sfx), PORT_1(fn, pfx##33, sfx), \
34 PORT_1(fn, pfx##34, sfx), PORT_1(fn, pfx##35, sfx), \
35 PORT_1(fn, pfx##36, sfx), PORT_1(fn, pfx##37, sfx), \
36 PORT_1(fn, pfx##38, sfx), PORT_1(fn, pfx##39, sfx), \
37 PORT_1(fn, pfx##40, sfx), \
38 /* Port64 - Port85 */ \
39 PORT_1(fn, pfx##64, sfx), PORT_1(fn, pfx##65, sfx), \
40 PORT_1(fn, pfx##66, sfx), PORT_1(fn, pfx##67, sfx), \
41 PORT_1(fn, pfx##68, sfx), PORT_1(fn, pfx##69, sfx), \
42 PORT_10(fn, pfx##7, sfx), \
43 PORT_1(fn, pfx##80, sfx), PORT_1(fn, pfx##81, sfx), \
44 PORT_1(fn, pfx##82, sfx), PORT_1(fn, pfx##83, sfx), \
45 PORT_1(fn, pfx##84, sfx), PORT_1(fn, pfx##85, sfx), \
46 /* Port96 - Port126 */ \
47 PORT_1(fn, pfx##96, sfx), PORT_1(fn, pfx##97, sfx), \
48 PORT_1(fn, pfx##98, sfx), PORT_1(fn, pfx##99, sfx), \
49 PORT_10(fn, pfx##10, sfx), \
50 PORT_10(fn, pfx##11, sfx), \
51 PORT_1(fn, pfx##120, sfx), PORT_1(fn, pfx##121, sfx), \
52 PORT_1(fn, pfx##122, sfx), PORT_1(fn, pfx##123, sfx), \
53 PORT_1(fn, pfx##124, sfx), PORT_1(fn, pfx##125, sfx), \
54 PORT_1(fn, pfx##126, sfx), \
55 /* Port128 - Port134 */ \
56 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
57 PORT_1(fn, pfx##130, sfx), PORT_1(fn, pfx##131, sfx), \
58 PORT_1(fn, pfx##132, sfx), PORT_1(fn, pfx##133, sfx), \
59 PORT_1(fn, pfx##134, sfx), \
60 /* Port160 - Port178 */ \
61 PORT_10(fn, pfx##16, sfx), \
62 PORT_1(fn, pfx##170, sfx), PORT_1(fn, pfx##171, sfx), \
63 PORT_1(fn, pfx##172, sfx), PORT_1(fn, pfx##173, sfx), \
64 PORT_1(fn, pfx##174, sfx), PORT_1(fn, pfx##175, sfx), \
65 PORT_1(fn, pfx##176, sfx), PORT_1(fn, pfx##177, sfx), \
66 PORT_1(fn, pfx##178, sfx), \
67 /* Port192 - Port222 */ \
68 PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
69 PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
70 PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
71 PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
72 PORT_10(fn, pfx##20, sfx), \
73 PORT_10(fn, pfx##21, sfx), \
74 PORT_1(fn, pfx##220, sfx), PORT_1(fn, pfx##221, sfx), \
75 PORT_1(fn, pfx##222, sfx), \
76 /* Port224 - Port250 */ \
77 PORT_1(fn, pfx##224, sfx), PORT_1(fn, pfx##225, sfx), \
78 PORT_1(fn, pfx##226, sfx), PORT_1(fn, pfx##227, sfx), \
79 PORT_1(fn, pfx##228, sfx), PORT_1(fn, pfx##229, sfx), \
80 PORT_10(fn, pfx##23, sfx), \
81 PORT_10(fn, pfx##24, sfx), \
82 PORT_1(fn, pfx##250, sfx), \
83 /* Port256 - Port283 */ \
84 PORT_1(fn, pfx##256, sfx), PORT_1(fn, pfx##257, sfx), \
85 PORT_1(fn, pfx##258, sfx), PORT_1(fn, pfx##259, sfx), \
86 PORT_10(fn, pfx##26, sfx), \
87 PORT_10(fn, pfx##27, sfx), \
88 PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \
89 PORT_1(fn, pfx##282, sfx), PORT_1(fn, pfx##283, sfx), \
90 /* Port288 - Port308 */ \
91 PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \
92 PORT_10(fn, pfx##29, sfx), \
93 PORT_1(fn, pfx##300, sfx), PORT_1(fn, pfx##301, sfx), \
94 PORT_1(fn, pfx##302, sfx), PORT_1(fn, pfx##303, sfx), \
95 PORT_1(fn, pfx##304, sfx), PORT_1(fn, pfx##305, sfx), \
96 PORT_1(fn, pfx##306, sfx), PORT_1(fn, pfx##307, sfx), \
97 PORT_1(fn, pfx##308, sfx), \
98 /* Port320 - Port329 */ \
99 PORT_10(fn, pfx##32, sfx)
100
101
102enum {
103 PINMUX_RESERVED = 0,
104
105 /* PORT0_DATA -> PORT329_DATA */
106 PINMUX_DATA_BEGIN,
107 PORT_ALL(DATA),
108 PINMUX_DATA_END,
109
110 /* PORT0_IN -> PORT329_IN */
111 PINMUX_INPUT_BEGIN,
112 PORT_ALL(IN),
113 PINMUX_INPUT_END,
114
115 /* PORT0_IN_PU -> PORT329_IN_PU */
116 PINMUX_INPUT_PULLUP_BEGIN,
117 PORT_ALL(IN_PU),
118 PINMUX_INPUT_PULLUP_END,
119
120 /* PORT0_IN_PD -> PORT329_IN_PD */
121 PINMUX_INPUT_PULLDOWN_BEGIN,
122 PORT_ALL(IN_PD),
123 PINMUX_INPUT_PULLDOWN_END,
124
125 /* PORT0_OUT -> PORT329_OUT */
126 PINMUX_OUTPUT_BEGIN,
127 PORT_ALL(OUT),
128 PINMUX_OUTPUT_END,
129
130 PINMUX_FUNCTION_BEGIN,
131 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT329_FN_IN */
132 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT329_FN_OUT */
133 PORT_ALL(FN0), /* PORT0_FN0 -> PORT329_FN0 */
134 PORT_ALL(FN1), /* PORT0_FN1 -> PORT329_FN1 */
135 PORT_ALL(FN2), /* PORT0_FN2 -> PORT329_FN2 */
136 PORT_ALL(FN3), /* PORT0_FN3 -> PORT329_FN3 */
137 PORT_ALL(FN4), /* PORT0_FN4 -> PORT329_FN4 */
138 PORT_ALL(FN5), /* PORT0_FN5 -> PORT329_FN5 */
139 PORT_ALL(FN6), /* PORT0_FN6 -> PORT329_FN6 */
140 PORT_ALL(FN7), /* PORT0_FN7 -> PORT329_FN7 */
141
142 MSEL1CR_31_0, MSEL1CR_31_1,
143 MSEL1CR_27_0, MSEL1CR_27_1,
144 MSEL1CR_25_0, MSEL1CR_25_1,
145 MSEL1CR_24_0, MSEL1CR_24_1,
146 MSEL1CR_22_0, MSEL1CR_22_1,
147 MSEL1CR_21_0, MSEL1CR_21_1,
148 MSEL1CR_20_0, MSEL1CR_20_1,
149 MSEL1CR_19_0, MSEL1CR_19_1,
150 MSEL1CR_18_0, MSEL1CR_18_1,
151 MSEL1CR_17_0, MSEL1CR_17_1,
152 MSEL1CR_16_0, MSEL1CR_16_1,
153 MSEL1CR_15_0, MSEL1CR_15_1,
154 MSEL1CR_14_0, MSEL1CR_14_1,
155 MSEL1CR_13_0, MSEL1CR_13_1,
156 MSEL1CR_12_0, MSEL1CR_12_1,
157 MSEL1CR_11_0, MSEL1CR_11_1,
158 MSEL1CR_10_0, MSEL1CR_10_1,
159 MSEL1CR_09_0, MSEL1CR_09_1,
160 MSEL1CR_08_0, MSEL1CR_08_1,
161 MSEL1CR_07_0, MSEL1CR_07_1,
162 MSEL1CR_06_0, MSEL1CR_06_1,
163 MSEL1CR_05_0, MSEL1CR_05_1,
164 MSEL1CR_04_0, MSEL1CR_04_1,
165 MSEL1CR_03_0, MSEL1CR_03_1,
166 MSEL1CR_02_0, MSEL1CR_02_1,
167 MSEL1CR_01_0, MSEL1CR_01_1,
168 MSEL1CR_00_0, MSEL1CR_00_1,
169
170 MSEL3CR_31_0, MSEL3CR_31_1,
171 MSEL3CR_28_0, MSEL3CR_28_1,
172 MSEL3CR_27_0, MSEL3CR_27_1,
173 MSEL3CR_26_0, MSEL3CR_26_1,
174 MSEL3CR_23_0, MSEL3CR_23_1,
175 MSEL3CR_22_0, MSEL3CR_22_1,
176 MSEL3CR_21_0, MSEL3CR_21_1,
177 MSEL3CR_20_0, MSEL3CR_20_1,
178 MSEL3CR_19_0, MSEL3CR_19_1,
179 MSEL3CR_18_0, MSEL3CR_18_1,
180 MSEL3CR_17_0, MSEL3CR_17_1,
181 MSEL3CR_16_0, MSEL3CR_16_1,
182 MSEL3CR_15_0, MSEL3CR_15_1,
183 MSEL3CR_12_0, MSEL3CR_12_1,
184 MSEL3CR_11_0, MSEL3CR_11_1,
185 MSEL3CR_10_0, MSEL3CR_10_1,
186 MSEL3CR_09_0, MSEL3CR_09_1,
187 MSEL3CR_06_0, MSEL3CR_06_1,
188 MSEL3CR_03_0, MSEL3CR_03_1,
189 MSEL3CR_01_0, MSEL3CR_01_1,
190 MSEL3CR_00_0, MSEL3CR_00_1,
191
192 MSEL4CR_30_0, MSEL4CR_30_1,
193 MSEL4CR_29_0, MSEL4CR_29_1,
194 MSEL4CR_28_0, MSEL4CR_28_1,
195 MSEL4CR_27_0, MSEL4CR_27_1,
196 MSEL4CR_26_0, MSEL4CR_26_1,
197 MSEL4CR_25_0, MSEL4CR_25_1,
198 MSEL4CR_24_0, MSEL4CR_24_1,
199 MSEL4CR_23_0, MSEL4CR_23_1,
200 MSEL4CR_22_0, MSEL4CR_22_1,
201 MSEL4CR_21_0, MSEL4CR_21_1,
202 MSEL4CR_20_0, MSEL4CR_20_1,
203 MSEL4CR_19_0, MSEL4CR_19_1,
204 MSEL4CR_18_0, MSEL4CR_18_1,
205 MSEL4CR_17_0, MSEL4CR_17_1,
206 MSEL4CR_16_0, MSEL4CR_16_1,
207 MSEL4CR_15_0, MSEL4CR_15_1,
208 MSEL4CR_14_0, MSEL4CR_14_1,
209 MSEL4CR_13_0, MSEL4CR_13_1,
210 MSEL4CR_12_0, MSEL4CR_12_1,
211 MSEL4CR_11_0, MSEL4CR_11_1,
212 MSEL4CR_10_0, MSEL4CR_10_1,
213 MSEL4CR_09_0, MSEL4CR_09_1,
214 MSEL4CR_07_0, MSEL4CR_07_1,
215 MSEL4CR_04_0, MSEL4CR_04_1,
216 MSEL4CR_01_0, MSEL4CR_01_1,
217
218 MSEL5CR_31_0, MSEL5CR_31_1,
219 MSEL5CR_30_0, MSEL5CR_30_1,
220 MSEL5CR_29_0, MSEL5CR_29_1,
221 MSEL5CR_28_0, MSEL5CR_28_1,
222 MSEL5CR_27_0, MSEL5CR_27_1,
223 MSEL5CR_26_0, MSEL5CR_26_1,
224 MSEL5CR_25_0, MSEL5CR_25_1,
225 MSEL5CR_24_0, MSEL5CR_24_1,
226 MSEL5CR_23_0, MSEL5CR_23_1,
227 MSEL5CR_22_0, MSEL5CR_22_1,
228 MSEL5CR_21_0, MSEL5CR_21_1,
229 MSEL5CR_20_0, MSEL5CR_20_1,
230 MSEL5CR_19_0, MSEL5CR_19_1,
231 MSEL5CR_18_0, MSEL5CR_18_1,
232 MSEL5CR_17_0, MSEL5CR_17_1,
233 MSEL5CR_16_0, MSEL5CR_16_1,
234 MSEL5CR_15_0, MSEL5CR_15_1,
235 MSEL5CR_14_0, MSEL5CR_14_1,
236 MSEL5CR_13_0, MSEL5CR_13_1,
237 MSEL5CR_12_0, MSEL5CR_12_1,
238 MSEL5CR_11_0, MSEL5CR_11_1,
239 MSEL5CR_10_0, MSEL5CR_10_1,
240 MSEL5CR_09_0, MSEL5CR_09_1,
241 MSEL5CR_08_0, MSEL5CR_08_1,
242 MSEL5CR_07_0, MSEL5CR_07_1,
243 MSEL5CR_06_0, MSEL5CR_06_1,
244
245 MSEL8CR_16_0, MSEL8CR_16_1,
246 MSEL8CR_01_0, MSEL8CR_01_1,
247 MSEL8CR_00_0, MSEL8CR_00_1,
248
249 PINMUX_FUNCTION_END,
250
251 PINMUX_MARK_BEGIN,
252
253
254#define F1(a) a##_MARK
255#define F2(a) a##_MARK
256#define F3(a) a##_MARK
257#define F4(a) a##_MARK
258#define F5(a) a##_MARK
259#define F6(a) a##_MARK
260#define F7(a) a##_MARK
261#define IRQ(a) IRQ##a##_MARK
262
263 F1(LCDD0), F3(PDM2_CLK_0), F7(DU0_DR0), IRQ(0), /* Port0 */
264 F1(LCDD1), F3(PDM2_DATA_1), F7(DU0_DR19), IRQ(1),
265 F1(LCDD2), F3(PDM3_CLK_2), F7(DU0_DR2), IRQ(2),
266 F1(LCDD3), F3(PDM3_DATA_3), F7(DU0_DR3), IRQ(3),
267 F1(LCDD4), F3(PDM4_CLK_4), F7(DU0_DR4), IRQ(4),
268 F1(LCDD5), F3(PDM4_DATA_5), F7(DU0_DR5), IRQ(5),
269 F1(LCDD6), F3(PDM0_OUTCLK_6), F7(DU0_DR6), IRQ(6),
270 F1(LCDD7), F3(PDM0_OUTDATA_7), F7(DU0_DR7), IRQ(7),
271 F1(LCDD8), F3(PDM1_OUTCLK_8), F7(DU0_DG0), IRQ(8),
272 F1(LCDD9), F3(PDM1_OUTDATA_9), F7(DU0_DG1), IRQ(9),
273 F1(LCDD10), F3(FSICCK), F7(DU0_DG2), IRQ(10), /* Port10 */
274 F1(LCDD11), F3(FSICISLD), F7(DU0_DG3), IRQ(11),
275 F1(LCDD12), F3(FSICOMC), F7(DU0_DG4), IRQ(12),
276 F1(LCDD13), F3(FSICOLR), F4(FSICILR), F7(DU0_DG5), IRQ(13),
277 F1(LCDD14), F3(FSICOBT), F4(FSICIBT), F7(DU0_DG6), IRQ(14),
278 F1(LCDD15), F3(FSICOSLD), F7(DU0_DG7), IRQ(15),
279 F1(LCDD16), F4(TPU1TO1), F7(DU0_DB0),
280 F1(LCDD17), F4(SF_IRQ_00), F7(DU0_DB1),
281 F1(LCDD18), F4(SF_IRQ_01), F7(DU0_DB2),
282 F1(LCDD19), F3(SCIFB3_RTS_19), F7(DU0_DB3),
283 F1(LCDD20), F3(SCIFB3_CTS_20), F7(DU0_DB4), /* Port20 */
284 F1(LCDD21), F3(SCIFB3_TXD_21), F7(DU0_DB5),
285 F1(LCDD22), F3(SCIFB3_RXD_22), F7(DU0_DB6),
286 F1(LCDD23), F3(SCIFB3_SCK_23), F7(DU0_DB7),
287 F1(LCDHSYN), F2(LCDCS), F3(SCIFB1_RTS_24),
288 F7(DU0_EXHSYNC_N_CSYNC_N_HSYNC_N),
289 F1(LCDVSYN), F3(SCIFB1_CTS_25), F7(DU0_EXVSYNC_N_VSYNC_N_CSYNC_N),
290 F1(LCDDCK), F2(LCDWR), F3(SCIFB1_TXD_26), F7(DU0_DOTCLKIN),
291 F1(LCDDISP), F2(LCDRS), F3(SCIFB1_RXD_27), F7(DU0_DOTCLKOUT),
292 F1(LCDRD_N), F3(SCIFB1_SCK_28), F7(DU0_DOTCLKOUTB),
293 F1(LCDLCLK), F4(SF_IRQ_02), F7(DU0_DISP_CSYNC_N_DE),
294 F1(LCDDON), F4(SF_IRQ_03), F7(DU0_ODDF_N_CLAMP), /* Port30 */
295
296 F1(SCIFA0_RTS), F5(SIM0_DET), F7(CSCIF0_RTS), /* Port32 */
297 F1(SCIFA0_CTS), F5(SIM1_DET), F7(CSCIF0_CTS),
298 F1(SCIFA0_SCK), F5(SIM0_PWRON), F7(CSCIF0_SCK),
299 F1(SCIFA1_RTS), F7(CSCIF1_RTS),
300 F1(SCIFA1_CTS), F7(CSCIF1_CTS),
301 F1(SCIFA1_SCK), F7(CSCIF1_SCK),
302 F1(SCIFB0_RTS), F3(TPU0TO1), F4(SCIFB3_RTS_38), F7(CHSCIF0_HRTS),
303 F1(SCIFB0_CTS), F3(TPU0TO2), F4(SCIFB3_CTS_39), F7(CHSCIF0_HCTS),
304 F1(SCIFB0_SCK), F3(TPU0TO3), F4(SCIFB3_SCK_40),
305 F7(CHSCIF0_HSCK), /* Port40 */
306
307 F1(PDM0_DATA), /* Port64 */
308 F1(PDM1_DATA),
309 F1(HSI_RX_WAKE), F2(SCIFB2_CTS_66), F3(MSIOF3_SYNC), F5(GenIO4),
310 IRQ(40),
311 F1(HSI_RX_READY), F2(SCIFB1_TXD_67), F5(GIO_OUT3_67), F7(CHSCIF1_HTX),
312 F1(HSI_RX_FLAG), F2(SCIFB2_TXD_68), F3(MSIOF3_TXD), F5(GIO_OUT4_68),
313 F1(HSI_RX_DATA), F2(SCIFB2_RXD_69), F3(MSIOF3_RXD), F5(GIO_OUT5_69),
314 F1(HSI_TX_FLAG), F2(SCIFB1_RTS_70), F5(GIO_OUT1_70), F6(HSIC_TSTCLK0),
315 F7(CHSCIF1_HRTS), /* Port70 */
316 F1(HSI_TX_DATA), F2(SCIFB1_CTS_71), F5(GIO_OUT2_71), F6(HSIC_TSTCLK1),
317 F7(CHSCIF1_HCTS),
318 F1(HSI_TX_WAKE), F2(SCIFB1_RXD_72), F5(GenIO8), F7(CHSCIF1_HRX),
319 F1(HSI_TX_READY), F2(SCIFB2_RTS_73), F3(MSIOF3_SCK), F5(GIO_OUT0_73),
320 F1(IRDA_OUT), F1(IRDA_IN), F1(IRDA_FIRSEL), F1(TPU0TO0),
321 F1(DIGRFEN), F1(GPS_TIMESTAMP), F1(TXP), /* Port80 */
322 F1(TXP2), F1(COEX_0), F1(COEX_1), IRQ(19), IRQ(18), /* Port85 */
323
324 F1(KEYIN0), /* Port96 */
325 F1(KEYIN1), F1(KEYIN2), F1(KEYIN3), F1(KEYIN4), /* Port100 */
326 F1(KEYIN5), F1(KEYIN6), IRQ(41), F1(KEYIN7), IRQ(42),
327 F2(KEYOUT0), F2(KEYOUT1), F2(KEYOUT2), F2(KEYOUT3),
328 F2(KEYOUT4), F2(KEYOUT5), IRQ(43), F2(KEYOUT6), IRQ(44), /* Port110 */
329 F2(KEYOUT7), F5(RFANAEN), IRQ(45),
330 F1(KEYIN8), F2(KEYOUT8), F4(SF_IRQ_04), IRQ(46),
331 F1(KEYIN9), F2(KEYOUT9), F4(SF_IRQ_05), IRQ(47),
332 F1(KEYIN10), F2(KEYOUT10), F4(SF_IRQ_06), IRQ(48),
333 F1(KEYIN11), F2(KEYOUT11), F4(SF_IRQ_07), IRQ(49),
334 F1(SCIFA0_TXD), F7(CSCIF0_TX), F1(SCIFA0_RXD), F7(CSCIF0_RX),
335 F1(SCIFA1_TXD), F7(CSCIF1_TX), F1(SCIFA1_RXD), F7(CSCIF1_RX),
336 F3(SF_PORT_1_120), F4(SCIFB3_RXD_120), F7(DU0_CDE), /* Port120 */
337 F3(SF_PORT_0_121), F4(SCIFB3_TXD_121),
338 F1(SCIFB0_TXD), F7(CHSCIF0_HTX),
339 F1(SCIFB0_RXD), F7(CHSCIF0_HRX), F3(ISP_STROBE_124),
340 F1(STP_ISD_0), F2(PDM4_CLK_125), F3(MSIOF2_TXD), F5(SIM0_VOLTSEL0),
341 F1(TS_SDEN), F2(MSIOF7_SYNC), F3(STP_ISEN_1),
342 F1(STP_ISEN_0), F2(PDM1_OUTDATA_128), F3(MSIOF2_SYNC),
343 F5(SIM1_VOLTSEL1), F1(TS_SPSYNC), F2(MSIOF7_RXD), F3(STP_ISSYNC_1),
344 F1(STP_ISSYNC_0), F2(PDM4_DATA_130), F3(MSIOF2_RXD),
345 F5(SIM0_VOLTSEL1), /* Port130 */
346 F1(STP_OPWM_0), F5(SIM1_PWRON), F1(TS_SCK), F2(MSIOF7_SCK),
347 F3(STP_ISCLK_1), F1(STP_ISCLK_0), F2(PDM1_OUTCLK_133), F3(MSIOF2_SCK),
348 F5(SIM1_VOLTSEL0), F1(TS_SDAT), F2(MSIOF7_TXD), F3(STP_ISD_1),
349 IRQ(20), /* Port160 */
350 IRQ(21), IRQ(22), IRQ(23),
351 F1(MMCD0_0), F1(MMCD0_1), F1(MMCD0_2), F1(MMCD0_3),
352 F1(MMCD0_4), F1(MMCD0_5), F1(MMCD0_6), /* Port170 */
353 F1(MMCD0_7), F1(MMCCMD0), F1(MMCCLK0), F1(MMCRST),
354 IRQ(24), IRQ(25), IRQ(26), IRQ(27),
355 F1(A10), F2(MMCD1_7), IRQ(31), /* Port192 */
356 F1(A9), F2(MMCD1_6), IRQ(32),
357 F1(A8), F2(MMCD1_5), IRQ(33),
358 F1(A7), F2(MMCD1_4), IRQ(34),
359 F1(A6), F2(MMCD1_3), IRQ(35),
360 F1(A5), F2(MMCD1_2), IRQ(36),
361 F1(A4), F2(MMCD1_1), IRQ(37),
362 F1(A3), F2(MMCD1_0), IRQ(38),
363 F1(A2), F2(MMCCMD1), IRQ(39), /* Port200 */
364 F1(A1),
365 F1(A0), F2(BS),
366 F1(CKO), F2(MMCCLK1),
367 F1(CS0_N), F5(SIM0_GPO1),
368 F1(CS2_N), F5(SIM0_GPO2),
369 F1(CS4_N), F2(VIO_VD), F5(SIM1_GPO0),
370 F1(D15), F5(GIO_OUT15),
371 F1(D14), F5(GIO_OUT14),
372 F1(D13), F5(GIO_OUT13),
373 F1(D12), F5(GIO_OUT12), /* Port210 */
374 F1(D11), F5(WGM_TXP2),
375 F1(D10), F5(WGM_GPS_TIMEM_ASK_RFCLK),
376 F1(D9), F2(VIO_D9), F5(GIO_OUT9),
377 F1(D8), F2(VIO_D8), F5(GIO_OUT8),
378 F1(D7), F2(VIO_D7), F5(GIO_OUT7),
379 F1(D6), F2(VIO_D6), F5(GIO_OUT6),
380 F1(D5), F2(VIO_D5), F5(GIO_OUT5_217),
381 F1(D4), F2(VIO_D4), F5(GIO_OUT4_218),
382 F1(D3), F2(VIO_D3), F5(GIO_OUT3_219),
383 F1(D2), F2(VIO_D2), F5(GIO_OUT2_220), /* Port220 */
384 F1(D1), F2(VIO_D1), F5(GIO_OUT1_221),
385 F1(D0), F2(VIO_D0), F5(GIO_OUT0_222),
386 F1(RDWR_224), F2(VIO_HD), F5(SIM1_GPO2),
387 F1(RD_N), F1(WAIT_N), F2(VIO_CLK), F5(SIM1_GPO1),
388 F1(WE0_N), F2(RDWR_227),
389 F1(WE1_N), F5(SIM0_GPO0),
390 F1(PWMO), F2(VIO_CKO1_229),
391 F1(SLIM_CLK), F2(VIO_CKO4_230), /* Port230 */
392 F1(SLIM_DATA), F2(VIO_CKO5_231), F2(VIO_CKO2_232), F4(SF_PORT_0_232),
393 F2(VIO_CKO3_233), F4(SF_PORT_1_233),
394 F1(FSIACK), F2(PDM3_CLK_234), F3(ISP_IRIS1_234),
395 F1(FSIAISLD), F2(PDM3_DATA_235),
396 F1(FSIAOMC), F2(PDM0_OUTCLK_236), F3(ISP_IRIS0_236),
397 F1(FSIAOLR), F2(FSIAILR), F1(FSIAOBT), F2(FSIAIBT),
398 F1(FSIAOSLD), F2(PDM0_OUTDATA_239),
399 F1(FSIBISLD), /* Port240 */
400 F1(FSIBOLR), F2(FSIBILR), F1(FSIBOMC), F3(ISP_SHUTTER1_242),
401 F1(FSIBOBT), F2(FSIBIBT), F1(FSIBOSLD), F2(FSIASPDIF),
402 F1(FSIBCK), F3(ISP_SHUTTER0_245),
403 F1(ISP_IRIS1_246), F1(ISP_IRIS0_247), F1(ISP_SHUTTER1_248),
404 F1(ISP_SHUTTER0_249), F1(ISP_STROBE_250), /* Port250 */
405 F1(MSIOF0_SYNC), F1(MSIOF0_RXD), F1(MSIOF0_SCK), F1(MSIOF0_SS2),
406 F3(VIO_CKO3_259), F1(MSIOF0_TXD), /* Port260 */
407 F2(SCIFB1_SCK_261), F7(CHSCIF1_HSCK), F2(SCIFB2_SCK_262),
408 F1(MSIOF1_SS2), F4(MSIOF5_SS2), F1(MSIOF1_TXD), F4(MSIOF5_TXD),
409 F1(MSIOF1_RXD), F4(MSIOF5_RXD), F1(MSIOF1_SS1), F4(MSIOF5_SS1),
410 F1(MSIOF0_SS1), F1(MSIOF1_SCK), F4(MSIOF5_SCK),
411 F1(MSIOF1_SYNC), F4(MSIOF5_SYNC),
412 F1(MSIOF2_SS1), F3(VIO_CKO5_270), /* Port270 */
413 F1(MSIOF2_SS2), F3(VIO_CKO2_271), F1(MSIOF3_SS2), F3(VIO_CKO1_272),
414 F1(MSIOF3_SS1), F3(VIO_CKO4_273), F1(MSIOF4_SS2), F4(TPU1TO0),
415 F1(IC_DP), F1(SIM0_RST), F1(IC_DM), F1(SIM0_BSICOMP),
416 F1(SIM0_CLK), F1(SIM0_IO), /* Port280 */
417 F1(SIM1_IO), F2(PDM2_DATA_281), F1(SIM1_CLK), F2(PDM2_CLK_282),
418 F1(SIM1_RST), F1(SDHID1_0), F3(STMDATA0_2),
419 F1(SDHID1_1), F3(STMDATA1_2), IRQ(51), /* Port290 */
420 F1(SDHID1_2), F3(STMDATA2_2), F1(SDHID1_3), F3(STMDATA3_2),
421 F1(SDHICLK1), F3(STMCLK_2), F1(SDHICMD1), F3(STMSIDI_2),
422 F1(SDHID2_0), F2(MSIOF4_TXD), F3(SCIFB2_TXD_295), F4(MSIOF6_TXD),
423 F1(SDHID2_1), F4(MSIOF6_SS2), IRQ(52),
424 F1(SDHID2_2), F2(MSIOF4_RXD), F3(SCIFB2_RXD_297), F4(MSIOF6_RXD),
425 F1(SDHID2_3), F2(MSIOF4_SYNC), F3(SCIFB2_CTS_298), F4(MSIOF6_SYNC),
426 F1(SDHICLK2), F2(MSIOF4_SCK), F3(SCIFB2_SCK_299), F4(MSIOF6_SCK),
427 F1(SDHICMD2), F2(MSIOF4_SS1), F3(SCIFB2_RTS_300),
428 F4(MSIOF6_SS1), /* Port300 */
429 F1(SDHICD0), IRQ(50), F1(SDHID0_0), F3(STMDATA0_1),
430 F1(SDHID0_1), F3(STMDATA1_1), F1(SDHID0_2), F3(STMDATA2_1),
431 F1(SDHID0_3), F3(STMDATA3_1), F1(SDHICMD0), F3(STMSIDI_1),
432 F1(SDHIWP0), F1(SDHICLK0), F3(STMCLK_1), IRQ(16), /* Port320 */
433 IRQ(17), IRQ(28), IRQ(29), IRQ(30), IRQ(53), IRQ(54),
434 IRQ(55), IRQ(56), IRQ(57),
435 PINMUX_MARK_END,
436};
437
438static const pinmux_enum_t pinmux_data[] = {
439 /* specify valid pin states for each pin in GPIO mode */
440
441 PORT_DATA_IO_PU_PD(0), PORT_DATA_IO_PU_PD(1),
442 PORT_DATA_IO_PU_PD(2), PORT_DATA_IO_PU_PD(3),
443 PORT_DATA_IO_PU_PD(4), PORT_DATA_IO_PU_PD(5),
444 PORT_DATA_IO_PU_PD(6), PORT_DATA_IO_PU_PD(7),
445 PORT_DATA_IO_PU_PD(8), PORT_DATA_IO_PU_PD(9),
446
447 PORT_DATA_IO_PU_PD(10), PORT_DATA_IO_PU_PD(11),
448 PORT_DATA_IO_PU_PD(12), PORT_DATA_IO_PU_PD(13),
449 PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
450 PORT_DATA_IO_PU_PD(16), PORT_DATA_IO_PU_PD(17),
451 PORT_DATA_IO_PU_PD(18), PORT_DATA_IO_PU_PD(19),
452
453 PORT_DATA_IO_PU_PD(20), PORT_DATA_IO_PU_PD(21),
454 PORT_DATA_IO_PU_PD(22), PORT_DATA_IO_PU_PD(23),
455 PORT_DATA_IO_PU_PD(24), PORT_DATA_IO_PU_PD(25),
456 PORT_DATA_IO_PU_PD(26), PORT_DATA_IO_PU_PD(27),
457 PORT_DATA_IO_PU_PD(28), PORT_DATA_IO_PU_PD(29),
458
459 PORT_DATA_IO_PU_PD(30), PORT_DATA_IO_PU_PD(32),
460 PORT_DATA_IO_PU_PD(33), PORT_DATA_IO_PU_PD(34),
461 PORT_DATA_IO_PU_PD(35), PORT_DATA_IO_PU_PD(36),
462 PORT_DATA_IO_PU_PD(37), PORT_DATA_IO_PU_PD(38),
463 PORT_DATA_IO_PU_PD(39), PORT_DATA_IO_PU_PD(40),
464
465 PORT_DATA_IO_PU_PD(64), PORT_DATA_IO_PU_PD(65),
466 PORT_DATA_IO_PU_PD(66), PORT_DATA_IO_PU_PD(67),
467 PORT_DATA_IO_PU_PD(68), PORT_DATA_IO_PU_PD(69),
468
469 PORT_DATA_IO_PU_PD(70), PORT_DATA_IO_PU_PD(71),
470 PORT_DATA_IO_PU_PD(72), PORT_DATA_IO_PU_PD(73),
471 PORT_DATA_O(74), PORT_DATA_IO_PU_PD(75),
472 PORT_DATA_IO_PU_PD(76), PORT_DATA_IO_PU_PD(77),
473 PORT_DATA_IO_PU_PD(78), PORT_DATA_IO_PU_PD(79),
474
475 PORT_DATA_IO_PU_PD(80), PORT_DATA_IO_PU_PD(81),
476 PORT_DATA_IO_PU_PD(82), PORT_DATA_IO_PU_PD(83),
477 PORT_DATA_IO_PU_PD(84), PORT_DATA_IO_PU_PD(85),
478
479 PORT_DATA_IO_PU_PD(96), PORT_DATA_IO_PU_PD(97),
480 PORT_DATA_IO_PU_PD(98), PORT_DATA_IO_PU_PD(99),
481
482 PORT_DATA_IO_PU_PD(100), PORT_DATA_IO_PU_PD(101),
483 PORT_DATA_IO_PU_PD(102), PORT_DATA_IO_PU_PD(103),
484 PORT_DATA_IO_PU_PD(104), PORT_DATA_IO_PU_PD(105),
485 PORT_DATA_IO_PU_PD(106), PORT_DATA_IO_PU_PD(107),
486 PORT_DATA_IO_PU_PD(108), PORT_DATA_IO_PU_PD(109),
487
488 PORT_DATA_IO_PU_PD(110), PORT_DATA_IO_PU_PD(111),
489 PORT_DATA_IO_PU_PD(112), PORT_DATA_IO_PU_PD(113),
490 PORT_DATA_IO_PU_PD(114), PORT_DATA_IO_PU_PD(115),
491 PORT_DATA_IO_PU_PD(116), PORT_DATA_IO_PU_PD(117),
492 PORT_DATA_IO_PU_PD(118), PORT_DATA_IO_PU_PD(119),
493
494 PORT_DATA_IO_PU_PD(120), PORT_DATA_IO_PU_PD(121),
495 PORT_DATA_IO_PU_PD(122), PORT_DATA_IO_PU_PD(123),
496 PORT_DATA_IO_PU_PD(124), PORT_DATA_IO_PU_PD(125),
497 PORT_DATA_IO_PU_PD(126),
498 PORT_DATA_IO_PU_PD(128), PORT_DATA_IO_PU_PD(129),
499
500 PORT_DATA_IO_PU_PD(130), PORT_DATA_IO_PU_PD(131),
501 PORT_DATA_IO_PU_PD(132), PORT_DATA_IO_PU_PD(133),
502 PORT_DATA_IO_PU_PD(134),
503
504 PORT_DATA_IO_PU_PD(160), PORT_DATA_IO_PU_PD(161),
505 PORT_DATA_IO_PU_PD(162), PORT_DATA_IO_PU_PD(163),
506 PORT_DATA_IO_PU_PD(164), PORT_DATA_IO_PU_PD(165),
507 PORT_DATA_IO_PU_PD(166), PORT_DATA_IO_PU_PD(167),
508 PORT_DATA_IO_PU_PD(168), PORT_DATA_IO_PU_PD(169),
509
510 PORT_DATA_IO_PU_PD(170), PORT_DATA_IO_PU_PD(171),
511 PORT_DATA_IO_PU_PD(172), PORT_DATA_IO_PU_PD(173),
512 PORT_DATA_IO_PU_PD(174), PORT_DATA_IO_PU_PD(175),
513 PORT_DATA_IO_PU_PD(176), PORT_DATA_IO_PU_PD(177),
514 PORT_DATA_IO_PU_PD(178),
515
516 PORT_DATA_IO_PU_PD(192), PORT_DATA_IO_PU_PD(193),
517 PORT_DATA_IO_PU_PD(194), PORT_DATA_IO_PU_PD(195),
518 PORT_DATA_IO_PU_PD(196), PORT_DATA_IO_PU_PD(197),
519 PORT_DATA_IO_PU_PD(198), PORT_DATA_IO_PU_PD(199),
520
521 PORT_DATA_IO_PU_PD(200), PORT_DATA_IO_PU_PD(201),
522 PORT_DATA_IO_PU_PD(202), PORT_DATA_IO_PU_PD(203),
523 PORT_DATA_IO_PU_PD(204), PORT_DATA_IO_PU_PD(205),
524 PORT_DATA_IO_PU_PD(206), PORT_DATA_IO_PU_PD(207),
525 PORT_DATA_IO_PU_PD(208), PORT_DATA_IO_PU_PD(209),
526
527 PORT_DATA_IO_PU_PD(210), PORT_DATA_IO_PU_PD(211),
528 PORT_DATA_IO_PU_PD(212), PORT_DATA_IO_PU_PD(213),
529 PORT_DATA_IO_PU_PD(214), PORT_DATA_IO_PU_PD(215),
530 PORT_DATA_IO_PU_PD(216), PORT_DATA_IO_PU_PD(217),
531 PORT_DATA_IO_PU_PD(218), PORT_DATA_IO_PU_PD(219),
532
533 PORT_DATA_IO_PU_PD(220), PORT_DATA_IO_PU_PD(221),
534 PORT_DATA_IO_PU_PD(222), PORT_DATA_IO_PU_PD(224),
535 PORT_DATA_IO_PU_PD(225), PORT_DATA_IO_PU_PD(226),
536 PORT_DATA_IO_PU_PD(227), PORT_DATA_IO_PU_PD(228),
537 PORT_DATA_IO_PU_PD(229),
538
539 PORT_DATA_IO_PU_PD(230), PORT_DATA_IO_PU_PD(231),
540 PORT_DATA_IO_PU_PD(232), PORT_DATA_IO_PU_PD(233),
541 PORT_DATA_IO_PU_PD(234), PORT_DATA_IO_PU_PD(235),
542 PORT_DATA_IO_PU_PD(236), PORT_DATA_IO_PU_PD(237),
543 PORT_DATA_IO_PU_PD(238), PORT_DATA_IO_PU_PD(239),
544
545 PORT_DATA_IO_PU_PD(240), PORT_DATA_IO_PU_PD(241),
546 PORT_DATA_IO_PU_PD(242), PORT_DATA_IO_PU_PD(243),
547 PORT_DATA_IO_PU_PD(244), PORT_DATA_IO_PU_PD(245),
548 PORT_DATA_IO_PU_PD(246), PORT_DATA_IO_PU_PD(247),
549 PORT_DATA_IO_PU_PD(248), PORT_DATA_IO_PU_PD(249),
550
551 PORT_DATA_IO_PU_PD(250),
552 PORT_DATA_IO_PU_PD(256), PORT_DATA_IO_PU_PD(257),
553 PORT_DATA_IO_PU_PD(258), PORT_DATA_IO_PU_PD(259),
554
555 PORT_DATA_IO_PU_PD(260), PORT_DATA_IO_PU_PD(261),
556 PORT_DATA_IO_PU_PD(262), PORT_DATA_IO_PU_PD(263),
557 PORT_DATA_IO_PU_PD(264), PORT_DATA_IO_PU_PD(265),
558 PORT_DATA_IO_PU_PD(266), PORT_DATA_IO_PU_PD(267),
559 PORT_DATA_IO_PU_PD(268), PORT_DATA_IO_PU_PD(269),
560
561 PORT_DATA_IO_PU_PD(270), PORT_DATA_IO_PU_PD(271),
562 PORT_DATA_IO_PU_PD(272), PORT_DATA_IO_PU_PD(273),
563 PORT_DATA_IO_PU_PD(274), PORT_DATA_IO_PU_PD(275),
564 PORT_DATA_IO_PU_PD(276), PORT_DATA_IO_PU_PD(277),
565 PORT_DATA_IO_PU_PD(278), PORT_DATA_IO_PU_PD(279),
566
567 PORT_DATA_IO_PU_PD(280), PORT_DATA_IO_PU_PD(281),
568 PORT_DATA_IO_PU_PD(282), PORT_DATA_IO_PU_PD(283),
569 PORT_DATA_O(288), PORT_DATA_IO_PU_PD(289),
570
571 PORT_DATA_IO_PU_PD(290), PORT_DATA_IO_PU_PD(291),
572 PORT_DATA_IO_PU_PD(292), PORT_DATA_IO_PU_PD(293),
573 PORT_DATA_IO_PU_PD(294), PORT_DATA_IO_PU_PD(295),
574 PORT_DATA_IO_PU_PD(296), PORT_DATA_IO_PU_PD(297),
575 PORT_DATA_IO_PU_PD(298), PORT_DATA_IO_PU_PD(299),
576
577 PORT_DATA_IO_PU_PD(300), PORT_DATA_IO_PU_PD(301),
578 PORT_DATA_IO_PU_PD(302), PORT_DATA_IO_PU_PD(303),
579 PORT_DATA_IO_PU_PD(304), PORT_DATA_IO_PU_PD(305),
580 PORT_DATA_IO_PU_PD(306), PORT_DATA_IO_PU_PD(307),
581 PORT_DATA_IO_PU_PD(308),
582
583 PORT_DATA_IO_PU_PD(320), PORT_DATA_IO_PU_PD(321),
584 PORT_DATA_IO_PU_PD(322), PORT_DATA_IO_PU_PD(323),
585 PORT_DATA_IO_PU_PD(324), PORT_DATA_IO_PU_PD(325),
586 PORT_DATA_IO_PU_PD(326), PORT_DATA_IO_PU_PD(327),
587 PORT_DATA_IO_PU_PD(328), PORT_DATA_IO_PU_PD(329),
588
589 /* Port0 */
590 PINMUX_DATA(LCDD0_MARK, PORT0_FN1),
591 PINMUX_DATA(PDM2_CLK_0_MARK, PORT0_FN3),
592 PINMUX_DATA(DU0_DR0_MARK, PORT0_FN7),
593 PINMUX_DATA(IRQ0_MARK, PORT0_FN0),
594
595 /* Port1 */
596 PINMUX_DATA(LCDD1_MARK, PORT1_FN1),
597 PINMUX_DATA(PDM2_DATA_1_MARK, PORT1_FN3, MSEL3CR_12_0),
598 PINMUX_DATA(DU0_DR19_MARK, PORT1_FN7),
599 PINMUX_DATA(IRQ1_MARK, PORT1_FN0),
600
601 /* Port2 */
602 PINMUX_DATA(LCDD2_MARK, PORT2_FN1),
603 PINMUX_DATA(PDM3_CLK_2_MARK, PORT2_FN3),
604 PINMUX_DATA(DU0_DR2_MARK, PORT2_FN7),
605 PINMUX_DATA(IRQ2_MARK, PORT2_FN0),
606
607 /* Port3 */
608 PINMUX_DATA(LCDD3_MARK, PORT3_FN1),
609 PINMUX_DATA(PDM3_DATA_3_MARK, PORT3_FN3, MSEL3CR_12_0),
610 PINMUX_DATA(DU0_DR3_MARK, PORT3_FN7),
611 PINMUX_DATA(IRQ3_MARK, PORT3_FN0),
612
613 /* Port4 */
614 PINMUX_DATA(LCDD4_MARK, PORT4_FN1),
615 PINMUX_DATA(PDM4_CLK_4_MARK, PORT4_FN3),
616 PINMUX_DATA(DU0_DR4_MARK, PORT4_FN7),
617 PINMUX_DATA(IRQ4_MARK, PORT4_FN0),
618
619 /* Port5 */
620 PINMUX_DATA(LCDD5_MARK, PORT5_FN1),
621 PINMUX_DATA(PDM4_DATA_5_MARK, PORT5_FN3, MSEL3CR_12_0),
622 PINMUX_DATA(DU0_DR5_MARK, PORT5_FN7),
623 PINMUX_DATA(IRQ5_MARK, PORT5_FN0),
624
625 /* Port6 */
626 PINMUX_DATA(LCDD6_MARK, PORT6_FN1),
627 PINMUX_DATA(PDM0_OUTCLK_6_MARK, PORT6_FN3),
628 PINMUX_DATA(DU0_DR6_MARK, PORT6_FN7),
629 PINMUX_DATA(IRQ6_MARK, PORT6_FN0),
630
631 /* Port7 */
632 PINMUX_DATA(LCDD7_MARK, PORT7_FN1),
633 PINMUX_DATA(PDM0_OUTDATA_7_MARK, PORT7_FN3),
634 PINMUX_DATA(DU0_DR7_MARK, PORT7_FN7),
635 PINMUX_DATA(IRQ7_MARK, PORT7_FN0),
636
637 /* Port8 */
638 PINMUX_DATA(LCDD8_MARK, PORT8_FN1),
639 PINMUX_DATA(PDM1_OUTCLK_8_MARK, PORT8_FN3),
640 PINMUX_DATA(DU0_DG0_MARK, PORT8_FN7),
641 PINMUX_DATA(IRQ8_MARK, PORT8_FN0),
642
643 /* Port9 */
644 PINMUX_DATA(LCDD9_MARK, PORT9_FN1),
645 PINMUX_DATA(PDM1_OUTDATA_9_MARK, PORT9_FN3),
646 PINMUX_DATA(DU0_DG1_MARK, PORT9_FN7),
647 PINMUX_DATA(IRQ9_MARK, PORT9_FN0),
648
649 /* Port10 */
650 PINMUX_DATA(LCDD10_MARK, PORT10_FN1),
651 PINMUX_DATA(FSICCK_MARK, PORT10_FN3),
652 PINMUX_DATA(DU0_DG2_MARK, PORT10_FN7),
653 PINMUX_DATA(IRQ10_MARK, PORT10_FN0),
654
655 /* Port11 */
656 PINMUX_DATA(LCDD11_MARK, PORT11_FN1),
657 PINMUX_DATA(FSICISLD_MARK, PORT11_FN3),
658 PINMUX_DATA(DU0_DG3_MARK, PORT11_FN7),
659 PINMUX_DATA(IRQ11_MARK, PORT11_FN0),
660
661 /* Port12 */
662 PINMUX_DATA(LCDD12_MARK, PORT12_FN1),
663 PINMUX_DATA(FSICOMC_MARK, PORT12_FN3),
664 PINMUX_DATA(DU0_DG4_MARK, PORT12_FN7),
665 PINMUX_DATA(IRQ12_MARK, PORT12_FN0),
666
667 /* Port13 */
668 PINMUX_DATA(LCDD13_MARK, PORT13_FN1),
669 PINMUX_DATA(FSICOLR_MARK, PORT13_FN3),
670 PINMUX_DATA(FSICILR_MARK, PORT13_FN4),
671 PINMUX_DATA(DU0_DG5_MARK, PORT13_FN7),
672 PINMUX_DATA(IRQ13_MARK, PORT13_FN0),
673
674 /* Port14 */
675 PINMUX_DATA(LCDD14_MARK, PORT14_FN1),
676 PINMUX_DATA(FSICOBT_MARK, PORT14_FN3),
677 PINMUX_DATA(FSICIBT_MARK, PORT14_FN4),
678 PINMUX_DATA(DU0_DG6_MARK, PORT14_FN7),
679 PINMUX_DATA(IRQ14_MARK, PORT14_FN0),
680
681 /* Port15 */
682 PINMUX_DATA(LCDD15_MARK, PORT15_FN1),
683 PINMUX_DATA(FSICOSLD_MARK, PORT15_FN3),
684 PINMUX_DATA(DU0_DG7_MARK, PORT15_FN7),
685 PINMUX_DATA(IRQ15_MARK, PORT15_FN0),
686
687 /* Port16 */
688 PINMUX_DATA(LCDD16_MARK, PORT16_FN1),
689 PINMUX_DATA(TPU1TO1_MARK, PORT16_FN4),
690 PINMUX_DATA(DU0_DB0_MARK, PORT16_FN7),
691
692 /* Port17 */
693 PINMUX_DATA(LCDD17_MARK, PORT17_FN1),
694 PINMUX_DATA(SF_IRQ_00_MARK, PORT17_FN4),
695 PINMUX_DATA(DU0_DB1_MARK, PORT17_FN7),
696
697 /* Port18 */
698 PINMUX_DATA(LCDD18_MARK, PORT18_FN1),
699 PINMUX_DATA(SF_IRQ_01_MARK, PORT18_FN4),
700 PINMUX_DATA(DU0_DB2_MARK, PORT18_FN7),
701
702 /* Port19 */
703 PINMUX_DATA(LCDD19_MARK, PORT19_FN1),
704 PINMUX_DATA(SCIFB3_RTS_19_MARK, PORT19_FN3),
705 PINMUX_DATA(DU0_DB3_MARK, PORT19_FN7),
706
707 /* Port20 */
708 PINMUX_DATA(LCDD20_MARK, PORT20_FN1),
709 PINMUX_DATA(SCIFB3_CTS_20_MARK, PORT20_FN3, MSEL3CR_09_0),
710 PINMUX_DATA(DU0_DB4_MARK, PORT20_FN7),
711
712 /* Port21 */
713 PINMUX_DATA(LCDD21_MARK, PORT21_FN1),
714 PINMUX_DATA(SCIFB3_TXD_21_MARK, PORT21_FN3, MSEL3CR_09_0),
715 PINMUX_DATA(DU0_DB5_MARK, PORT21_FN7),
716
717 /* Port22 */
718 PINMUX_DATA(LCDD22_MARK, PORT22_FN1),
719 PINMUX_DATA(SCIFB3_RXD_22_MARK, PORT22_FN3, MSEL3CR_09_0),
720 PINMUX_DATA(DU0_DB6_MARK, PORT22_FN7),
721
722 /* Port23 */
723 PINMUX_DATA(LCDD23_MARK, PORT23_FN1),
724 PINMUX_DATA(SCIFB3_SCK_23_MARK, PORT23_FN3),
725 PINMUX_DATA(DU0_DB7_MARK, PORT23_FN7),
726
727 /* Port24 */
728 PINMUX_DATA(LCDHSYN_MARK, PORT24_FN1),
729 PINMUX_DATA(LCDCS_MARK, PORT24_FN2),
730 PINMUX_DATA(SCIFB1_RTS_24_MARK, PORT24_FN3),
731 PINMUX_DATA(DU0_EXHSYNC_N_CSYNC_N_HSYNC_N_MARK, PORT24_FN7),
732
733 /* Port25 */
734 PINMUX_DATA(LCDVSYN_MARK, PORT25_FN1),
735 PINMUX_DATA(SCIFB1_CTS_25_MARK, PORT25_FN3, MSEL3CR_11_0),
736 PINMUX_DATA(DU0_EXVSYNC_N_VSYNC_N_CSYNC_N_MARK, PORT25_FN7),
737
738 /* Port26 */
739 PINMUX_DATA(LCDDCK_MARK, PORT26_FN1),
740 PINMUX_DATA(LCDWR_MARK, PORT26_FN2),
741 PINMUX_DATA(SCIFB1_TXD_26_MARK, PORT26_FN3, MSEL3CR_11_0),
742 PINMUX_DATA(DU0_DOTCLKIN_MARK, PORT26_FN7),
743
744 /* Port27 */
745 PINMUX_DATA(LCDDISP_MARK, PORT27_FN1),
746 PINMUX_DATA(LCDRS_MARK, PORT27_FN2),
747 PINMUX_DATA(SCIFB1_RXD_27_MARK, PORT27_FN3, MSEL3CR_11_0),
748 PINMUX_DATA(DU0_DOTCLKOUT_MARK, PORT27_FN7),
749
750 /* Port28 */
751 PINMUX_DATA(LCDRD_N_MARK, PORT28_FN1),
752 PINMUX_DATA(SCIFB1_SCK_28_MARK, PORT28_FN3),
753 PINMUX_DATA(DU0_DOTCLKOUTB_MARK, PORT28_FN7),
754
755 /* Port29 */
756 PINMUX_DATA(LCDLCLK_MARK, PORT29_FN1),
757 PINMUX_DATA(SF_IRQ_02_MARK, PORT29_FN4),
758 PINMUX_DATA(DU0_DISP_CSYNC_N_DE_MARK, PORT29_FN7),
759
760 /* Port30 */
761 PINMUX_DATA(LCDDON_MARK, PORT30_FN1),
762 PINMUX_DATA(SF_IRQ_03_MARK, PORT30_FN4),
763 PINMUX_DATA(DU0_ODDF_N_CLAMP_MARK, PORT30_FN7),
764
765 /* Port32 */
766 PINMUX_DATA(SCIFA0_RTS_MARK, PORT32_FN1),
767 PINMUX_DATA(SIM0_DET_MARK, PORT32_FN5),
768 PINMUX_DATA(CSCIF0_RTS_MARK, PORT32_FN7),
769
770 /* Port33 */
771 PINMUX_DATA(SCIFA0_CTS_MARK, PORT33_FN1),
772 PINMUX_DATA(SIM1_DET_MARK, PORT33_FN5),
773 PINMUX_DATA(CSCIF0_CTS_MARK, PORT33_FN7),
774
775 /* Port34 */
776 PINMUX_DATA(SCIFA0_SCK_MARK, PORT34_FN1),
777 PINMUX_DATA(SIM0_PWRON_MARK, PORT34_FN5),
778 PINMUX_DATA(CSCIF0_SCK_MARK, PORT34_FN7),
779
780 /* Port35 */
781 PINMUX_DATA(SCIFA1_RTS_MARK, PORT35_FN1),
782 PINMUX_DATA(CSCIF1_RTS_MARK, PORT35_FN7),
783
784 /* Port36 */
785 PINMUX_DATA(SCIFA1_CTS_MARK, PORT36_FN1),
786 PINMUX_DATA(CSCIF1_CTS_MARK, PORT36_FN7),
787
788 /* Port37 */
789 PINMUX_DATA(SCIFA1_SCK_MARK, PORT37_FN1),
790 PINMUX_DATA(CSCIF1_SCK_MARK, PORT37_FN7),
791
792 /* Port38 */
793 PINMUX_DATA(SCIFB0_RTS_MARK, PORT38_FN1),
794 PINMUX_DATA(TPU0TO1_MARK, PORT38_FN3),
795 PINMUX_DATA(SCIFB3_RTS_38_MARK, PORT38_FN4),
796 PINMUX_DATA(CHSCIF0_HRTS_MARK, PORT38_FN7),
797
798 /* Port39 */
799 PINMUX_DATA(SCIFB0_CTS_MARK, PORT39_FN1),
800 PINMUX_DATA(TPU0TO2_MARK, PORT39_FN3),
801 PINMUX_DATA(SCIFB3_CTS_39_MARK, PORT39_FN4, MSEL3CR_09_1),
802 PINMUX_DATA(CHSCIF0_HCTS_MARK, PORT39_FN7),
803
804 /* Port40 */
805 PINMUX_DATA(SCIFB0_SCK_MARK, PORT40_FN1),
806 PINMUX_DATA(TPU0TO3_MARK, PORT40_FN3),
807 PINMUX_DATA(SCIFB3_SCK_40_MARK, PORT40_FN4),
808 PINMUX_DATA(CHSCIF0_HSCK_MARK, PORT40_FN7),
809
810 /* Port64 */
811 PINMUX_DATA(PDM0_DATA_MARK, PORT64_FN1),
812
813 /* Port65 */
814 PINMUX_DATA(PDM1_DATA_MARK, PORT65_FN1),
815
816 /* Port66 */
817 PINMUX_DATA(HSI_RX_WAKE_MARK, PORT66_FN1),
818 PINMUX_DATA(SCIFB2_CTS_66_MARK, PORT66_FN2, MSEL3CR_10_0),
819 PINMUX_DATA(MSIOF3_SYNC_MARK, PORT66_FN3),
820 PINMUX_DATA(GenIO4_MARK, PORT66_FN5),
821 PINMUX_DATA(IRQ40_MARK, PORT66_FN0),
822
823 /* Port67 */
824 PINMUX_DATA(HSI_RX_READY_MARK, PORT67_FN1),
825 PINMUX_DATA(SCIFB1_TXD_67_MARK, PORT67_FN2, MSEL3CR_11_1),
826 PINMUX_DATA(GIO_OUT3_67_MARK, PORT67_FN5),
827 PINMUX_DATA(CHSCIF1_HTX_MARK, PORT67_FN7),
828
829 /* Port68 */
830 PINMUX_DATA(HSI_RX_FLAG_MARK, PORT68_FN1),
831 PINMUX_DATA(SCIFB2_TXD_68_MARK, PORT68_FN2, MSEL3CR_10_0),
832 PINMUX_DATA(MSIOF3_TXD_MARK, PORT68_FN3),
833 PINMUX_DATA(GIO_OUT4_68_MARK, PORT68_FN5),
834
835 /* Port69 */
836 PINMUX_DATA(HSI_RX_DATA_MARK, PORT69_FN1),
837 PINMUX_DATA(SCIFB2_RXD_69_MARK, PORT69_FN2, MSEL3CR_10_0),
838 PINMUX_DATA(MSIOF3_RXD_MARK, PORT69_FN3),
839 PINMUX_DATA(GIO_OUT5_69_MARK, PORT69_FN5),
840
841 /* Port70 */
842 PINMUX_DATA(HSI_TX_FLAG_MARK, PORT70_FN1),
843 PINMUX_DATA(SCIFB1_RTS_70_MARK, PORT70_FN2),
844 PINMUX_DATA(GIO_OUT1_70_MARK, PORT70_FN5),
845 PINMUX_DATA(HSIC_TSTCLK0_MARK, PORT70_FN6),
846 PINMUX_DATA(CHSCIF1_HRTS_MARK, PORT70_FN7),
847
848 /* Port71 */
849 PINMUX_DATA(HSI_TX_DATA_MARK, PORT71_FN1),
850 PINMUX_DATA(SCIFB1_CTS_71_MARK, PORT71_FN2, MSEL3CR_11_1),
851 PINMUX_DATA(GIO_OUT2_71_MARK, PORT71_FN5),
852 PINMUX_DATA(HSIC_TSTCLK1_MARK, PORT71_FN6),
853 PINMUX_DATA(CHSCIF1_HCTS_MARK, PORT71_FN7),
854
855 /* Port72 */
856 PINMUX_DATA(HSI_TX_WAKE_MARK, PORT72_FN1),
857 PINMUX_DATA(SCIFB1_RXD_72_MARK, PORT72_FN2, MSEL3CR_11_1),
858 PINMUX_DATA(GenIO8_MARK, PORT72_FN5),
859 PINMUX_DATA(CHSCIF1_HRX_MARK, PORT72_FN7),
860
861 /* Port73 */
862 PINMUX_DATA(HSI_TX_READY_MARK, PORT73_FN1),
863 PINMUX_DATA(SCIFB2_RTS_73_MARK, PORT73_FN2),
864 PINMUX_DATA(MSIOF3_SCK_MARK, PORT73_FN3),
865 PINMUX_DATA(GIO_OUT0_73_MARK, PORT73_FN5),
866
867 /* Port74 - Port85 */
868 PINMUX_DATA(IRDA_OUT_MARK, PORT74_FN1),
869 PINMUX_DATA(IRDA_IN_MARK, PORT75_FN1),
870 PINMUX_DATA(IRDA_FIRSEL_MARK, PORT76_FN1),
871 PINMUX_DATA(TPU0TO0_MARK, PORT77_FN1),
872 PINMUX_DATA(DIGRFEN_MARK, PORT78_FN1),
873 PINMUX_DATA(GPS_TIMESTAMP_MARK, PORT79_FN1),
874 PINMUX_DATA(TXP_MARK, PORT80_FN1),
875 PINMUX_DATA(TXP2_MARK, PORT81_FN1),
876 PINMUX_DATA(COEX_0_MARK, PORT82_FN1),
877 PINMUX_DATA(COEX_1_MARK, PORT83_FN1),
878 PINMUX_DATA(IRQ19_MARK, PORT84_FN0),
879 PINMUX_DATA(IRQ18_MARK, PORT85_FN0),
880
881 /* Port96 - Port101 */
882 PINMUX_DATA(KEYIN0_MARK, PORT96_FN1),
883 PINMUX_DATA(KEYIN1_MARK, PORT97_FN1),
884 PINMUX_DATA(KEYIN2_MARK, PORT98_FN1),
885 PINMUX_DATA(KEYIN3_MARK, PORT99_FN1),
886 PINMUX_DATA(KEYIN4_MARK, PORT100_FN1),
887 PINMUX_DATA(KEYIN5_MARK, PORT101_FN1),
888
889 /* Port102 */
890 PINMUX_DATA(KEYIN6_MARK, PORT102_FN1),
891 PINMUX_DATA(IRQ41_MARK, PORT102_FN0),
892
893 /* Port103 */
894 PINMUX_DATA(KEYIN7_MARK, PORT103_FN1),
895 PINMUX_DATA(IRQ42_MARK, PORT103_FN0),
896
897 /* Port104 - Port108 */
898 PINMUX_DATA(KEYOUT0_MARK, PORT104_FN2),
899 PINMUX_DATA(KEYOUT1_MARK, PORT105_FN2),
900 PINMUX_DATA(KEYOUT2_MARK, PORT106_FN2),
901 PINMUX_DATA(KEYOUT3_MARK, PORT107_FN2),
902 PINMUX_DATA(KEYOUT4_MARK, PORT108_FN2),
903
904 /* Port109 */
905 PINMUX_DATA(KEYOUT5_MARK, PORT109_FN2),
906 PINMUX_DATA(IRQ43_MARK, PORT109_FN0),
907
908 /* Port110 */
909 PINMUX_DATA(KEYOUT6_MARK, PORT110_FN2),
910 PINMUX_DATA(IRQ44_MARK, PORT110_FN0),
911
912 /* Port111 */
913 PINMUX_DATA(KEYOUT7_MARK, PORT111_FN2),
914 PINMUX_DATA(RFANAEN_MARK, PORT111_FN5),
915 PINMUX_DATA(IRQ45_MARK, PORT111_FN0),
916
917 /* Port112 */
918 PINMUX_DATA(KEYIN8_MARK, PORT112_FN1),
919 PINMUX_DATA(KEYOUT8_MARK, PORT112_FN2),
920 PINMUX_DATA(SF_IRQ_04_MARK, PORT112_FN4),
921 PINMUX_DATA(IRQ46_MARK, PORT112_FN0),
922
923 /* Port113 */
924 PINMUX_DATA(KEYIN9_MARK, PORT113_FN1),
925 PINMUX_DATA(KEYOUT9_MARK, PORT113_FN2),
926 PINMUX_DATA(SF_IRQ_05_MARK, PORT113_FN4),
927 PINMUX_DATA(IRQ47_MARK, PORT113_FN0),
928
929 /* Port114 */
930 PINMUX_DATA(KEYIN10_MARK, PORT114_FN1),
931 PINMUX_DATA(KEYOUT10_MARK, PORT114_FN2),
932 PINMUX_DATA(SF_IRQ_06_MARK, PORT114_FN4),
933 PINMUX_DATA(IRQ48_MARK, PORT114_FN0),
934
935 /* Port115 */
936 PINMUX_DATA(KEYIN11_MARK, PORT115_FN1),
937 PINMUX_DATA(KEYOUT11_MARK, PORT115_FN2),
938 PINMUX_DATA(SF_IRQ_07_MARK, PORT115_FN4),
939 PINMUX_DATA(IRQ49_MARK, PORT115_FN0),
940
941 /* Port116 */
942 PINMUX_DATA(SCIFA0_TXD_MARK, PORT116_FN1),
943 PINMUX_DATA(CSCIF0_TX_MARK, PORT116_FN7),
944
945 /* Port117 */
946 PINMUX_DATA(SCIFA0_RXD_MARK, PORT117_FN1),
947 PINMUX_DATA(CSCIF0_RX_MARK, PORT117_FN7),
948
949 /* Port118 */
950 PINMUX_DATA(SCIFA1_TXD_MARK, PORT118_FN1),
951 PINMUX_DATA(CSCIF1_TX_MARK, PORT118_FN7),
952
953 /* Port119 */
954 PINMUX_DATA(SCIFA1_RXD_MARK, PORT119_FN1),
955 PINMUX_DATA(CSCIF1_RX_MARK, PORT119_FN7),
956
957 /* Port120 */
958 PINMUX_DATA(SF_PORT_1_120_MARK, PORT120_FN3),
959 PINMUX_DATA(SCIFB3_RXD_120_MARK, PORT120_FN4, MSEL3CR_09_1),
960 PINMUX_DATA(DU0_CDE_MARK, PORT120_FN7),
961
962 /* Port121 */
963 PINMUX_DATA(SF_PORT_0_121_MARK, PORT121_FN3),
964 PINMUX_DATA(SCIFB3_TXD_121_MARK, PORT121_FN4, MSEL3CR_09_1),
965
966 /* Port122 */
967 PINMUX_DATA(SCIFB0_TXD_MARK, PORT122_FN1),
968 PINMUX_DATA(CHSCIF0_HTX_MARK, PORT122_FN7),
969
970 /* Port123 */
971 PINMUX_DATA(SCIFB0_RXD_MARK, PORT123_FN1),
972 PINMUX_DATA(CHSCIF0_HRX_MARK, PORT123_FN7),
973
974 /* Port124 */
975 PINMUX_DATA(ISP_STROBE_124_MARK, PORT124_FN3),
976
977 /* Port125 */
978 PINMUX_DATA(STP_ISD_0_MARK, PORT125_FN1),
979 PINMUX_DATA(PDM4_CLK_125_MARK, PORT125_FN2),
980 PINMUX_DATA(MSIOF2_TXD_MARK, PORT125_FN3),
981 PINMUX_DATA(SIM0_VOLTSEL0_MARK, PORT125_FN5),
982
983 /* Port126 */
984 PINMUX_DATA(TS_SDEN_MARK, PORT126_FN1),
985 PINMUX_DATA(MSIOF7_SYNC_MARK, PORT126_FN2),
986 PINMUX_DATA(STP_ISEN_1_MARK, PORT126_FN3),
987
988 /* Port128 */
989 PINMUX_DATA(STP_ISEN_0_MARK, PORT128_FN1),
990 PINMUX_DATA(PDM1_OUTDATA_128_MARK, PORT128_FN2),
991 PINMUX_DATA(MSIOF2_SYNC_MARK, PORT128_FN3),
992 PINMUX_DATA(SIM1_VOLTSEL1_MARK, PORT128_FN5),
993
994 /* Port129 */
995 PINMUX_DATA(TS_SPSYNC_MARK, PORT129_FN1),
996 PINMUX_DATA(MSIOF7_RXD_MARK, PORT129_FN2),
997 PINMUX_DATA(STP_ISSYNC_1_MARK, PORT129_FN3),
998
999 /* Port130 */
1000 PINMUX_DATA(STP_ISSYNC_0_MARK, PORT130_FN1),
1001 PINMUX_DATA(PDM4_DATA_130_MARK, PORT130_FN2, MSEL3CR_12_1),
1002 PINMUX_DATA(MSIOF2_RXD_MARK, PORT130_FN3),
1003 PINMUX_DATA(SIM0_VOLTSEL1_MARK, PORT130_FN5),
1004
1005 /* Port131 */
1006 PINMUX_DATA(STP_OPWM_0_MARK, PORT131_FN1),
1007 PINMUX_DATA(SIM1_PWRON_MARK, PORT131_FN5),
1008
1009 /* Port132 */
1010 PINMUX_DATA(TS_SCK_MARK, PORT132_FN1),
1011 PINMUX_DATA(MSIOF7_SCK_MARK, PORT132_FN2),
1012 PINMUX_DATA(STP_ISCLK_1_MARK, PORT132_FN3),
1013
1014 /* Port133 */
1015 PINMUX_DATA(STP_ISCLK_0_MARK, PORT133_FN1),
1016 PINMUX_DATA(PDM1_OUTCLK_133_MARK, PORT133_FN2),
1017 PINMUX_DATA(MSIOF2_SCK_MARK, PORT133_FN3),
1018 PINMUX_DATA(SIM1_VOLTSEL0_MARK, PORT133_FN5),
1019
1020 /* Port134 */
1021 PINMUX_DATA(TS_SDAT_MARK, PORT134_FN1),
1022 PINMUX_DATA(MSIOF7_TXD_MARK, PORT134_FN2),
1023 PINMUX_DATA(STP_ISD_1_MARK, PORT134_FN3),
1024
1025 /* Port160 - Port178 */
1026 PINMUX_DATA(IRQ20_MARK, PORT160_FN0),
1027 PINMUX_DATA(IRQ21_MARK, PORT161_FN0),
1028 PINMUX_DATA(IRQ22_MARK, PORT162_FN0),
1029 PINMUX_DATA(IRQ23_MARK, PORT163_FN0),
1030 PINMUX_DATA(MMCD0_0_MARK, PORT164_FN1),
1031 PINMUX_DATA(MMCD0_1_MARK, PORT165_FN1),
1032 PINMUX_DATA(MMCD0_2_MARK, PORT166_FN1),
1033 PINMUX_DATA(MMCD0_3_MARK, PORT167_FN1),
1034 PINMUX_DATA(MMCD0_4_MARK, PORT168_FN1),
1035 PINMUX_DATA(MMCD0_5_MARK, PORT169_FN1),
1036 PINMUX_DATA(MMCD0_6_MARK, PORT170_FN1),
1037 PINMUX_DATA(MMCD0_7_MARK, PORT171_FN1),
1038 PINMUX_DATA(MMCCMD0_MARK, PORT172_FN1),
1039 PINMUX_DATA(MMCCLK0_MARK, PORT173_FN1),
1040 PINMUX_DATA(MMCRST_MARK, PORT174_FN1),
1041 PINMUX_DATA(IRQ24_MARK, PORT175_FN0),
1042 PINMUX_DATA(IRQ25_MARK, PORT176_FN0),
1043 PINMUX_DATA(IRQ26_MARK, PORT177_FN0),
1044 PINMUX_DATA(IRQ27_MARK, PORT178_FN0),
1045
1046 /* Port192 - Port200 FN1 */
1047 PINMUX_DATA(A10_MARK, PORT192_FN1),
1048 PINMUX_DATA(A9_MARK, PORT193_FN1),
1049 PINMUX_DATA(A8_MARK, PORT194_FN1),
1050 PINMUX_DATA(A7_MARK, PORT195_FN1),
1051 PINMUX_DATA(A6_MARK, PORT196_FN1),
1052 PINMUX_DATA(A5_MARK, PORT197_FN1),
1053 PINMUX_DATA(A4_MARK, PORT198_FN1),
1054 PINMUX_DATA(A3_MARK, PORT199_FN1),
1055 PINMUX_DATA(A2_MARK, PORT200_FN1),
1056
1057 /* Port192 - Port200 FN2 */
1058 PINMUX_DATA(MMCD1_7_MARK, PORT192_FN2),
1059 PINMUX_DATA(MMCD1_6_MARK, PORT193_FN2),
1060 PINMUX_DATA(MMCD1_5_MARK, PORT194_FN2),
1061 PINMUX_DATA(MMCD1_4_MARK, PORT195_FN2),
1062 PINMUX_DATA(MMCD1_3_MARK, PORT196_FN2),
1063 PINMUX_DATA(MMCD1_2_MARK, PORT197_FN2),
1064 PINMUX_DATA(MMCD1_1_MARK, PORT198_FN2),
1065 PINMUX_DATA(MMCD1_0_MARK, PORT199_FN2),
1066 PINMUX_DATA(MMCCMD1_MARK, PORT200_FN2),
1067
1068 /* Port192 - Port200 IRQ */
1069 PINMUX_DATA(IRQ31_MARK, PORT192_FN0),
1070 PINMUX_DATA(IRQ32_MARK, PORT193_FN0),
1071 PINMUX_DATA(IRQ33_MARK, PORT194_FN0),
1072 PINMUX_DATA(IRQ34_MARK, PORT195_FN0),
1073 PINMUX_DATA(IRQ35_MARK, PORT196_FN0),
1074 PINMUX_DATA(IRQ36_MARK, PORT197_FN0),
1075 PINMUX_DATA(IRQ37_MARK, PORT198_FN0),
1076 PINMUX_DATA(IRQ38_MARK, PORT199_FN0),
1077 PINMUX_DATA(IRQ39_MARK, PORT200_FN0),
1078
1079 /* Port201 */
1080 PINMUX_DATA(A1_MARK, PORT201_FN1),
1081
1082 /* Port202 */
1083 PINMUX_DATA(A0_MARK, PORT202_FN1),
1084 PINMUX_DATA(BS_MARK, PORT202_FN2),
1085
1086 /* Port203 */
1087 PINMUX_DATA(CKO_MARK, PORT203_FN1),
1088 PINMUX_DATA(MMCCLK1_MARK, PORT203_FN2),
1089
1090 /* Port204 */
1091 PINMUX_DATA(CS0_N_MARK, PORT204_FN1),
1092 PINMUX_DATA(SIM0_GPO1_MARK, PORT204_FN5),
1093
1094 /* Port205 */
1095 PINMUX_DATA(CS2_N_MARK, PORT205_FN1),
1096 PINMUX_DATA(SIM0_GPO2_MARK, PORT205_FN5),
1097
1098 /* Port206 */
1099 PINMUX_DATA(CS4_N_MARK, PORT206_FN1),
1100 PINMUX_DATA(VIO_VD_MARK, PORT206_FN2),
1101 PINMUX_DATA(SIM1_GPO0_MARK, PORT206_FN5),
1102
1103 /* Port207 - Port212 FN1 */
1104 PINMUX_DATA(D15_MARK, PORT207_FN1),
1105 PINMUX_DATA(D14_MARK, PORT208_FN1),
1106 PINMUX_DATA(D13_MARK, PORT209_FN1),
1107 PINMUX_DATA(D12_MARK, PORT210_FN1),
1108 PINMUX_DATA(D11_MARK, PORT211_FN1),
1109 PINMUX_DATA(D10_MARK, PORT212_FN1),
1110
1111 /* Port207 - Port212 FN5 */
1112 PINMUX_DATA(GIO_OUT15_MARK, PORT207_FN5),
1113 PINMUX_DATA(GIO_OUT14_MARK, PORT208_FN5),
1114 PINMUX_DATA(GIO_OUT13_MARK, PORT209_FN5),
1115 PINMUX_DATA(GIO_OUT12_MARK, PORT210_FN5),
1116 PINMUX_DATA(WGM_TXP2_MARK, PORT211_FN5),
1117 PINMUX_DATA(WGM_GPS_TIMEM_ASK_RFCLK_MARK, PORT212_FN5),
1118
1119 /* Port213 - Port222 FN1 */
1120 PINMUX_DATA(D9_MARK, PORT213_FN1),
1121 PINMUX_DATA(D8_MARK, PORT214_FN1),
1122 PINMUX_DATA(D7_MARK, PORT215_FN1),
1123 PINMUX_DATA(D6_MARK, PORT216_FN1),
1124 PINMUX_DATA(D5_MARK, PORT217_FN1),
1125 PINMUX_DATA(D4_MARK, PORT218_FN1),
1126 PINMUX_DATA(D3_MARK, PORT219_FN1),
1127 PINMUX_DATA(D2_MARK, PORT220_FN1),
1128 PINMUX_DATA(D1_MARK, PORT221_FN1),
1129 PINMUX_DATA(D0_MARK, PORT222_FN1),
1130
1131 /* Port213 - Port222 FN2 */
1132 PINMUX_DATA(VIO_D9_MARK, PORT213_FN2),
1133 PINMUX_DATA(VIO_D8_MARK, PORT214_FN2),
1134 PINMUX_DATA(VIO_D7_MARK, PORT215_FN2),
1135 PINMUX_DATA(VIO_D6_MARK, PORT216_FN2),
1136 PINMUX_DATA(VIO_D5_MARK, PORT217_FN2),
1137 PINMUX_DATA(VIO_D4_MARK, PORT218_FN2),
1138 PINMUX_DATA(VIO_D3_MARK, PORT219_FN2),
1139 PINMUX_DATA(VIO_D2_MARK, PORT220_FN2),
1140 PINMUX_DATA(VIO_D1_MARK, PORT221_FN2),
1141 PINMUX_DATA(VIO_D0_MARK, PORT222_FN2),
1142
1143 /* Port213 - Port222 FN5 */
1144 PINMUX_DATA(GIO_OUT9_MARK, PORT213_FN5),
1145 PINMUX_DATA(GIO_OUT8_MARK, PORT214_FN5),
1146 PINMUX_DATA(GIO_OUT7_MARK, PORT215_FN5),
1147 PINMUX_DATA(GIO_OUT6_MARK, PORT216_FN5),
1148 PINMUX_DATA(GIO_OUT5_217_MARK, PORT217_FN5),
1149 PINMUX_DATA(GIO_OUT4_218_MARK, PORT218_FN5),
1150 PINMUX_DATA(GIO_OUT3_219_MARK, PORT219_FN5),
1151 PINMUX_DATA(GIO_OUT2_220_MARK, PORT220_FN5),
1152 PINMUX_DATA(GIO_OUT1_221_MARK, PORT221_FN5),
1153 PINMUX_DATA(GIO_OUT0_222_MARK, PORT222_FN5),
1154
1155 /* Port224 */
1156 PINMUX_DATA(RDWR_224_MARK, PORT224_FN1),
1157 PINMUX_DATA(VIO_HD_MARK, PORT224_FN2),
1158 PINMUX_DATA(SIM1_GPO2_MARK, PORT224_FN5),
1159
1160 /* Port225 */
1161 PINMUX_DATA(RD_N_MARK, PORT225_FN1),
1162
1163 /* Port226 */
1164 PINMUX_DATA(WAIT_N_MARK, PORT226_FN1),
1165 PINMUX_DATA(VIO_CLK_MARK, PORT226_FN2),
1166 PINMUX_DATA(SIM1_GPO1_MARK, PORT226_FN5),
1167
1168 /* Port227 */
1169 PINMUX_DATA(WE0_N_MARK, PORT227_FN1),
1170 PINMUX_DATA(RDWR_227_MARK, PORT227_FN2),
1171
1172 /* Port228 */
1173 PINMUX_DATA(WE1_N_MARK, PORT228_FN1),
1174 PINMUX_DATA(SIM0_GPO0_MARK, PORT228_FN5),
1175
1176 /* Port229 */
1177 PINMUX_DATA(PWMO_MARK, PORT229_FN1),
1178 PINMUX_DATA(VIO_CKO1_229_MARK, PORT229_FN2),
1179
1180 /* Port230 */
1181 PINMUX_DATA(SLIM_CLK_MARK, PORT230_FN1),
1182 PINMUX_DATA(VIO_CKO4_230_MARK, PORT230_FN2),
1183
1184 /* Port231 */
1185 PINMUX_DATA(SLIM_DATA_MARK, PORT231_FN1),
1186 PINMUX_DATA(VIO_CKO5_231_MARK, PORT231_FN2),
1187
1188 /* Port232 */
1189 PINMUX_DATA(VIO_CKO2_232_MARK, PORT232_FN2),
1190 PINMUX_DATA(SF_PORT_0_232_MARK, PORT232_FN4),
1191
1192 /* Port233 */
1193 PINMUX_DATA(VIO_CKO3_233_MARK, PORT233_FN2),
1194 PINMUX_DATA(SF_PORT_1_233_MARK, PORT233_FN4),
1195
1196 /* Port234 */
1197 PINMUX_DATA(FSIACK_MARK, PORT234_FN1),
1198 PINMUX_DATA(PDM3_CLK_234_MARK, PORT234_FN2),
1199 PINMUX_DATA(ISP_IRIS1_234_MARK, PORT234_FN3),
1200
1201 /* Port235 */
1202 PINMUX_DATA(FSIAISLD_MARK, PORT235_FN1),
1203 PINMUX_DATA(PDM3_DATA_235_MARK, PORT235_FN2, MSEL3CR_12_1),
1204
1205 /* Port236 */
1206 PINMUX_DATA(FSIAOMC_MARK, PORT236_FN1),
1207 PINMUX_DATA(PDM0_OUTCLK_236_MARK, PORT236_FN2),
1208 PINMUX_DATA(ISP_IRIS0_236_MARK, PORT236_FN3),
1209
1210 /* Port237 */
1211 PINMUX_DATA(FSIAOLR_MARK, PORT237_FN1),
1212 PINMUX_DATA(FSIAILR_MARK, PORT237_FN2),
1213
1214 /* Port238 */
1215 PINMUX_DATA(FSIAOBT_MARK, PORT238_FN1),
1216 PINMUX_DATA(FSIAIBT_MARK, PORT238_FN2),
1217
1218 /* Port239 */
1219 PINMUX_DATA(FSIAOSLD_MARK, PORT239_FN1),
1220 PINMUX_DATA(PDM0_OUTDATA_239_MARK, PORT239_FN2),
1221
1222 /* Port240 */
1223 PINMUX_DATA(FSIBISLD_MARK, PORT240_FN1),
1224
1225 /* Port241 */
1226 PINMUX_DATA(FSIBOLR_MARK, PORT241_FN1),
1227 PINMUX_DATA(FSIBILR_MARK, PORT241_FN2),
1228
1229 /* Port242 */
1230 PINMUX_DATA(FSIBOMC_MARK, PORT242_FN1),
1231 PINMUX_DATA(ISP_SHUTTER1_242_MARK, PORT242_FN3),
1232
1233 /* Port243 */
1234 PINMUX_DATA(FSIBOBT_MARK, PORT243_FN1),
1235 PINMUX_DATA(FSIBIBT_MARK, PORT243_FN2),
1236
1237 /* Port244 */
1238 PINMUX_DATA(FSIBOSLD_MARK, PORT244_FN1),
1239 PINMUX_DATA(FSIASPDIF_MARK, PORT244_FN2),
1240
1241 /* Port245 */
1242 PINMUX_DATA(FSIBCK_MARK, PORT245_FN1),
1243 PINMUX_DATA(ISP_SHUTTER0_245_MARK, PORT245_FN3),
1244
1245 /* Port246 - Port250 FN1 */
1246 PINMUX_DATA(ISP_IRIS1_246_MARK, PORT246_FN1),
1247 PINMUX_DATA(ISP_IRIS0_247_MARK, PORT247_FN1),
1248 PINMUX_DATA(ISP_SHUTTER1_248_MARK, PORT248_FN1),
1249 PINMUX_DATA(ISP_SHUTTER0_249_MARK, PORT249_FN1),
1250 PINMUX_DATA(ISP_STROBE_250_MARK, PORT250_FN1),
1251
1252 /* Port256 - Port258 */
1253 PINMUX_DATA(MSIOF0_SYNC_MARK, PORT256_FN1),
1254 PINMUX_DATA(MSIOF0_RXD_MARK, PORT257_FN1),
1255 PINMUX_DATA(MSIOF0_SCK_MARK, PORT258_FN1),
1256
1257 /* Port259 */
1258 PINMUX_DATA(MSIOF0_SS2_MARK, PORT259_FN1),
1259 PINMUX_DATA(VIO_CKO3_259_MARK, PORT259_FN3),
1260
1261 /* Port260 */
1262 PINMUX_DATA(MSIOF0_TXD_MARK, PORT260_FN1),
1263
1264 /* Port261 */
1265 PINMUX_DATA(SCIFB1_SCK_261_MARK, PORT261_FN2),
1266 PINMUX_DATA(CHSCIF1_HSCK_MARK, PORT261_FN7),
1267
1268 /* Port262 */
1269 PINMUX_DATA(SCIFB2_SCK_262_MARK, PORT262_FN2),
1270
1271 /* Port263 - Port266 FN1 */
1272 PINMUX_DATA(MSIOF1_SS2_MARK, PORT263_FN1),
1273 PINMUX_DATA(MSIOF1_TXD_MARK, PORT264_FN1),
1274 PINMUX_DATA(MSIOF1_RXD_MARK, PORT265_FN1),
1275 PINMUX_DATA(MSIOF1_SS1_MARK, PORT266_FN1),
1276
1277 /* Port263 - Port266 FN4 */
1278 PINMUX_DATA(MSIOF5_SS2_MARK, PORT263_FN4),
1279 PINMUX_DATA(MSIOF5_TXD_MARK, PORT264_FN4),
1280 PINMUX_DATA(MSIOF5_RXD_MARK, PORT265_FN4),
1281 PINMUX_DATA(MSIOF5_SS1_MARK, PORT266_FN4),
1282
1283 /* Port267 */
1284 PINMUX_DATA(MSIOF0_SS1_MARK, PORT267_FN1),
1285
1286 /* Port268 */
1287 PINMUX_DATA(MSIOF1_SCK_MARK, PORT268_FN1),
1288 PINMUX_DATA(MSIOF5_SCK_MARK, PORT268_FN4),
1289
1290 /* Port269 */
1291 PINMUX_DATA(MSIOF1_SYNC_MARK, PORT269_FN1),
1292 PINMUX_DATA(MSIOF5_SYNC_MARK, PORT269_FN4),
1293
1294 /* Port270 - Port273 FN1 */
1295 PINMUX_DATA(MSIOF2_SS1_MARK, PORT270_FN1),
1296 PINMUX_DATA(MSIOF2_SS2_MARK, PORT271_FN1),
1297 PINMUX_DATA(MSIOF3_SS2_MARK, PORT272_FN1),
1298 PINMUX_DATA(MSIOF3_SS1_MARK, PORT273_FN1),
1299
1300 /* Port270 - Port273 FN3 */
1301 PINMUX_DATA(VIO_CKO5_270_MARK, PORT270_FN3),
1302 PINMUX_DATA(VIO_CKO2_271_MARK, PORT271_FN3),
1303 PINMUX_DATA(VIO_CKO1_272_MARK, PORT272_FN3),
1304 PINMUX_DATA(VIO_CKO4_273_MARK, PORT273_FN3),
1305
1306 /* Port274 */
1307 PINMUX_DATA(MSIOF4_SS2_MARK, PORT274_FN1),
1308 PINMUX_DATA(TPU1TO0_MARK, PORT274_FN4),
1309
1310 /* Port275 - Port280 */
1311 PINMUX_DATA(IC_DP_MARK, PORT275_FN1),
1312 PINMUX_DATA(SIM0_RST_MARK, PORT276_FN1),
1313 PINMUX_DATA(IC_DM_MARK, PORT277_FN1),
1314 PINMUX_DATA(SIM0_BSICOMP_MARK, PORT278_FN1),
1315 PINMUX_DATA(SIM0_CLK_MARK, PORT279_FN1),
1316 PINMUX_DATA(SIM0_IO_MARK, PORT280_FN1),
1317
1318 /* Port281 */
1319 PINMUX_DATA(SIM1_IO_MARK, PORT281_FN1),
1320 PINMUX_DATA(PDM2_DATA_281_MARK, PORT281_FN2, MSEL3CR_12_1),
1321
1322 /* Port282 */
1323 PINMUX_DATA(SIM1_CLK_MARK, PORT282_FN1),
1324 PINMUX_DATA(PDM2_CLK_282_MARK, PORT282_FN2),
1325
1326 /* Port283 */
1327 PINMUX_DATA(SIM1_RST_MARK, PORT283_FN1),
1328
1329 /* Port289 */
1330 PINMUX_DATA(SDHID1_0_MARK, PORT289_FN1),
1331 PINMUX_DATA(STMDATA0_2_MARK, PORT289_FN3),
1332
1333 /* Port290 */
1334 PINMUX_DATA(SDHID1_1_MARK, PORT290_FN1),
1335 PINMUX_DATA(STMDATA1_2_MARK, PORT290_FN3),
1336 PINMUX_DATA(IRQ51_MARK, PORT290_FN0),
1337
1338 /* Port291 - Port294 FN1 */
1339 PINMUX_DATA(SDHID1_2_MARK, PORT291_FN1),
1340 PINMUX_DATA(SDHID1_3_MARK, PORT292_FN1),
1341 PINMUX_DATA(SDHICLK1_MARK, PORT293_FN1),
1342 PINMUX_DATA(SDHICMD1_MARK, PORT294_FN1),
1343
1344 /* Port291 - Port294 FN3 */
1345 PINMUX_DATA(STMDATA2_2_MARK, PORT291_FN3),
1346 PINMUX_DATA(STMDATA3_2_MARK, PORT292_FN3),
1347 PINMUX_DATA(STMCLK_2_MARK, PORT293_FN3),
1348 PINMUX_DATA(STMSIDI_2_MARK, PORT294_FN3),
1349
1350 /* Port295 */
1351 PINMUX_DATA(SDHID2_0_MARK, PORT295_FN1),
1352 PINMUX_DATA(MSIOF4_TXD_MARK, PORT295_FN2),
1353 PINMUX_DATA(SCIFB2_TXD_295_MARK, PORT295_FN3, MSEL3CR_10_1),
1354 PINMUX_DATA(MSIOF6_TXD_MARK, PORT295_FN4),
1355
1356 /* Port296 */
1357 PINMUX_DATA(SDHID2_1_MARK, PORT296_FN1),
1358 PINMUX_DATA(MSIOF6_SS2_MARK, PORT296_FN4),
1359 PINMUX_DATA(IRQ52_MARK, PORT296_FN0),
1360
1361 /* Port297 - Port300 FN1 */
1362 PINMUX_DATA(SDHID2_2_MARK, PORT297_FN1),
1363 PINMUX_DATA(SDHID2_3_MARK, PORT298_FN1),
1364 PINMUX_DATA(SDHICLK2_MARK, PORT299_FN1),
1365 PINMUX_DATA(SDHICMD2_MARK, PORT300_FN1),
1366
1367 /* Port297 - Port300 FN2 */
1368 PINMUX_DATA(MSIOF4_RXD_MARK, PORT297_FN2),
1369 PINMUX_DATA(MSIOF4_SYNC_MARK, PORT298_FN2),
1370 PINMUX_DATA(MSIOF4_SCK_MARK, PORT299_FN2),
1371 PINMUX_DATA(MSIOF4_SS1_MARK, PORT300_FN2),
1372
1373 /* Port297 - Port300 FN3 */
1374 PINMUX_DATA(SCIFB2_RXD_297_MARK, PORT297_FN3, MSEL3CR_10_1),
1375 PINMUX_DATA(SCIFB2_CTS_298_MARK, PORT298_FN3, MSEL3CR_10_1),
1376 PINMUX_DATA(SCIFB2_SCK_299_MARK, PORT299_FN3),
1377 PINMUX_DATA(SCIFB2_RTS_300_MARK, PORT300_FN3),
1378
1379 /* Port297 - Port300 FN4 */
1380 PINMUX_DATA(MSIOF6_RXD_MARK, PORT297_FN4),
1381 PINMUX_DATA(MSIOF6_SYNC_MARK, PORT298_FN4),
1382 PINMUX_DATA(MSIOF6_SCK_MARK, PORT299_FN4),
1383 PINMUX_DATA(MSIOF6_SS1_MARK, PORT300_FN4),
1384
1385 /* Port301 */
1386 PINMUX_DATA(SDHICD0_MARK, PORT301_FN1),
1387 PINMUX_DATA(IRQ50_MARK, PORT301_FN0),
1388
1389 /* Port302 - Port306 FN1 */
1390 PINMUX_DATA(SDHID0_0_MARK, PORT302_FN1),
1391 PINMUX_DATA(SDHID0_1_MARK, PORT303_FN1),
1392 PINMUX_DATA(SDHID0_2_MARK, PORT304_FN1),
1393 PINMUX_DATA(SDHID0_3_MARK, PORT305_FN1),
1394 PINMUX_DATA(SDHICMD0_MARK, PORT306_FN1),
1395
1396 /* Port302 - Port306 FN3 */
1397 PINMUX_DATA(STMDATA0_1_MARK, PORT302_FN3),
1398 PINMUX_DATA(STMDATA1_1_MARK, PORT303_FN3),
1399 PINMUX_DATA(STMDATA2_1_MARK, PORT304_FN3),
1400 PINMUX_DATA(STMDATA3_1_MARK, PORT305_FN3),
1401 PINMUX_DATA(STMSIDI_1_MARK, PORT306_FN3),
1402
1403 /* Port307 */
1404 PINMUX_DATA(SDHIWP0_MARK, PORT307_FN1),
1405
1406 /* Port308 */
1407 PINMUX_DATA(SDHICLK0_MARK, PORT308_FN1),
1408 PINMUX_DATA(STMCLK_1_MARK, PORT308_FN3),
1409
1410 /* Port320 - Port329 */
1411 PINMUX_DATA(IRQ16_MARK, PORT320_FN0),
1412 PINMUX_DATA(IRQ17_MARK, PORT321_FN0),
1413 PINMUX_DATA(IRQ28_MARK, PORT322_FN0),
1414 PINMUX_DATA(IRQ29_MARK, PORT323_FN0),
1415 PINMUX_DATA(IRQ30_MARK, PORT324_FN0),
1416 PINMUX_DATA(IRQ53_MARK, PORT325_FN0),
1417 PINMUX_DATA(IRQ54_MARK, PORT326_FN0),
1418 PINMUX_DATA(IRQ55_MARK, PORT327_FN0),
1419 PINMUX_DATA(IRQ56_MARK, PORT328_FN0),
1420 PINMUX_DATA(IRQ57_MARK, PORT329_FN0),
1421};
1422
1423static struct sh_pfc_pin pinmux_pins[] = {
1424 GPIO_PORT_ALL(),
1425};
1426
1427#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
1428
1429static const struct pinmux_func pinmux_func_gpios[] = {
1430 /* Port0 */
1431 GPIO_FN(LCDD0),
1432 GPIO_FN(PDM2_CLK_0),
1433 GPIO_FN(DU0_DR0),
1434 GPIO_FN(IRQ0),
1435
1436 /* Port1 */
1437 GPIO_FN(LCDD1),
1438 GPIO_FN(PDM2_DATA_1),
1439 GPIO_FN(DU0_DR19),
1440 GPIO_FN(IRQ1),
1441
1442 /* Port2 */
1443 GPIO_FN(LCDD2),
1444 GPIO_FN(PDM3_CLK_2),
1445 GPIO_FN(DU0_DR2),
1446 GPIO_FN(IRQ2),
1447
1448 /* Port3 */
1449 GPIO_FN(LCDD3),
1450 GPIO_FN(PDM3_DATA_3),
1451 GPIO_FN(DU0_DR3),
1452 GPIO_FN(IRQ3),
1453
1454 /* Port4 */
1455 GPIO_FN(LCDD4),
1456 GPIO_FN(PDM4_CLK_4),
1457 GPIO_FN(DU0_DR4),
1458 GPIO_FN(IRQ4),
1459
1460 /* Port5 */
1461 GPIO_FN(LCDD5),
1462 GPIO_FN(PDM4_DATA_5),
1463 GPIO_FN(DU0_DR5),
1464 GPIO_FN(IRQ5),
1465
1466 /* Port6 */
1467 GPIO_FN(LCDD6),
1468 GPIO_FN(PDM0_OUTCLK_6),
1469 GPIO_FN(DU0_DR6),
1470 GPIO_FN(IRQ6),
1471
1472 /* Port7 */
1473 GPIO_FN(LCDD7),
1474 GPIO_FN(PDM0_OUTDATA_7),
1475 GPIO_FN(DU0_DR7),
1476 GPIO_FN(IRQ7),
1477
1478 /* Port8 */
1479 GPIO_FN(LCDD8),
1480 GPIO_FN(PDM1_OUTCLK_8),
1481 GPIO_FN(DU0_DG0),
1482 GPIO_FN(IRQ8),
1483
1484 /* Port9 */
1485 GPIO_FN(LCDD9),
1486 GPIO_FN(PDM1_OUTDATA_9),
1487 GPIO_FN(DU0_DG1),
1488 GPIO_FN(IRQ9),
1489
1490 /* Port10 */
1491 GPIO_FN(LCDD10),
1492 GPIO_FN(FSICCK),
1493 GPIO_FN(DU0_DG2),
1494 GPIO_FN(IRQ10),
1495
1496 /* Port11 */
1497 GPIO_FN(LCDD11),
1498 GPIO_FN(FSICISLD),
1499 GPIO_FN(DU0_DG3),
1500 GPIO_FN(IRQ11),
1501
1502 /* Port12 */
1503 GPIO_FN(LCDD12),
1504 GPIO_FN(FSICOMC),
1505 GPIO_FN(DU0_DG4),
1506 GPIO_FN(IRQ12),
1507
1508 /* Port13 */
1509 GPIO_FN(LCDD13),
1510 GPIO_FN(FSICOLR),
1511 GPIO_FN(FSICILR),
1512 GPIO_FN(DU0_DG5),
1513 GPIO_FN(IRQ13),
1514
1515 /* Port14 */
1516 GPIO_FN(LCDD14),
1517 GPIO_FN(FSICOBT),
1518 GPIO_FN(FSICIBT),
1519 GPIO_FN(DU0_DG6),
1520 GPIO_FN(IRQ14),
1521
1522 /* Port15 */
1523 GPIO_FN(LCDD15),
1524 GPIO_FN(FSICOSLD),
1525 GPIO_FN(DU0_DG7),
1526 GPIO_FN(IRQ15),
1527
1528 /* Port16 */
1529 GPIO_FN(LCDD16),
1530 GPIO_FN(TPU1TO1),
1531 GPIO_FN(DU0_DB0),
1532
1533 /* Port17 */
1534 GPIO_FN(LCDD17),
1535 GPIO_FN(SF_IRQ_00),
1536 GPIO_FN(DU0_DB1),
1537
1538 /* Port18 */
1539 GPIO_FN(LCDD18),
1540 GPIO_FN(SF_IRQ_01),
1541 GPIO_FN(DU0_DB2),
1542
1543 /* Port19 */
1544 GPIO_FN(LCDD19),
1545 GPIO_FN(SCIFB3_RTS_19),
1546 GPIO_FN(DU0_DB3),
1547
1548 /* Port20 */
1549 GPIO_FN(LCDD20),
1550 GPIO_FN(SCIFB3_CTS_20),
1551 GPIO_FN(DU0_DB4),
1552
1553 /* Port21 */
1554 GPIO_FN(LCDD21),
1555 GPIO_FN(SCIFB3_TXD_21),
1556 GPIO_FN(DU0_DB5),
1557
1558 /* Port22 */
1559 GPIO_FN(LCDD22),
1560 GPIO_FN(SCIFB3_RXD_22),
1561 GPIO_FN(DU0_DB6),
1562
1563 /* Port23 */
1564 GPIO_FN(LCDD23),
1565 GPIO_FN(SCIFB3_SCK_23),
1566 GPIO_FN(DU0_DB7),
1567
1568 /* Port24 */
1569 GPIO_FN(LCDHSYN),
1570 GPIO_FN(LCDCS),
1571 GPIO_FN(SCIFB1_RTS_24),
1572 GPIO_FN(DU0_EXHSYNC_N_CSYNC_N_HSYNC_N),
1573
1574 /* Port25 */
1575 GPIO_FN(LCDVSYN),
1576 GPIO_FN(SCIFB1_CTS_25),
1577 GPIO_FN(DU0_EXVSYNC_N_VSYNC_N_CSYNC_N),
1578
1579 /* Port26 */
1580 GPIO_FN(LCDDCK),
1581 GPIO_FN(LCDWR),
1582 GPIO_FN(SCIFB1_TXD_26),
1583 GPIO_FN(DU0_DOTCLKIN),
1584
1585 /* Port27 */
1586 GPIO_FN(LCDDISP),
1587 GPIO_FN(LCDRS),
1588 GPIO_FN(SCIFB1_RXD_27),
1589 GPIO_FN(DU0_DOTCLKOUT),
1590
1591 /* Port28 */
1592 GPIO_FN(LCDRD_N),
1593 GPIO_FN(SCIFB1_SCK_28),
1594 GPIO_FN(DU0_DOTCLKOUTB),
1595
1596 /* Port29 */
1597 GPIO_FN(LCDLCLK),
1598 GPIO_FN(SF_IRQ_02),
1599 GPIO_FN(DU0_DISP_CSYNC_N_DE),
1600
1601 /* Port30 */
1602 GPIO_FN(LCDDON),
1603 GPIO_FN(SF_IRQ_03),
1604 GPIO_FN(DU0_ODDF_N_CLAMP),
1605
1606 /* Port32 */
1607 GPIO_FN(SCIFA0_RTS),
1608 GPIO_FN(SIM0_DET),
1609 GPIO_FN(CSCIF0_RTS),
1610
1611 /* Port33 */
1612 GPIO_FN(SCIFA0_CTS),
1613 GPIO_FN(SIM1_DET),
1614 GPIO_FN(CSCIF0_CTS),
1615
1616 /* Port34 */
1617 GPIO_FN(SCIFA0_SCK),
1618 GPIO_FN(SIM0_PWRON),
1619 GPIO_FN(CSCIF0_SCK),
1620
1621 /* Port35 */
1622 GPIO_FN(SCIFA1_RTS),
1623 GPIO_FN(CSCIF1_RTS),
1624
1625 /* Port36 */
1626 GPIO_FN(SCIFA1_CTS),
1627 GPIO_FN(CSCIF1_CTS),
1628
1629 /* Port37 */
1630 GPIO_FN(SCIFA1_SCK),
1631 GPIO_FN(CSCIF1_SCK),
1632
1633 /* Port38 */
1634 GPIO_FN(SCIFB0_RTS),
1635 GPIO_FN(TPU0TO1),
1636 GPIO_FN(SCIFB3_RTS_38),
1637 GPIO_FN(CHSCIF0_HRTS),
1638
1639 /* Port39 */
1640 GPIO_FN(SCIFB0_CTS),
1641 GPIO_FN(TPU0TO2),
1642 GPIO_FN(SCIFB3_CTS_39),
1643 GPIO_FN(CHSCIF0_HCTS),
1644
1645 /* Port40 */
1646 GPIO_FN(SCIFB0_SCK),
1647 GPIO_FN(TPU0TO3),
1648 GPIO_FN(SCIFB3_SCK_40),
1649 GPIO_FN(CHSCIF0_HSCK),
1650
1651 /* Port64 */
1652 GPIO_FN(PDM0_DATA),
1653
1654 /* Port65 */
1655 GPIO_FN(PDM1_DATA),
1656
1657 /* Port66 */
1658 GPIO_FN(HSI_RX_WAKE),
1659 GPIO_FN(SCIFB2_CTS_66),
1660 GPIO_FN(MSIOF3_SYNC),
1661 GPIO_FN(GenIO4),
1662 GPIO_FN(IRQ40),
1663
1664 /* Port67 */
1665 GPIO_FN(HSI_RX_READY),
1666 GPIO_FN(SCIFB1_TXD_67),
1667 GPIO_FN(GIO_OUT3_67),
1668 GPIO_FN(CHSCIF1_HTX),
1669
1670 /* Port68 */
1671 GPIO_FN(HSI_RX_FLAG),
1672 GPIO_FN(SCIFB2_TXD_68),
1673 GPIO_FN(MSIOF3_TXD),
1674 GPIO_FN(GIO_OUT4_68),
1675
1676 /* Port69 */
1677 GPIO_FN(HSI_RX_DATA),
1678 GPIO_FN(SCIFB2_RXD_69),
1679 GPIO_FN(MSIOF3_RXD),
1680 GPIO_FN(GIO_OUT5_69),
1681
1682 /* Port70 */
1683 GPIO_FN(HSI_TX_FLAG),
1684 GPIO_FN(SCIFB1_RTS_70),
1685 GPIO_FN(GIO_OUT1_70),
1686 GPIO_FN(HSIC_TSTCLK0),
1687 GPIO_FN(CHSCIF1_HRTS),
1688
1689 /* Port71 */
1690 GPIO_FN(HSI_TX_DATA),
1691 GPIO_FN(SCIFB1_CTS_71),
1692 GPIO_FN(GIO_OUT2_71),
1693 GPIO_FN(HSIC_TSTCLK1),
1694 GPIO_FN(CHSCIF1_HCTS),
1695
1696 /* Port72 */
1697 GPIO_FN(HSI_TX_WAKE),
1698 GPIO_FN(SCIFB1_RXD_72),
1699 GPIO_FN(GenIO8),
1700 GPIO_FN(CHSCIF1_HRX),
1701
1702 /* Port73 */
1703 GPIO_FN(HSI_TX_READY),
1704 GPIO_FN(SCIFB2_RTS_73),
1705 GPIO_FN(MSIOF3_SCK),
1706 GPIO_FN(GIO_OUT0_73),
1707
1708 /* Port74 - Port85 */
1709 GPIO_FN(IRDA_OUT),
1710 GPIO_FN(IRDA_IN),
1711 GPIO_FN(IRDA_FIRSEL),
1712 GPIO_FN(TPU0TO0),
1713 GPIO_FN(DIGRFEN),
1714 GPIO_FN(GPS_TIMESTAMP),
1715 GPIO_FN(TXP),
1716 GPIO_FN(TXP2),
1717 GPIO_FN(COEX_0),
1718 GPIO_FN(COEX_1),
1719 GPIO_FN(IRQ19),
1720 GPIO_FN(IRQ18),
1721
1722 /* Port96 - Port101 */
1723 GPIO_FN(KEYIN0),
1724 GPIO_FN(KEYIN1),
1725 GPIO_FN(KEYIN2),
1726 GPIO_FN(KEYIN3),
1727 GPIO_FN(KEYIN4),
1728 GPIO_FN(KEYIN5),
1729
1730 /* Port102 */
1731 GPIO_FN(KEYIN6),
1732 GPIO_FN(IRQ41),
1733
1734 /* Port103 */
1735 GPIO_FN(KEYIN7),
1736 GPIO_FN(IRQ42),
1737
1738 /* Port104 - Port108 */
1739 GPIO_FN(KEYOUT0),
1740 GPIO_FN(KEYOUT1),
1741 GPIO_FN(KEYOUT2),
1742 GPIO_FN(KEYOUT3),
1743 GPIO_FN(KEYOUT4),
1744
1745 /* Port109 */
1746 GPIO_FN(KEYOUT5),
1747 GPIO_FN(IRQ43),
1748
1749 /* Port110 */
1750 GPIO_FN(KEYOUT6),
1751 GPIO_FN(IRQ44),
1752
1753 /* Port111 */
1754 GPIO_FN(KEYOUT7),
1755 GPIO_FN(RFANAEN),
1756 GPIO_FN(IRQ45),
1757
1758 /* Port112 */
1759 GPIO_FN(KEYIN8),
1760 GPIO_FN(KEYOUT8),
1761 GPIO_FN(SF_IRQ_04),
1762 GPIO_FN(IRQ46),
1763
1764 /* Port113 */
1765 GPIO_FN(KEYIN9),
1766 GPIO_FN(KEYOUT9),
1767 GPIO_FN(SF_IRQ_05),
1768 GPIO_FN(IRQ47),
1769
1770 /* Port114 */
1771 GPIO_FN(KEYIN10),
1772 GPIO_FN(KEYOUT10),
1773 GPIO_FN(SF_IRQ_06),
1774 GPIO_FN(IRQ48),
1775
1776 /* Port115 */
1777 GPIO_FN(KEYIN11),
1778 GPIO_FN(KEYOUT11),
1779 GPIO_FN(SF_IRQ_07),
1780 GPIO_FN(IRQ49),
1781
1782 /* Port116 */
1783 GPIO_FN(SCIFA0_TXD),
1784 GPIO_FN(CSCIF0_TX),
1785
1786 /* Port117 */
1787 GPIO_FN(SCIFA0_RXD),
1788 GPIO_FN(CSCIF0_RX),
1789
1790 /* Port118 */
1791 GPIO_FN(SCIFA1_TXD),
1792 GPIO_FN(CSCIF1_TX),
1793
1794 /* Port119 */
1795 GPIO_FN(SCIFA1_RXD),
1796 GPIO_FN(CSCIF1_RX),
1797
1798 /* Port120 */
1799 GPIO_FN(SF_PORT_1_120),
1800 GPIO_FN(SCIFB3_RXD_120),
1801 GPIO_FN(DU0_CDE),
1802
1803 /* Port121 */
1804 GPIO_FN(SF_PORT_0_121),
1805 GPIO_FN(SCIFB3_TXD_121),
1806
1807 /* Port122 */
1808 GPIO_FN(SCIFB0_TXD),
1809 GPIO_FN(CHSCIF0_HTX),
1810
1811 /* Port123 */
1812 GPIO_FN(SCIFB0_RXD),
1813 GPIO_FN(CHSCIF0_HRX),
1814
1815 /* Port124 */
1816 GPIO_FN(ISP_STROBE_124),
1817
1818 /* Port125 */
1819 GPIO_FN(STP_ISD_0),
1820 GPIO_FN(PDM4_CLK_125),
1821 GPIO_FN(MSIOF2_TXD),
1822 GPIO_FN(SIM0_VOLTSEL0),
1823
1824 /* Port126 */
1825 GPIO_FN(TS_SDEN),
1826 GPIO_FN(MSIOF7_SYNC),
1827 GPIO_FN(STP_ISEN_1),
1828
1829 /* Port128 */
1830 GPIO_FN(STP_ISEN_0),
1831 GPIO_FN(PDM1_OUTDATA_128),
1832 GPIO_FN(MSIOF2_SYNC),
1833 GPIO_FN(SIM1_VOLTSEL1),
1834
1835 /* Port129 */
1836 GPIO_FN(TS_SPSYNC),
1837 GPIO_FN(MSIOF7_RXD),
1838 GPIO_FN(STP_ISSYNC_1),
1839
1840 /* Port130 */
1841 GPIO_FN(STP_ISSYNC_0),
1842 GPIO_FN(PDM4_DATA_130),
1843 GPIO_FN(MSIOF2_RXD),
1844 GPIO_FN(SIM0_VOLTSEL1),
1845
1846 /* Port131 */
1847 GPIO_FN(STP_OPWM_0),
1848 GPIO_FN(SIM1_PWRON),
1849
1850 /* Port132 */
1851 GPIO_FN(TS_SCK),
1852 GPIO_FN(MSIOF7_SCK),
1853 GPIO_FN(STP_ISCLK_1),
1854
1855 /* Port133 */
1856 GPIO_FN(STP_ISCLK_0),
1857 GPIO_FN(PDM1_OUTCLK_133),
1858 GPIO_FN(MSIOF2_SCK),
1859 GPIO_FN(SIM1_VOLTSEL0),
1860
1861 /* Port134 */
1862 GPIO_FN(TS_SDAT),
1863 GPIO_FN(MSIOF7_TXD),
1864 GPIO_FN(STP_ISD_1),
1865
1866 /* Port160 - Port178 */
1867 GPIO_FN(IRQ20),
1868 GPIO_FN(IRQ21),
1869 GPIO_FN(IRQ22),
1870 GPIO_FN(IRQ23),
1871 GPIO_FN(MMCD0_0),
1872 GPIO_FN(MMCD0_1),
1873 GPIO_FN(MMCD0_2),
1874 GPIO_FN(MMCD0_3),
1875 GPIO_FN(MMCD0_4),
1876 GPIO_FN(MMCD0_5),
1877 GPIO_FN(MMCD0_6),
1878 GPIO_FN(MMCD0_7),
1879 GPIO_FN(MMCCMD0),
1880 GPIO_FN(MMCCLK0),
1881 GPIO_FN(MMCRST),
1882 GPIO_FN(IRQ24),
1883 GPIO_FN(IRQ25),
1884 GPIO_FN(IRQ26),
1885 GPIO_FN(IRQ27),
1886
1887 /* Port192 - Port200 FN1 */
1888 GPIO_FN(A10),
1889 GPIO_FN(A9),
1890 GPIO_FN(A8),
1891 GPIO_FN(A7),
1892 GPIO_FN(A6),
1893 GPIO_FN(A5),
1894 GPIO_FN(A4),
1895 GPIO_FN(A3),
1896 GPIO_FN(A2),
1897
1898 /* Port192 - Port200 FN2 */
1899 GPIO_FN(MMCD1_7),
1900 GPIO_FN(MMCD1_6),
1901 GPIO_FN(MMCD1_5),
1902 GPIO_FN(MMCD1_4),
1903 GPIO_FN(MMCD1_3),
1904 GPIO_FN(MMCD1_2),
1905 GPIO_FN(MMCD1_1),
1906 GPIO_FN(MMCD1_0),
1907 GPIO_FN(MMCCMD1),
1908
1909 /* Port192 - Port200 IRQ */
1910 GPIO_FN(IRQ31),
1911 GPIO_FN(IRQ32),
1912 GPIO_FN(IRQ33),
1913 GPIO_FN(IRQ34),
1914 GPIO_FN(IRQ35),
1915 GPIO_FN(IRQ36),
1916 GPIO_FN(IRQ37),
1917 GPIO_FN(IRQ38),
1918 GPIO_FN(IRQ39),
1919
1920 /* Port201 */
1921 GPIO_FN(A1),
1922
1923 /* Port202 */
1924 GPIO_FN(A0),
1925 GPIO_FN(BS),
1926
1927 /* Port203 */
1928 GPIO_FN(CKO),
1929 GPIO_FN(MMCCLK1),
1930
1931 /* Port204 */
1932 GPIO_FN(CS0_N),
1933 GPIO_FN(SIM0_GPO1),
1934
1935 /* Port205 */
1936 GPIO_FN(CS2_N),
1937 GPIO_FN(SIM0_GPO2),
1938
1939 /* Port206 */
1940 GPIO_FN(CS4_N),
1941 GPIO_FN(VIO_VD),
1942 GPIO_FN(SIM1_GPO0),
1943
1944 /* Port207 - Port212 FN1 */
1945 GPIO_FN(D15),
1946 GPIO_FN(D14),
1947 GPIO_FN(D13),
1948 GPIO_FN(D12),
1949 GPIO_FN(D11),
1950 GPIO_FN(D10),
1951
1952 /* Port207 - Port212 FN5 */
1953 GPIO_FN(GIO_OUT15),
1954 GPIO_FN(GIO_OUT14),
1955 GPIO_FN(GIO_OUT13),
1956 GPIO_FN(GIO_OUT12),
1957 GPIO_FN(WGM_TXP2),
1958 GPIO_FN(WGM_GPS_TIMEM_ASK_RFCLK),
1959
1960 /* Port213 - Port222 FN1 */
1961 GPIO_FN(D9),
1962 GPIO_FN(D8),
1963 GPIO_FN(D7),
1964 GPIO_FN(D6),
1965 GPIO_FN(D5),
1966 GPIO_FN(D4),
1967 GPIO_FN(D3),
1968 GPIO_FN(D2),
1969 GPIO_FN(D1),
1970 GPIO_FN(D0),
1971
1972 /* Port213 - Port222 FN2 */
1973 GPIO_FN(VIO_D9),
1974 GPIO_FN(VIO_D8),
1975 GPIO_FN(VIO_D7),
1976 GPIO_FN(VIO_D6),
1977 GPIO_FN(VIO_D5),
1978 GPIO_FN(VIO_D4),
1979 GPIO_FN(VIO_D3),
1980 GPIO_FN(VIO_D2),
1981 GPIO_FN(VIO_D1),
1982 GPIO_FN(VIO_D0),
1983
1984 /* Port213 - Port222 FN5 */
1985 GPIO_FN(GIO_OUT9),
1986 GPIO_FN(GIO_OUT8),
1987 GPIO_FN(GIO_OUT7),
1988 GPIO_FN(GIO_OUT6),
1989 GPIO_FN(GIO_OUT5_217),
1990 GPIO_FN(GIO_OUT4_218),
1991 GPIO_FN(GIO_OUT3_219),
1992 GPIO_FN(GIO_OUT2_220),
1993 GPIO_FN(GIO_OUT1_221),
1994 GPIO_FN(GIO_OUT0_222),
1995
1996 /* Port224 */
1997 GPIO_FN(RDWR_224),
1998 GPIO_FN(VIO_HD),
1999 GPIO_FN(SIM1_GPO2),
2000
2001 /* Port225 */
2002 GPIO_FN(RD_N),
2003
2004 /* Port226 */
2005 GPIO_FN(WAIT_N),
2006 GPIO_FN(VIO_CLK),
2007 GPIO_FN(SIM1_GPO1),
2008
2009 /* Port227 */
2010 GPIO_FN(WE0_N),
2011 GPIO_FN(RDWR_227),
2012
2013 /* Port228 */
2014 GPIO_FN(WE1_N),
2015 GPIO_FN(SIM0_GPO0),
2016
2017 /* Port229 */
2018 GPIO_FN(PWMO),
2019 GPIO_FN(VIO_CKO1_229),
2020
2021 /* Port230 */
2022 GPIO_FN(SLIM_CLK),
2023 GPIO_FN(VIO_CKO4_230),
2024
2025 /* Port231 */
2026 GPIO_FN(SLIM_DATA),
2027 GPIO_FN(VIO_CKO5_231),
2028
2029 /* Port232 */
2030 GPIO_FN(VIO_CKO2_232),
2031 GPIO_FN(SF_PORT_0_232),
2032
2033 /* Port233 */
2034 GPIO_FN(VIO_CKO3_233),
2035 GPIO_FN(SF_PORT_1_233),
2036
2037 /* Port234 */
2038 GPIO_FN(FSIACK),
2039 GPIO_FN(PDM3_CLK_234),
2040 GPIO_FN(ISP_IRIS1_234),
2041
2042 /* Port235 */
2043 GPIO_FN(FSIAISLD),
2044 GPIO_FN(PDM3_DATA_235),
2045
2046 /* Port236 */
2047 GPIO_FN(FSIAOMC),
2048 GPIO_FN(PDM0_OUTCLK_236),
2049 GPIO_FN(ISP_IRIS0_236),
2050
2051 /* Port237 */
2052 GPIO_FN(FSIAOLR),
2053 GPIO_FN(FSIAILR),
2054
2055 /* Port238 */
2056 GPIO_FN(FSIAOBT),
2057 GPIO_FN(FSIAIBT),
2058
2059 /* Port239 */
2060 GPIO_FN(FSIAOSLD),
2061 GPIO_FN(PDM0_OUTDATA_239),
2062
2063 /* Port240 */
2064 GPIO_FN(FSIBISLD),
2065
2066 /* Port241 */
2067 GPIO_FN(FSIBOLR),
2068 GPIO_FN(FSIBILR),
2069
2070 /* Port242 */
2071 GPIO_FN(FSIBOMC),
2072 GPIO_FN(ISP_SHUTTER1_242),
2073
2074 /* Port243 */
2075 GPIO_FN(FSIBOBT),
2076 GPIO_FN(FSIBIBT),
2077
2078 /* Port244 */
2079 GPIO_FN(FSIBOSLD),
2080 GPIO_FN(FSIASPDIF),
2081
2082 /* Port245 */
2083 GPIO_FN(FSIBCK),
2084 GPIO_FN(ISP_SHUTTER0_245),
2085
2086 /* Port246 - Port250 FN1 */
2087 GPIO_FN(ISP_IRIS1_246),
2088 GPIO_FN(ISP_IRIS0_247),
2089 GPIO_FN(ISP_SHUTTER1_248),
2090 GPIO_FN(ISP_SHUTTER0_249),
2091 GPIO_FN(ISP_STROBE_250),
2092
2093 /* Port256 - Port258 */
2094 GPIO_FN(MSIOF0_SYNC),
2095 GPIO_FN(MSIOF0_RXD),
2096 GPIO_FN(MSIOF0_SCK),
2097
2098 /* Port259 */
2099 GPIO_FN(MSIOF0_SS2),
2100 GPIO_FN(VIO_CKO3_259),
2101
2102 /* Port260 */
2103 GPIO_FN(MSIOF0_TXD),
2104
2105 /* Port261 */
2106 GPIO_FN(SCIFB1_SCK_261),
2107 GPIO_FN(CHSCIF1_HSCK),
2108
2109 /* Port262 */
2110 GPIO_FN(SCIFB2_SCK_262),
2111
2112 /* Port263 - Port266 FN1 */
2113 GPIO_FN(MSIOF1_SS2),
2114 GPIO_FN(MSIOF1_TXD),
2115 GPIO_FN(MSIOF1_RXD),
2116 GPIO_FN(MSIOF1_SS1),
2117
2118 /* Port263 - Port266 FN4 */
2119 GPIO_FN(MSIOF5_SS2),
2120 GPIO_FN(MSIOF5_TXD),
2121 GPIO_FN(MSIOF5_RXD),
2122 GPIO_FN(MSIOF5_SS1),
2123
2124 /* Port267 */
2125 GPIO_FN(MSIOF0_SS1),
2126
2127 /* Port268 */
2128 GPIO_FN(MSIOF1_SCK),
2129 GPIO_FN(MSIOF5_SCK),
2130
2131 /* Port269 */
2132 GPIO_FN(MSIOF1_SYNC),
2133 GPIO_FN(MSIOF5_SYNC),
2134
2135 /* Port270 - Port273 FN1 */
2136 GPIO_FN(MSIOF2_SS1),
2137 GPIO_FN(MSIOF2_SS2),
2138 GPIO_FN(MSIOF3_SS2),
2139 GPIO_FN(MSIOF3_SS1),
2140
2141 /* Port270 - Port273 FN3 */
2142 GPIO_FN(VIO_CKO5_270),
2143 GPIO_FN(VIO_CKO2_271),
2144 GPIO_FN(VIO_CKO1_272),
2145 GPIO_FN(VIO_CKO4_273),
2146
2147 /* Port274 */
2148 GPIO_FN(MSIOF4_SS2),
2149 GPIO_FN(TPU1TO0),
2150
2151 /* Port275 - Port280 */
2152 GPIO_FN(IC_DP),
2153 GPIO_FN(SIM0_RST),
2154 GPIO_FN(IC_DM),
2155 GPIO_FN(SIM0_BSICOMP),
2156 GPIO_FN(SIM0_CLK),
2157 GPIO_FN(SIM0_IO),
2158
2159 /* Port281 */
2160 GPIO_FN(SIM1_IO),
2161 GPIO_FN(PDM2_DATA_281),
2162
2163 /* Port282 */
2164 GPIO_FN(SIM1_CLK),
2165 GPIO_FN(PDM2_CLK_282),
2166
2167 /* Port283 */
2168 GPIO_FN(SIM1_RST),
2169
2170 /* Port289 */
2171 GPIO_FN(SDHID1_0),
2172 GPIO_FN(STMDATA0_2),
2173
2174 /* Port290 */
2175 GPIO_FN(SDHID1_1),
2176 GPIO_FN(STMDATA1_2),
2177 GPIO_FN(IRQ51),
2178
2179 /* Port291 - Port294 FN1 */
2180 GPIO_FN(SDHID1_2),
2181 GPIO_FN(SDHID1_3),
2182 GPIO_FN(SDHICLK1),
2183 GPIO_FN(SDHICMD1),
2184
2185 /* Port291 - Port294 FN3 */
2186 GPIO_FN(STMDATA2_2),
2187 GPIO_FN(STMDATA3_2),
2188 GPIO_FN(STMCLK_2),
2189 GPIO_FN(STMSIDI_2),
2190
2191 /* Port295 */
2192 GPIO_FN(SDHID2_0),
2193 GPIO_FN(MSIOF4_TXD),
2194 GPIO_FN(SCIFB2_TXD_295),
2195 GPIO_FN(MSIOF6_TXD),
2196
2197 /* Port296 */
2198 GPIO_FN(SDHID2_1),
2199 GPIO_FN(MSIOF6_SS2),
2200 GPIO_FN(IRQ52),
2201
2202 /* Port297 - Port300 FN1 */
2203 GPIO_FN(SDHID2_2),
2204 GPIO_FN(SDHID2_3),
2205 GPIO_FN(SDHICLK2),
2206 GPIO_FN(SDHICMD2),
2207
2208 /* Port297 - Port300 FN2 */
2209 GPIO_FN(MSIOF4_RXD),
2210 GPIO_FN(MSIOF4_SYNC),
2211 GPIO_FN(MSIOF4_SCK),
2212 GPIO_FN(MSIOF4_SS1),
2213
2214 /* Port297 - Port300 FN3 */
2215 GPIO_FN(SCIFB2_RXD_297),
2216 GPIO_FN(SCIFB2_CTS_298),
2217 GPIO_FN(SCIFB2_SCK_299),
2218 GPIO_FN(SCIFB2_RTS_300),
2219
2220 /* Port297 - Port300 FN4 */
2221 GPIO_FN(MSIOF6_RXD),
2222 GPIO_FN(MSIOF6_SYNC),
2223 GPIO_FN(MSIOF6_SCK),
2224 GPIO_FN(MSIOF6_SS1),
2225
2226 /* Port301 */
2227 GPIO_FN(SDHICD0),
2228 GPIO_FN(IRQ50),
2229
2230 /* Port302 - Port306 FN1 */
2231 GPIO_FN(SDHID0_0),
2232 GPIO_FN(SDHID0_1),
2233 GPIO_FN(SDHID0_2),
2234 GPIO_FN(SDHID0_3),
2235 GPIO_FN(SDHICMD0),
2236
2237 /* Port302 - Port306 FN3 */
2238 GPIO_FN(STMDATA0_1),
2239 GPIO_FN(STMDATA1_1),
2240 GPIO_FN(STMDATA2_1),
2241 GPIO_FN(STMDATA3_1),
2242 GPIO_FN(STMSIDI_1),
2243
2244 /* Port307 */
2245 GPIO_FN(SDHIWP0),
2246
2247 /* Port308 */
2248 GPIO_FN(SDHICLK0),
2249 GPIO_FN(STMCLK_1),
2250
2251 /* Port320 - Port329 */
2252 GPIO_FN(IRQ16),
2253 GPIO_FN(IRQ17),
2254 GPIO_FN(IRQ28),
2255 GPIO_FN(IRQ29),
2256 GPIO_FN(IRQ30),
2257 GPIO_FN(IRQ53),
2258 GPIO_FN(IRQ54),
2259 GPIO_FN(IRQ55),
2260 GPIO_FN(IRQ56),
2261 GPIO_FN(IRQ57),
2262};
2263
2264static const struct pinmux_cfg_reg pinmux_config_regs[] = {
2265
2266 PORTCR(0, 0xe6050000),
2267 PORTCR(1, 0xe6050001),
2268 PORTCR(2, 0xe6050002),
2269 PORTCR(3, 0xe6050003),
2270 PORTCR(4, 0xe6050004),
2271 PORTCR(5, 0xe6050005),
2272 PORTCR(6, 0xe6050006),
2273 PORTCR(7, 0xe6050007),
2274 PORTCR(8, 0xe6050008),
2275 PORTCR(9, 0xe6050009),
2276 PORTCR(10, 0xe605000A),
2277 PORTCR(11, 0xe605000B),
2278 PORTCR(12, 0xe605000C),
2279 PORTCR(13, 0xe605000D),
2280 PORTCR(14, 0xe605000E),
2281 PORTCR(15, 0xe605000F),
2282 PORTCR(16, 0xe6050010),
2283 PORTCR(17, 0xe6050011),
2284 PORTCR(18, 0xe6050012),
2285 PORTCR(19, 0xe6050013),
2286 PORTCR(20, 0xe6050014),
2287 PORTCR(21, 0xe6050015),
2288 PORTCR(22, 0xe6050016),
2289 PORTCR(23, 0xe6050017),
2290 PORTCR(24, 0xe6050018),
2291 PORTCR(25, 0xe6050019),
2292 PORTCR(26, 0xe605001A),
2293 PORTCR(27, 0xe605001B),
2294 PORTCR(28, 0xe605001C),
2295 PORTCR(29, 0xe605001D),
2296 PORTCR(30, 0xe605001E),
2297 PORTCR(32, 0xe6051020),
2298 PORTCR(33, 0xe6051021),
2299 PORTCR(34, 0xe6051022),
2300 PORTCR(35, 0xe6051023),
2301 PORTCR(36, 0xe6051024),
2302 PORTCR(37, 0xe6051025),
2303 PORTCR(38, 0xe6051026),
2304 PORTCR(39, 0xe6051027),
2305 PORTCR(40, 0xe6051028),
2306 PORTCR(64, 0xe6050040),
2307 PORTCR(65, 0xe6050041),
2308 PORTCR(66, 0xe6050042),
2309 PORTCR(67, 0xe6050043),
2310 PORTCR(68, 0xe6050044),
2311 PORTCR(69, 0xe6050045),
2312 PORTCR(70, 0xe6050046),
2313 PORTCR(71, 0xe6050047),
2314 PORTCR(72, 0xe6050048),
2315 PORTCR(73, 0xe6050049),
2316 PORTCR(74, 0xe605004A),
2317 PORTCR(75, 0xe605004B),
2318 PORTCR(76, 0xe605004C),
2319 PORTCR(77, 0xe605004D),
2320 PORTCR(78, 0xe605004E),
2321 PORTCR(79, 0xe605004F),
2322 PORTCR(80, 0xe6050050),
2323 PORTCR(81, 0xe6050051),
2324 PORTCR(82, 0xe6050052),
2325 PORTCR(83, 0xe6050053),
2326 PORTCR(84, 0xe6050054),
2327 PORTCR(85, 0xe6050055),
2328 PORTCR(96, 0xe6051060),
2329 PORTCR(97, 0xe6051061),
2330 PORTCR(98, 0xe6051062),
2331 PORTCR(99, 0xe6051063),
2332 PORTCR(100, 0xe6051064),
2333 PORTCR(101, 0xe6051065),
2334 PORTCR(102, 0xe6051066),
2335 PORTCR(103, 0xe6051067),
2336 PORTCR(104, 0xe6051068),
2337 PORTCR(105, 0xe6051069),
2338 PORTCR(106, 0xe605106A),
2339 PORTCR(107, 0xe605106B),
2340 PORTCR(108, 0xe605106C),
2341 PORTCR(109, 0xe605106D),
2342 PORTCR(110, 0xe605106E),
2343 PORTCR(111, 0xe605106F),
2344 PORTCR(112, 0xe6051070),
2345 PORTCR(113, 0xe6051071),
2346 PORTCR(114, 0xe6051072),
2347 PORTCR(115, 0xe6051073),
2348 PORTCR(116, 0xe6051074),
2349 PORTCR(117, 0xe6051075),
2350 PORTCR(118, 0xe6051076),
2351 PORTCR(119, 0xe6051077),
2352 PORTCR(120, 0xe6051078),
2353 PORTCR(121, 0xe6051079),
2354 PORTCR(122, 0xe605107A),
2355 PORTCR(123, 0xe605107B),
2356 PORTCR(124, 0xe605107C),
2357 PORTCR(125, 0xe605107D),
2358 PORTCR(126, 0xe605107E),
2359 PORTCR(128, 0xe6051080),
2360 PORTCR(129, 0xe6051081),
2361 PORTCR(130, 0xe6051082),
2362 PORTCR(131, 0xe6051083),
2363 PORTCR(132, 0xe6051084),
2364 PORTCR(133, 0xe6051085),
2365 PORTCR(134, 0xe6051086),
2366 PORTCR(160, 0xe60520A0),
2367 PORTCR(161, 0xe60520A1),
2368 PORTCR(162, 0xe60520A2),
2369 PORTCR(163, 0xe60520A3),
2370 PORTCR(164, 0xe60520A4),
2371 PORTCR(165, 0xe60520A5),
2372 PORTCR(166, 0xe60520A6),
2373 PORTCR(167, 0xe60520A7),
2374 PORTCR(168, 0xe60520A8),
2375 PORTCR(169, 0xe60520A9),
2376 PORTCR(170, 0xe60520AA),
2377 PORTCR(171, 0xe60520AB),
2378 PORTCR(172, 0xe60520AC),
2379 PORTCR(173, 0xe60520AD),
2380 PORTCR(174, 0xe60520AE),
2381 PORTCR(175, 0xe60520AF),
2382 PORTCR(176, 0xe60520B0),
2383 PORTCR(177, 0xe60520B1),
2384 PORTCR(178, 0xe60520B2),
2385 PORTCR(192, 0xe60520C0),
2386 PORTCR(193, 0xe60520C1),
2387 PORTCR(194, 0xe60520C2),
2388 PORTCR(195, 0xe60520C3),
2389 PORTCR(196, 0xe60520C4),
2390 PORTCR(197, 0xe60520C5),
2391 PORTCR(198, 0xe60520C6),
2392 PORTCR(199, 0xe60520C7),
2393 PORTCR(200, 0xe60520C8),
2394 PORTCR(201, 0xe60520C9),
2395 PORTCR(202, 0xe60520CA),
2396 PORTCR(203, 0xe60520CB),
2397 PORTCR(204, 0xe60520CC),
2398 PORTCR(205, 0xe60520CD),
2399 PORTCR(206, 0xe60520CE),
2400 PORTCR(207, 0xe60520CF),
2401 PORTCR(208, 0xe60520D0),
2402 PORTCR(209, 0xe60520D1),
2403 PORTCR(210, 0xe60520D2),
2404 PORTCR(211, 0xe60520D3),
2405 PORTCR(212, 0xe60520D4),
2406 PORTCR(213, 0xe60520D5),
2407 PORTCR(214, 0xe60520D6),
2408 PORTCR(215, 0xe60520D7),
2409 PORTCR(216, 0xe60520D8),
2410 PORTCR(217, 0xe60520D9),
2411 PORTCR(218, 0xe60520DA),
2412 PORTCR(219, 0xe60520DB),
2413 PORTCR(220, 0xe60520DC),
2414 PORTCR(221, 0xe60520DD),
2415 PORTCR(222, 0xe60520DE),
2416 PORTCR(224, 0xe60520E0),
2417 PORTCR(225, 0xe60520E1),
2418 PORTCR(226, 0xe60520E2),
2419 PORTCR(227, 0xe60520E3),
2420 PORTCR(228, 0xe60520E4),
2421 PORTCR(229, 0xe60520E5),
2422 PORTCR(230, 0xe60520e6),
2423 PORTCR(231, 0xe60520E7),
2424 PORTCR(232, 0xe60520E8),
2425 PORTCR(233, 0xe60520E9),
2426 PORTCR(234, 0xe60520EA),
2427 PORTCR(235, 0xe60520EB),
2428 PORTCR(236, 0xe60520EC),
2429 PORTCR(237, 0xe60520ED),
2430 PORTCR(238, 0xe60520EE),
2431 PORTCR(239, 0xe60520EF),
2432 PORTCR(240, 0xe60520F0),
2433 PORTCR(241, 0xe60520F1),
2434 PORTCR(242, 0xe60520F2),
2435 PORTCR(243, 0xe60520F3),
2436 PORTCR(244, 0xe60520F4),
2437 PORTCR(245, 0xe60520F5),
2438 PORTCR(246, 0xe60520F6),
2439 PORTCR(247, 0xe60520F7),
2440 PORTCR(248, 0xe60520F8),
2441 PORTCR(249, 0xe60520F9),
2442 PORTCR(250, 0xe60520FA),
2443 PORTCR(256, 0xe6052100),
2444 PORTCR(257, 0xe6052101),
2445 PORTCR(258, 0xe6052102),
2446 PORTCR(259, 0xe6052103),
2447 PORTCR(260, 0xe6052104),
2448 PORTCR(261, 0xe6052105),
2449 PORTCR(262, 0xe6052106),
2450 PORTCR(263, 0xe6052107),
2451 PORTCR(264, 0xe6052108),
2452 PORTCR(265, 0xe6052109),
2453 PORTCR(266, 0xe605210A),
2454 PORTCR(267, 0xe605210B),
2455 PORTCR(268, 0xe605210C),
2456 PORTCR(269, 0xe605210D),
2457 PORTCR(270, 0xe605210E),
2458 PORTCR(271, 0xe605210F),
2459 PORTCR(272, 0xe6052110),
2460 PORTCR(273, 0xe6052111),
2461 PORTCR(274, 0xe6052112),
2462 PORTCR(275, 0xe6052113),
2463 PORTCR(276, 0xe6052114),
2464 PORTCR(277, 0xe6052115),
2465 PORTCR(278, 0xe6052116),
2466 PORTCR(279, 0xe6052117),
2467 PORTCR(280, 0xe6052118),
2468 PORTCR(281, 0xe6052119),
2469 PORTCR(282, 0xe605211A),
2470 PORTCR(283, 0xe605211B),
2471 PORTCR(288, 0xe6053120),
2472 PORTCR(289, 0xe6053121),
2473 PORTCR(290, 0xe6053122),
2474 PORTCR(291, 0xe6053123),
2475 PORTCR(292, 0xe6053124),
2476 PORTCR(293, 0xe6053125),
2477 PORTCR(294, 0xe6053126),
2478 PORTCR(295, 0xe6053127),
2479 PORTCR(296, 0xe6053128),
2480 PORTCR(297, 0xe6053129),
2481 PORTCR(298, 0xe605312A),
2482 PORTCR(299, 0xe605312B),
2483 PORTCR(300, 0xe605312C),
2484 PORTCR(301, 0xe605312D),
2485 PORTCR(302, 0xe605312E),
2486 PORTCR(303, 0xe605312F),
2487 PORTCR(304, 0xe6053130),
2488 PORTCR(305, 0xe6053131),
2489 PORTCR(306, 0xe6053132),
2490 PORTCR(307, 0xe6053133),
2491 PORTCR(308, 0xe6053134),
2492 PORTCR(320, 0xe6053140),
2493 PORTCR(321, 0xe6053141),
2494 PORTCR(322, 0xe6053142),
2495 PORTCR(323, 0xe6053143),
2496 PORTCR(324, 0xe6053144),
2497 PORTCR(325, 0xe6053145),
2498 PORTCR(326, 0xe6053146),
2499 PORTCR(327, 0xe6053147),
2500 PORTCR(328, 0xe6053148),
2501 PORTCR(329, 0xe6053149),
2502
2503 { PINMUX_CFG_REG("MSEL1CR", 0xe605800c, 32, 1) {
2504 MSEL1CR_31_0, MSEL1CR_31_1,
2505 0, 0,
2506 0, 0,
2507 0, 0,
2508 MSEL1CR_27_0, MSEL1CR_27_1,
2509 0, 0,
2510 MSEL1CR_25_0, MSEL1CR_25_1,
2511 MSEL1CR_24_0, MSEL1CR_24_1,
2512 0, 0,
2513 MSEL1CR_22_0, MSEL1CR_22_1,
2514 MSEL1CR_21_0, MSEL1CR_21_1,
2515 MSEL1CR_20_0, MSEL1CR_20_1,
2516 MSEL1CR_19_0, MSEL1CR_19_1,
2517 MSEL1CR_18_0, MSEL1CR_18_1,
2518 MSEL1CR_17_0, MSEL1CR_17_1,
2519 MSEL1CR_16_0, MSEL1CR_16_1,
2520 MSEL1CR_15_0, MSEL1CR_15_1,
2521 MSEL1CR_14_0, MSEL1CR_14_1,
2522 MSEL1CR_13_0, MSEL1CR_13_1,
2523 MSEL1CR_12_0, MSEL1CR_12_1,
2524 MSEL1CR_11_0, MSEL1CR_11_1,
2525 MSEL1CR_10_0, MSEL1CR_10_1,
2526 MSEL1CR_09_0, MSEL1CR_09_1,
2527 MSEL1CR_08_0, MSEL1CR_08_1,
2528 MSEL1CR_07_0, MSEL1CR_07_1,
2529 MSEL1CR_06_0, MSEL1CR_06_1,
2530 MSEL1CR_05_0, MSEL1CR_05_1,
2531 MSEL1CR_04_0, MSEL1CR_04_1,
2532 MSEL1CR_03_0, MSEL1CR_03_1,
2533 MSEL1CR_02_0, MSEL1CR_02_1,
2534 MSEL1CR_01_0, MSEL1CR_01_1,
2535 MSEL1CR_00_0, MSEL1CR_00_1,
2536 }
2537 },
2538 { PINMUX_CFG_REG("MSEL3CR", 0xe6058020, 32, 1) {
2539 MSEL3CR_31_0, MSEL3CR_31_1,
2540 0, 0,
2541 0, 0,
2542 MSEL3CR_28_0, MSEL3CR_28_1,
2543 MSEL3CR_27_0, MSEL3CR_27_1,
2544 MSEL3CR_26_0, MSEL3CR_26_1,
2545 0, 0,
2546 0, 0,
2547 MSEL3CR_23_0, MSEL3CR_23_1,
2548 MSEL3CR_22_0, MSEL3CR_22_1,
2549 MSEL3CR_21_0, MSEL3CR_21_1,
2550 MSEL3CR_20_0, MSEL3CR_20_1,
2551 MSEL3CR_19_0, MSEL3CR_19_1,
2552 MSEL3CR_18_0, MSEL3CR_18_1,
2553 MSEL3CR_17_0, MSEL3CR_17_1,
2554 MSEL3CR_16_0, MSEL3CR_16_1,
2555 MSEL3CR_15_0, MSEL3CR_15_1,
2556 0, 0,
2557 0, 0,
2558 MSEL3CR_12_0, MSEL3CR_12_1,
2559 MSEL3CR_11_0, MSEL3CR_11_1,
2560 MSEL3CR_10_0, MSEL3CR_10_1,
2561 MSEL3CR_09_0, MSEL3CR_09_1,
2562 0, 0,
2563 0, 0,
2564 MSEL3CR_06_0, MSEL3CR_06_1,
2565 0, 0,
2566 0, 0,
2567 MSEL3CR_03_0, MSEL3CR_03_1,
2568 0, 0,
2569 MSEL3CR_01_0, MSEL3CR_01_1,
2570 MSEL3CR_00_0, MSEL3CR_00_1,
2571 }
2572 },
2573 { PINMUX_CFG_REG("MSEL4CR", 0xe6058024, 32, 1) {
2574 0, 0,
2575 MSEL4CR_30_0, MSEL4CR_30_1,
2576 MSEL4CR_29_0, MSEL4CR_29_1,
2577 MSEL4CR_28_0, MSEL4CR_28_1,
2578 MSEL4CR_27_0, MSEL4CR_27_1,
2579 MSEL4CR_26_0, MSEL4CR_26_1,
2580 MSEL4CR_25_0, MSEL4CR_25_1,
2581 MSEL4CR_24_0, MSEL4CR_24_1,
2582 MSEL4CR_23_0, MSEL4CR_23_1,
2583 MSEL4CR_22_0, MSEL4CR_22_1,
2584 MSEL4CR_21_0, MSEL4CR_21_1,
2585 MSEL4CR_20_0, MSEL4CR_20_1,
2586 MSEL4CR_19_0, MSEL4CR_19_1,
2587 MSEL4CR_18_0, MSEL4CR_18_1,
2588 MSEL4CR_17_0, MSEL4CR_17_1,
2589 MSEL4CR_16_0, MSEL4CR_16_1,
2590 MSEL4CR_15_0, MSEL4CR_15_1,
2591 MSEL4CR_14_0, MSEL4CR_14_1,
2592 MSEL4CR_13_0, MSEL4CR_13_1,
2593 MSEL4CR_12_0, MSEL4CR_12_1,
2594 MSEL4CR_11_0, MSEL4CR_11_1,
2595 MSEL4CR_10_0, MSEL4CR_10_1,
2596 MSEL4CR_09_0, MSEL4CR_09_1,
2597 0, 0,
2598 MSEL4CR_07_0, MSEL4CR_07_1,
2599 0, 0,
2600 0, 0,
2601 MSEL4CR_04_0, MSEL4CR_04_1,
2602 0, 0,
2603 0, 0,
2604 MSEL4CR_01_0, MSEL4CR_01_1,
2605 0, 0,
2606 }
2607 },
2608 { PINMUX_CFG_REG("MSEL5CR", 0xe6058028, 32, 1) {
2609 MSEL5CR_31_0, MSEL5CR_31_1,
2610 MSEL5CR_30_0, MSEL5CR_30_1,
2611 MSEL5CR_29_0, MSEL5CR_29_1,
2612 MSEL5CR_28_0, MSEL5CR_28_1,
2613 MSEL5CR_27_0, MSEL5CR_27_1,
2614 MSEL5CR_26_0, MSEL5CR_26_1,
2615 MSEL5CR_25_0, MSEL5CR_25_1,
2616 MSEL5CR_24_0, MSEL5CR_24_1,
2617 MSEL5CR_23_0, MSEL5CR_23_1,
2618 MSEL5CR_22_0, MSEL5CR_22_1,
2619 MSEL5CR_21_0, MSEL5CR_21_1,
2620 MSEL5CR_20_0, MSEL5CR_20_1,
2621 MSEL5CR_19_0, MSEL5CR_19_1,
2622 MSEL5CR_18_0, MSEL5CR_18_1,
2623 MSEL5CR_17_0, MSEL5CR_17_1,
2624 MSEL5CR_16_0, MSEL5CR_16_1,
2625 MSEL5CR_15_0, MSEL5CR_15_1,
2626 MSEL5CR_14_0, MSEL5CR_14_1,
2627 MSEL5CR_13_0, MSEL5CR_13_1,
2628 MSEL5CR_12_0, MSEL5CR_12_1,
2629 MSEL5CR_11_0, MSEL5CR_11_1,
2630 MSEL5CR_10_0, MSEL5CR_10_1,
2631 MSEL5CR_09_0, MSEL5CR_09_1,
2632 MSEL5CR_08_0, MSEL5CR_08_1,
2633 MSEL5CR_07_0, MSEL5CR_07_1,
2634 MSEL5CR_06_0, MSEL5CR_06_1,
2635 0, 0,
2636 0, 0,
2637 0, 0,
2638 0, 0,
2639 0, 0,
2640 0, 0,
2641 }
2642 },
2643 { PINMUX_CFG_REG("MSEL8CR", 0xe6058034, 32, 1) {
2644 0, 0,
2645 0, 0,
2646 0, 0,
2647 0, 0,
2648 0, 0,
2649 0, 0,
2650 0, 0,
2651 0, 0,
2652 0, 0,
2653 0, 0,
2654 0, 0,
2655 0, 0,
2656 0, 0,
2657 0, 0,
2658 0, 0,
2659 MSEL8CR_16_0, MSEL8CR_16_1,
2660 0, 0,
2661 0, 0,
2662 0, 0,
2663 0, 0,
2664 0, 0,
2665 0, 0,
2666 0, 0,
2667 0, 0,
2668 0, 0,
2669 0, 0,
2670 0, 0,
2671 0, 0,
2672 0, 0,
2673 0, 0,
2674 MSEL8CR_01_0, MSEL8CR_01_1,
2675 MSEL8CR_00_0, MSEL8CR_00_1,
2676 }
2677 },
2678 { },
2679};
2680
2681static const struct pinmux_data_reg pinmux_data_regs[] = {
2682
2683 { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
2684 0, PORT30_DATA, PORT29_DATA, PORT28_DATA,
2685 PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
2686 PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
2687 PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
2688 PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
2689 PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
2690 PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
2691 PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA,
2692 }
2693 },
2694 { PINMUX_DATA_REG("PORTD063_032DR", 0xe6055000, 32) {
2695 0, 0, 0, 0,
2696 0, 0, 0, 0,
2697 0, 0, 0, 0,
2698 0, 0, 0, 0,
2699 0, 0, 0, 0,
2700 0, 0, 0, PORT40_DATA,
2701 PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
2702 PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
2703 }
2704 },
2705 { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054004, 32) {
2706 0, 0, 0, 0,
2707 0, 0, 0, 0,
2708 0, 0, PORT85_DATA, PORT84_DATA,
2709 PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
2710 PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
2711 PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
2712 PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
2713 PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
2714 }
2715 },
2716 { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) {
2717 0, PORT126_DATA, PORT125_DATA, PORT124_DATA,
2718 PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA,
2719 PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
2720 PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
2721 PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
2722 PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
2723 PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
2724 PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA,
2725 }
2726 },
2727 { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) {
2728 0, 0, 0, 0,
2729 0, 0, 0, 0,
2730 0, 0, 0, 0,
2731 0, 0, 0, 0,
2732 0, 0, 0, 0,
2733 0, 0, 0, 0,
2734 0, PORT134_DATA, PORT133_DATA, PORT132_DATA,
2735 PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
2736 }
2737 },
2738 { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) {
2739 0, 0, 0, 0,
2740 0, 0, 0, 0,
2741 0, 0, 0, 0,
2742 0, PORT178_DATA, PORT177_DATA, PORT176_DATA,
2743 PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
2744 PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
2745 PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA,
2746 PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
2747 }
2748 },
2749 { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) {
2750 0, PORT222_DATA, PORT221_DATA, PORT220_DATA,
2751 PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
2752 PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
2753 PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
2754 PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
2755 PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
2756 PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
2757 PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA,
2758 }
2759 },
2760 { PINMUX_DATA_REG("PORTR255_224DR", 0xe6056008, 32) {
2761 0, 0, 0, 0,
2762 0, PORT250_DATA, PORT249_DATA, PORT248_DATA,
2763 PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
2764 PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
2765 PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
2766 PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
2767 PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
2768 PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA,
2769 }
2770 },
2771 { PINMUX_DATA_REG("PORTR287_256DR", 0xe605600C, 32) {
2772 0, 0, 0, 0,
2773 PORT283_DATA, PORT282_DATA, PORT281_DATA, PORT280_DATA,
2774 PORT279_DATA, PORT278_DATA, PORT277_DATA, PORT276_DATA,
2775 PORT275_DATA, PORT274_DATA, PORT273_DATA, PORT272_DATA,
2776 PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA,
2777 PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA,
2778 PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
2779 PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA,
2780 }
2781 },
2782 { PINMUX_DATA_REG("PORTU319_288DR", 0xe6057000, 32) {
2783 0, 0, 0, 0,
2784 0, 0, 0, 0,
2785 0, 0, 0, PORT308_DATA,
2786 PORT307_DATA, PORT306_DATA, PORT305_DATA, PORT304_DATA,
2787 PORT303_DATA, PORT302_DATA, PORT301_DATA, PORT300_DATA,
2788 PORT299_DATA, PORT298_DATA, PORT297_DATA, PORT296_DATA,
2789 PORT295_DATA, PORT294_DATA, PORT293_DATA, PORT292_DATA,
2790 PORT291_DATA, PORT290_DATA, PORT289_DATA, PORT288_DATA,
2791 }
2792 },
2793 { PINMUX_DATA_REG("PORTU351_320DR", 0xe6057004, 32) {
2794 0, 0, 0, 0,
2795 0, 0, 0, 0,
2796 0, 0, 0, 0,
2797 0, 0, 0, 0,
2798 0, 0, 0, 0,
2799 0, 0, PORT329_DATA, PORT328_DATA,
2800 PORT327_DATA, PORT326_DATA, PORT325_DATA, PORT324_DATA,
2801 PORT323_DATA, PORT322_DATA, PORT321_DATA, PORT320_DATA,
2802 }
2803 },
2804 { },
2805};
2806
2807const struct sh_pfc_soc_info r8a73a4_pinmux_info = {
2808 .name = "r8a73a4_pfc",
2809
2810 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
2811 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
2812 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
2813 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2814 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2815
2816 .pins = pinmux_pins,
2817 .nr_pins = ARRAY_SIZE(pinmux_pins),
2818 .func_gpios = pinmux_func_gpios,
2819 .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
2820
2821 .cfg_regs = pinmux_config_regs,
2822 .data_regs = pinmux_data_regs,
2823
2824 .gpio_data = pinmux_data,
2825 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2826};
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-01 03:19:01 -0500