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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2009-09-07 04:07:29 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-09-09 16:46:18 -0400
commitc9a918838c07cbef934c8ef818d8f0e719015c3a (patch)
treefa0978d67632a15fdd014f448ac099ab1ec8df75 /drivers/pci/pcie/aer/aerdrv_errprint.c
parentb439b1d4e3ae3c36ed94ed233119ff0d145af257 (diff)
PCI: pcie, aer: checkpatch style cleanup in pcie/aer/*
Before: drivers/pci/pcie/aer/aer_inject.c total: 4 errors, 4 warnings, 473 lines checked drivers/pci/pcie/aer/aerdrv.c total: 5 errors, 2 warnings, 333 lines checked drivers/pci/pcie/aer/aerdrv.h total: 1 errors, 0 warnings, 139 lines checked drivers/pci/pcie/aer/aerdrv_core.c total: 4 errors, 3 warnings, 872 lines checked drivers/pci/pcie/aer/aerdrv_errprint.c total: 12 errors, 11 warnings, 248 lines checked After: drivers/pci/pcie/aer/aer_inject.c total: 0 errors, 0 warnings, 466 lines checked drivers/pci/pcie/aer/aerdrv.c total: 0 errors, 0 warnings, 335 lines checked drivers/pci/pcie/aer/aerdrv.h total: 0 errors, 0 warnings, 139 lines checked drivers/pci/pcie/aer/aerdrv_core.c total: 0 errors, 0 warnings, 869 lines checked drivers/pci/pcie/aer/aerdrv_errprint.c total: 0 errors, 10 warnings, 247 lines checked Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pcie/aer/aerdrv_errprint.c')
-rw-r--r--drivers/pci/pcie/aer/aerdrv_errprint.c49
1 files changed, 24 insertions, 25 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
index 0fc29ae80df8..ccaeceb32da3 100644
--- a/drivers/pci/pcie/aer/aerdrv_errprint.c
+++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
@@ -33,7 +33,7 @@
33#define AER_AGENT_COMPLETER_MASK PCI_ERR_UNC_COMP_ABORT 33#define AER_AGENT_COMPLETER_MASK PCI_ERR_UNC_COMP_ABORT
34 34
35#define AER_AGENT_TRANSMITTER_MASK(t, e) (e & (PCI_ERR_COR_REP_ROLL| \ 35#define AER_AGENT_TRANSMITTER_MASK(t, e) (e & (PCI_ERR_COR_REP_ROLL| \
36 ((t == AER_CORRECTABLE) ? PCI_ERR_COR_REP_TIMER: 0))) 36 ((t == AER_CORRECTABLE) ? PCI_ERR_COR_REP_TIMER : 0)))
37 37
38#define AER_GET_AGENT(t, e) \ 38#define AER_GET_AGENT(t, e) \
39 ((e & AER_AGENT_COMPLETER_MASK) ? AER_AGENT_COMPLETER : \ 39 ((e & AER_AGENT_COMPLETER_MASK) ? AER_AGENT_COMPLETER : \
@@ -44,11 +44,11 @@
44#define AER_PHYSICAL_LAYER_ERROR_MASK PCI_ERR_COR_RCVR 44#define AER_PHYSICAL_LAYER_ERROR_MASK PCI_ERR_COR_RCVR
45#define AER_DATA_LINK_LAYER_ERROR_MASK(t, e) \ 45#define AER_DATA_LINK_LAYER_ERROR_MASK(t, e) \
46 (PCI_ERR_UNC_DLP| \ 46 (PCI_ERR_UNC_DLP| \
47 PCI_ERR_COR_BAD_TLP| \ 47 PCI_ERR_COR_BAD_TLP| \
48 PCI_ERR_COR_BAD_DLLP| \ 48 PCI_ERR_COR_BAD_DLLP| \
49 PCI_ERR_COR_REP_ROLL| \ 49 PCI_ERR_COR_REP_ROLL| \
50 ((t == AER_CORRECTABLE) ? \ 50 ((t == AER_CORRECTABLE) ? \
51 PCI_ERR_COR_REP_TIMER: 0)) 51 PCI_ERR_COR_REP_TIMER : 0))
52 52
53#define AER_PHYSICAL_LAYER_ERROR 0 53#define AER_PHYSICAL_LAYER_ERROR 0
54#define AER_DATA_LINK_LAYER_ERROR 1 54#define AER_DATA_LINK_LAYER_ERROR 1
@@ -58,38 +58,38 @@
58 ((e & AER_PHYSICAL_LAYER_ERROR_MASK) ? \ 58 ((e & AER_PHYSICAL_LAYER_ERROR_MASK) ? \
59 AER_PHYSICAL_LAYER_ERROR : \ 59 AER_PHYSICAL_LAYER_ERROR : \
60 (e & AER_DATA_LINK_LAYER_ERROR_MASK(t, e)) ? \ 60 (e & AER_DATA_LINK_LAYER_ERROR_MASK(t, e)) ? \
61 AER_DATA_LINK_LAYER_ERROR : \ 61 AER_DATA_LINK_LAYER_ERROR : \
62 AER_TRANSACTION_LAYER_ERROR) 62 AER_TRANSACTION_LAYER_ERROR)
63 63
64/* 64/*
65 * AER error strings 65 * AER error strings
66 */ 66 */
67static char* aer_error_severity_string[] = { 67static char *aer_error_severity_string[] = {
68 "Uncorrected (Non-Fatal)", 68 "Uncorrected (Non-Fatal)",
69 "Uncorrected (Fatal)", 69 "Uncorrected (Fatal)",
70 "Corrected" 70 "Corrected"
71}; 71};
72 72
73static char* aer_error_layer[] = { 73static char *aer_error_layer[] = {
74 "Physical Layer", 74 "Physical Layer",
75 "Data Link Layer", 75 "Data Link Layer",
76 "Transaction Layer" 76 "Transaction Layer"
77}; 77};
78static char* aer_correctable_error_string[] = { 78static char *aer_correctable_error_string[] = {
79 "Receiver Error ", /* Bit Position 0 */ 79 "Receiver Error ", /* Bit Position 0 */
80 NULL, 80 NULL,
81 NULL, 81 NULL,
82 NULL, 82 NULL,
83 NULL, 83 NULL,
84 NULL, 84 NULL,
85 "Bad TLP ", /* Bit Position 6 */ 85 "Bad TLP ", /* Bit Position 6 */
86 "Bad DLLP ", /* Bit Position 7 */ 86 "Bad DLLP ", /* Bit Position 7 */
87 "RELAY_NUM Rollover ", /* Bit Position 8 */ 87 "RELAY_NUM Rollover ", /* Bit Position 8 */
88 NULL, 88 NULL,
89 NULL, 89 NULL,
90 NULL, 90 NULL,
91 "Replay Timer Timeout ", /* Bit Position 12 */ 91 "Replay Timer Timeout ", /* Bit Position 12 */
92 "Advisory Non-Fatal ", /* Bit Position 13 */ 92 "Advisory Non-Fatal ", /* Bit Position 13 */
93 NULL, 93 NULL,
94 NULL, 94 NULL,
95 NULL, 95 NULL,
@@ -110,7 +110,7 @@ static char* aer_correctable_error_string[] = {
110 NULL, 110 NULL,
111}; 111};
112 112
113static char* aer_uncorrectable_error_string[] = { 113static char *aer_uncorrectable_error_string[] = {
114 NULL, 114 NULL,
115 NULL, 115 NULL,
116 NULL, 116 NULL,
@@ -123,10 +123,10 @@ static char* aer_uncorrectable_error_string[] = {
123 NULL, 123 NULL,
124 NULL, 124 NULL,
125 NULL, 125 NULL,
126 "Poisoned TLP ", /* Bit Position 12 */ 126 "Poisoned TLP ", /* Bit Position 12 */
127 "Flow Control Protocol ", /* Bit Position 13 */ 127 "Flow Control Protocol ", /* Bit Position 13 */
128 "Completion Timeout ", /* Bit Position 14 */ 128 "Completion Timeout ", /* Bit Position 14 */
129 "Completer Abort ", /* Bit Position 15 */ 129 "Completer Abort ", /* Bit Position 15 */
130 "Unexpected Completion ", /* Bit Position 16 */ 130 "Unexpected Completion ", /* Bit Position 16 */
131 "Receiver Overflow ", /* Bit Position 17 */ 131 "Receiver Overflow ", /* Bit Position 17 */
132 "Malformed TLP ", /* Bit Position 18 */ 132 "Malformed TLP ", /* Bit Position 18 */
@@ -145,19 +145,19 @@ static char* aer_uncorrectable_error_string[] = {
145 NULL, 145 NULL,
146}; 146};
147 147
148static char* aer_agent_string[] = { 148static char *aer_agent_string[] = {
149 "Receiver ID", 149 "Receiver ID",
150 "Requester ID", 150 "Requester ID",
151 "Completer ID", 151 "Completer ID",
152 "Transmitter ID" 152 "Transmitter ID"
153}; 153};
154 154
155static char * aer_get_error_source_name(int severity, 155static char *aer_get_error_source_name(int severity,
156 unsigned int status, 156 unsigned int status,
157 char errmsg_buff[]) 157 char errmsg_buff[])
158{ 158{
159 int i; 159 int i;
160 char * errmsg = NULL; 160 char *errmsg = NULL;
161 161
162 for (i = 0; i < 32; i++) { 162 for (i = 0; i < 32; i++) {
163 if (!(status & (1 << i))) 163 if (!(status & (1 << i)))
@@ -183,9 +183,9 @@ static DEFINE_SPINLOCK(logbuf_lock);
183static char errmsg_buff[100]; 183static char errmsg_buff[100];
184void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) 184void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
185{ 185{
186 char * errmsg; 186 char *errmsg;
187 int err_layer, agent; 187 int err_layer, agent;
188 char * loglevel; 188 char *loglevel;
189 189
190 if (info->severity == AER_CORRECTABLE) 190 if (info->severity == AER_CORRECTABLE)
191 loglevel = KERN_WARNING; 191 loglevel = KERN_WARNING;
@@ -196,7 +196,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
196 printk("%sError Severity\t\t: %s\n", loglevel, 196 printk("%sError Severity\t\t: %s\n", loglevel,
197 aer_error_severity_string[info->severity]); 197 aer_error_severity_string[info->severity]);
198 198
199 if ( info->status == 0) { 199 if (info->status == 0) {
200 printk("%sPCIE Bus Error type\t: (Unaccessible)\n", loglevel); 200 printk("%sPCIE Bus Error type\t: (Unaccessible)\n", loglevel);
201 printk("%sUnaccessible Received\t: %s\n", loglevel, 201 printk("%sUnaccessible Received\t: %s\n", loglevel,
202 info->flags & AER_MULTI_ERROR_VALID_FLAG ? 202 info->flags & AER_MULTI_ERROR_VALID_FLAG ?
@@ -245,4 +245,3 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
245 } 245 }
246 } 246 }
247} 247}
248