diff options
author | rajesh.shah@intel.com <rajesh.shah@intel.com> | 2005-10-13 15:05:42 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2005-10-28 18:37:00 -0400 |
commit | ee138334d5eb5ca662b2d69228420c1ccc051e0e (patch) | |
tree | 6c8f0d28ab39f4ea9abb0e9986f8c9a3fca6f470 /drivers/pci/hotplug/shpchp_hpc.c | |
parent | 2178bfad9ccb0cbeb79599dd1dc349dd4567aa49 (diff) |
[PATCH] shpchp: miscellaneous cleanups
Remove un-necessary header includes, remove dead code, remove
some type casts, receive function return in the correct data
type...
Signed-off-by: Rajesh Shah <rajesh.shah@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/hotplug/shpchp_hpc.c')
-rw-r--r-- | drivers/pci/hotplug/shpchp_hpc.c | 126 |
1 files changed, 29 insertions, 97 deletions
diff --git a/drivers/pci/hotplug/shpchp_hpc.c b/drivers/pci/hotplug/shpchp_hpc.c index d55a9a7f8d2b..d46a47603386 100644 --- a/drivers/pci/hotplug/shpchp_hpc.c +++ b/drivers/pci/hotplug/shpchp_hpc.c | |||
@@ -27,17 +27,10 @@ | |||
27 | * | 27 | * |
28 | */ | 28 | */ |
29 | 29 | ||
30 | #include <linux/config.h> | ||
31 | #include <linux/kernel.h> | 30 | #include <linux/kernel.h> |
32 | #include <linux/module.h> | 31 | #include <linux/module.h> |
33 | #include <linux/types.h> | 32 | #include <linux/types.h> |
34 | #include <linux/slab.h> | ||
35 | #include <linux/vmalloc.h> | ||
36 | #include <linux/interrupt.h> | ||
37 | #include <linux/spinlock.h> | ||
38 | #include <linux/delay.h> | ||
39 | #include <linux/pci.h> | 33 | #include <linux/pci.h> |
40 | #include <asm/system.h> | ||
41 | #include "shpchp.h" | 34 | #include "shpchp.h" |
42 | 35 | ||
43 | #ifdef DEBUG | 36 | #ifdef DEBUG |
@@ -282,7 +275,7 @@ static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int seconds) | |||
282 | 275 | ||
283 | static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) | 276 | static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) |
284 | { | 277 | { |
285 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 278 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
286 | u16 cmd_status; | 279 | u16 cmd_status; |
287 | int retval = 0; | 280 | int retval = 0; |
288 | u16 temp_word; | 281 | u16 temp_word; |
@@ -328,7 +321,7 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) | |||
328 | 321 | ||
329 | static int hpc_check_cmd_status(struct controller *ctrl) | 322 | static int hpc_check_cmd_status(struct controller *ctrl) |
330 | { | 323 | { |
331 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; | 324 | struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle; |
332 | u16 cmd_status; | 325 | u16 cmd_status; |
333 | int retval = 0; | 326 | int retval = 0; |
334 | 327 | ||
@@ -368,7 +361,7 @@ static int hpc_check_cmd_status(struct controller *ctrl) | |||
368 | 361 | ||
369 | static int hpc_get_attention_status(struct slot *slot, u8 *status) | 362 | static int hpc_get_attention_status(struct slot *slot, u8 *status) |
370 | { | 363 | { |
371 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 364 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
372 | u32 slot_reg; | 365 | u32 slot_reg; |
373 | u16 slot_status; | 366 | u16 slot_status; |
374 | u8 atten_led_state; | 367 | u8 atten_led_state; |
@@ -408,7 +401,7 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status) | |||
408 | 401 | ||
409 | static int hpc_get_power_status(struct slot * slot, u8 *status) | 402 | static int hpc_get_power_status(struct slot * slot, u8 *status) |
410 | { | 403 | { |
411 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 404 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
412 | u32 slot_reg; | 405 | u32 slot_reg; |
413 | u16 slot_status; | 406 | u16 slot_status; |
414 | u8 slot_state; | 407 | u8 slot_state; |
@@ -450,7 +443,7 @@ static int hpc_get_power_status(struct slot * slot, u8 *status) | |||
450 | 443 | ||
451 | static int hpc_get_latch_status(struct slot *slot, u8 *status) | 444 | static int hpc_get_latch_status(struct slot *slot, u8 *status) |
452 | { | 445 | { |
453 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 446 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
454 | u32 slot_reg; | 447 | u32 slot_reg; |
455 | u16 slot_status; | 448 | u16 slot_status; |
456 | 449 | ||
@@ -473,7 +466,7 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status) | |||
473 | 466 | ||
474 | static int hpc_get_adapter_status(struct slot *slot, u8 *status) | 467 | static int hpc_get_adapter_status(struct slot *slot, u8 *status) |
475 | { | 468 | { |
476 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 469 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
477 | u32 slot_reg; | 470 | u32 slot_reg; |
478 | u16 slot_status; | 471 | u16 slot_status; |
479 | u8 card_state; | 472 | u8 card_state; |
@@ -496,7 +489,7 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status) | |||
496 | 489 | ||
497 | static int hpc_get_prog_int(struct slot *slot, u8 *prog_int) | 490 | static int hpc_get_prog_int(struct slot *slot, u8 *prog_int) |
498 | { | 491 | { |
499 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 492 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
500 | 493 | ||
501 | DBG_ENTER_ROUTINE | 494 | DBG_ENTER_ROUTINE |
502 | 495 | ||
@@ -513,7 +506,7 @@ static int hpc_get_prog_int(struct slot *slot, u8 *prog_int) | |||
513 | 506 | ||
514 | static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value) | 507 | static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value) |
515 | { | 508 | { |
516 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 509 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
517 | u32 slot_reg; | 510 | u32 slot_reg; |
518 | u16 slot_status, sec_bus_status; | 511 | u16 slot_status, sec_bus_status; |
519 | u8 m66_cap, pcix_cap, pi; | 512 | u8 m66_cap, pcix_cap, pi; |
@@ -594,7 +587,7 @@ static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value) | |||
594 | 587 | ||
595 | static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode) | 588 | static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode) |
596 | { | 589 | { |
597 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 590 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
598 | u16 sec_bus_status; | 591 | u16 sec_bus_status; |
599 | u8 pi; | 592 | u8 pi; |
600 | int retval = 0; | 593 | int retval = 0; |
@@ -623,7 +616,7 @@ static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode) | |||
623 | 616 | ||
624 | static int hpc_query_power_fault(struct slot * slot) | 617 | static int hpc_query_power_fault(struct slot * slot) |
625 | { | 618 | { |
626 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 619 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
627 | u32 slot_reg; | 620 | u32 slot_reg; |
628 | u16 slot_status; | 621 | u16 slot_status; |
629 | u8 pwr_fault_state, status; | 622 | u8 pwr_fault_state, status; |
@@ -647,7 +640,7 @@ static int hpc_query_power_fault(struct slot * slot) | |||
647 | 640 | ||
648 | static int hpc_set_attention_status(struct slot *slot, u8 value) | 641 | static int hpc_set_attention_status(struct slot *slot, u8 value) |
649 | { | 642 | { |
650 | struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 643 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
651 | u8 slot_cmd = 0; | 644 | u8 slot_cmd = 0; |
652 | int rc = 0; | 645 | int rc = 0; |
653 | 646 | ||
@@ -683,7 +676,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) | |||
683 | 676 | ||
684 | static void hpc_set_green_led_on(struct slot *slot) | 677 | static void hpc_set_green_led_on(struct slot *slot) |
685 | { | 678 | { |
686 | struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 679 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
687 | u8 slot_cmd; | 680 | u8 slot_cmd; |
688 | 681 | ||
689 | if (!slot->ctrl->hpc_ctlr_handle) { | 682 | if (!slot->ctrl->hpc_ctlr_handle) { |
@@ -705,7 +698,7 @@ static void hpc_set_green_led_on(struct slot *slot) | |||
705 | 698 | ||
706 | static void hpc_set_green_led_off(struct slot *slot) | 699 | static void hpc_set_green_led_off(struct slot *slot) |
707 | { | 700 | { |
708 | struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 701 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
709 | u8 slot_cmd; | 702 | u8 slot_cmd; |
710 | 703 | ||
711 | if (!slot->ctrl->hpc_ctlr_handle) { | 704 | if (!slot->ctrl->hpc_ctlr_handle) { |
@@ -727,7 +720,7 @@ static void hpc_set_green_led_off(struct slot *slot) | |||
727 | 720 | ||
728 | static void hpc_set_green_led_blink(struct slot *slot) | 721 | static void hpc_set_green_led_blink(struct slot *slot) |
729 | { | 722 | { |
730 | struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 723 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
731 | u8 slot_cmd; | 724 | u8 slot_cmd; |
732 | 725 | ||
733 | if (!slot->ctrl->hpc_ctlr_handle) { | 726 | if (!slot->ctrl->hpc_ctlr_handle) { |
@@ -754,7 +747,7 @@ int shpc_get_ctlr_slot_config(struct controller *ctrl, | |||
754 | int *updown, /* physical_slot_num increament: 1 or -1 */ | 747 | int *updown, /* physical_slot_num increament: 1 or -1 */ |
755 | int *flags) | 748 | int *flags) |
756 | { | 749 | { |
757 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; | 750 | struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle; |
758 | 751 | ||
759 | DBG_ENTER_ROUTINE | 752 | DBG_ENTER_ROUTINE |
760 | 753 | ||
@@ -776,7 +769,7 @@ int shpc_get_ctlr_slot_config(struct controller *ctrl, | |||
776 | 769 | ||
777 | static void hpc_release_ctlr(struct controller *ctrl) | 770 | static void hpc_release_ctlr(struct controller *ctrl) |
778 | { | 771 | { |
779 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; | 772 | struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle; |
780 | struct php_ctlr_state_s *p, *p_prev; | 773 | struct php_ctlr_state_s *p, *p_prev; |
781 | 774 | ||
782 | DBG_ENTER_ROUTINE | 775 | DBG_ENTER_ROUTINE |
@@ -828,7 +821,7 @@ DBG_LEAVE_ROUTINE | |||
828 | 821 | ||
829 | static int hpc_power_on_slot(struct slot * slot) | 822 | static int hpc_power_on_slot(struct slot * slot) |
830 | { | 823 | { |
831 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 824 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
832 | u8 slot_cmd; | 825 | u8 slot_cmd; |
833 | int retval = 0; | 826 | int retval = 0; |
834 | 827 | ||
@@ -859,7 +852,7 @@ static int hpc_power_on_slot(struct slot * slot) | |||
859 | 852 | ||
860 | static int hpc_slot_enable(struct slot * slot) | 853 | static int hpc_slot_enable(struct slot * slot) |
861 | { | 854 | { |
862 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 855 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
863 | u8 slot_cmd; | 856 | u8 slot_cmd; |
864 | int retval = 0; | 857 | int retval = 0; |
865 | 858 | ||
@@ -890,7 +883,7 @@ static int hpc_slot_enable(struct slot * slot) | |||
890 | 883 | ||
891 | static int hpc_slot_disable(struct slot * slot) | 884 | static int hpc_slot_disable(struct slot * slot) |
892 | { | 885 | { |
893 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 886 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
894 | u8 slot_cmd; | 887 | u8 slot_cmd; |
895 | int retval = 0; | 888 | int retval = 0; |
896 | 889 | ||
@@ -920,51 +913,12 @@ static int hpc_slot_disable(struct slot * slot) | |||
920 | return retval; | 913 | return retval; |
921 | } | 914 | } |
922 | 915 | ||
923 | static int hpc_enable_all_slots( struct slot *slot ) | ||
924 | { | ||
925 | int retval = 0; | ||
926 | |||
927 | DBG_ENTER_ROUTINE | ||
928 | |||
929 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
930 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
931 | return -1; | ||
932 | } | ||
933 | |||
934 | retval = shpc_write_cmd(slot, 0, SET_ENABLE_ALL); | ||
935 | if (retval) { | ||
936 | err("%s: Write command failed!\n", __FUNCTION__); | ||
937 | return -1; | ||
938 | } | ||
939 | |||
940 | DBG_LEAVE_ROUTINE | ||
941 | |||
942 | return retval; | ||
943 | } | ||
944 | |||
945 | static int hpc_pwr_on_all_slots(struct slot *slot) | ||
946 | { | ||
947 | int retval = 0; | ||
948 | |||
949 | DBG_ENTER_ROUTINE | ||
950 | |||
951 | retval = shpc_write_cmd(slot, 0, SET_PWR_ON_ALL); | ||
952 | |||
953 | if (retval) { | ||
954 | err("%s: Write command failed!\n", __FUNCTION__); | ||
955 | return -1; | ||
956 | } | ||
957 | |||
958 | DBG_LEAVE_ROUTINE | ||
959 | return retval; | ||
960 | } | ||
961 | |||
962 | static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value) | 916 | static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value) |
963 | { | 917 | { |
964 | u8 slot_cmd; | 918 | u8 slot_cmd; |
965 | u8 pi; | 919 | u8 pi; |
966 | int retval = 0; | 920 | int retval = 0; |
967 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 921 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
968 | 922 | ||
969 | DBG_ENTER_ROUTINE | 923 | DBG_ENTER_ROUTINE |
970 | 924 | ||
@@ -1184,7 +1138,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs) | |||
1184 | 1138 | ||
1185 | static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value) | 1139 | static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value) |
1186 | { | 1140 | { |
1187 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 1141 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
1188 | enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; | 1142 | enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; |
1189 | int retval = 0; | 1143 | int retval = 0; |
1190 | u8 pi; | 1144 | u8 pi; |
@@ -1253,7 +1207,7 @@ static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value) | |||
1253 | 1207 | ||
1254 | static int hpc_get_cur_bus_speed (struct slot *slot, enum pci_bus_speed *value) | 1208 | static int hpc_get_cur_bus_speed (struct slot *slot, enum pci_bus_speed *value) |
1255 | { | 1209 | { |
1256 | struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; | 1210 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; |
1257 | enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; | 1211 | enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; |
1258 | u16 sec_bus_status; | 1212 | u16 sec_bus_status; |
1259 | int retval = 0; | 1213 | int retval = 0; |
@@ -1367,8 +1321,6 @@ static struct hpc_ops shpchp_hpc_ops = { | |||
1367 | .power_on_slot = hpc_power_on_slot, | 1321 | .power_on_slot = hpc_power_on_slot, |
1368 | .slot_enable = hpc_slot_enable, | 1322 | .slot_enable = hpc_slot_enable, |
1369 | .slot_disable = hpc_slot_disable, | 1323 | .slot_disable = hpc_slot_disable, |
1370 | .enable_all_slots = hpc_enable_all_slots, | ||
1371 | .pwr_on_all_slots = hpc_pwr_on_all_slots, | ||
1372 | .set_bus_speed_mode = hpc_set_bus_speed_mode, | 1324 | .set_bus_speed_mode = hpc_set_bus_speed_mode, |
1373 | .set_attention_status = hpc_set_attention_status, | 1325 | .set_attention_status = hpc_set_attention_status, |
1374 | .get_power_status = hpc_get_power_status, | 1326 | .get_power_status = hpc_get_power_status, |
@@ -1391,12 +1343,7 @@ static struct hpc_ops shpchp_hpc_ops = { | |||
1391 | .check_cmd_status = hpc_check_cmd_status, | 1343 | .check_cmd_status = hpc_check_cmd_status, |
1392 | }; | 1344 | }; |
1393 | 1345 | ||
1394 | int shpc_init(struct controller * ctrl, | 1346 | int shpc_init(struct controller * ctrl, struct pci_dev * pdev) |
1395 | struct pci_dev * pdev, | ||
1396 | php_intr_callback_t attention_button_callback, | ||
1397 | php_intr_callback_t switch_change_callback, | ||
1398 | php_intr_callback_t presence_change_callback, | ||
1399 | php_intr_callback_t power_fault_callback) | ||
1400 | { | 1347 | { |
1401 | struct php_ctlr_state_s *php_ctlr, *p; | 1348 | struct php_ctlr_state_s *php_ctlr, *p; |
1402 | void *instance_id = ctrl; | 1349 | void *instance_id = ctrl; |
@@ -1405,7 +1352,6 @@ int shpc_init(struct controller * ctrl, | |||
1405 | static int first = 1; | 1352 | static int first = 1; |
1406 | u32 shpc_cap_offset, shpc_base_offset; | 1353 | u32 shpc_cap_offset, shpc_base_offset; |
1407 | u32 tempdword, slot_reg; | 1354 | u32 tempdword, slot_reg; |
1408 | u16 vendor_id, device_id; | ||
1409 | u8 i; | 1355 | u8 i; |
1410 | 1356 | ||
1411 | DBG_ENTER_ROUTINE | 1357 | DBG_ENTER_ROUTINE |
@@ -1422,21 +1368,8 @@ int shpc_init(struct controller * ctrl, | |||
1422 | 1368 | ||
1423 | php_ctlr->pci_dev = pdev; /* save pci_dev in context */ | 1369 | php_ctlr->pci_dev = pdev; /* save pci_dev in context */ |
1424 | 1370 | ||
1425 | rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); | 1371 | if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device == |
1426 | dbg("%s: Vendor ID: %x\n",__FUNCTION__, vendor_id); | 1372 | PCI_DEVICE_ID_AMD_GOLAM_7450)) { |
1427 | if (rc) { | ||
1428 | err("%s: unable to read PCI configuration data\n", __FUNCTION__); | ||
1429 | goto abort_free_ctlr; | ||
1430 | } | ||
1431 | |||
1432 | rc = pci_read_config_word(pdev, PCI_DEVICE_ID, &device_id); | ||
1433 | dbg("%s: Device ID: %x\n",__FUNCTION__, device_id); | ||
1434 | if (rc) { | ||
1435 | err("%s: unable to read PCI configuration data\n", __FUNCTION__); | ||
1436 | goto abort_free_ctlr; | ||
1437 | } | ||
1438 | |||
1439 | if ((vendor_id == PCI_VENDOR_ID_AMD) || (device_id == PCI_DEVICE_ID_AMD_GOLAM_7450)) { | ||
1440 | shpc_base_offset = 0; /* amd shpc driver doesn't use this; assume 0 */ | 1373 | shpc_base_offset = 0; /* amd shpc driver doesn't use this; assume 0 */ |
1441 | } else { | 1374 | } else { |
1442 | if ((shpc_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC)) == 0) { | 1375 | if ((shpc_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC)) == 0) { |
@@ -1514,11 +1447,10 @@ int shpc_init(struct controller * ctrl, | |||
1514 | php_ctlr->irq = pdev->irq; | 1447 | php_ctlr->irq = pdev->irq; |
1515 | dbg("HPC interrupt = %d\n", php_ctlr->irq); | 1448 | dbg("HPC interrupt = %d\n", php_ctlr->irq); |
1516 | 1449 | ||
1517 | /* Save interrupt callback info */ | 1450 | php_ctlr->attention_button_callback = shpchp_handle_attention_button, |
1518 | php_ctlr->attention_button_callback = attention_button_callback; | 1451 | php_ctlr->switch_change_callback = shpchp_handle_switch_change; |
1519 | php_ctlr->switch_change_callback = switch_change_callback; | 1452 | php_ctlr->presence_change_callback = shpchp_handle_presence_change; |
1520 | php_ctlr->presence_change_callback = presence_change_callback; | 1453 | php_ctlr->power_fault_callback = shpchp_handle_power_fault; |
1521 | php_ctlr->power_fault_callback = power_fault_callback; | ||
1522 | php_ctlr->callback_instance_id = instance_id; | 1454 | php_ctlr->callback_instance_id = instance_id; |
1523 | 1455 | ||
1524 | /* Return PCI Controller Info */ | 1456 | /* Return PCI Controller Info */ |