diff options
author | Dong Aisheng <b29396@freescale.com> | 2014-07-04 09:59:40 -0400 |
---|---|---|
committer | Jason Liu <r64343@freescale.com> | 2014-07-04 10:20:34 -0400 |
commit | 5084ced8edeb89147aa6784d5491d211afdc8fd2 (patch) | |
tree | 276c3fdf71f0b41e8da8d7aed734579759b18219 /drivers/net | |
parent | 6621db631c60610257e92357769a3aa5527fe08f (diff) |
ENGR00321358-1 can: m_can: fix incorrect buffer offset
Each buffer offset already contains the mram_off, so do not
need add mram_off again.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/can/m_can.c | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/drivers/net/can/m_can.c b/drivers/net/can/m_can.c index ed6d86bfdd02..aa1f722f2b31 100644 --- a/drivers/net/can/m_can.c +++ b/drivers/net/can/m_can.c | |||
@@ -682,21 +682,19 @@ static void m_can_chip_config(struct net_device *dev) | |||
682 | m_can_write(priv, M_CAN_GFC, 0x0); | 682 | m_can_write(priv, M_CAN_GFC, 0x0); |
683 | 683 | ||
684 | /* only support one Tx Buffer currently */ | 684 | /* only support one Tx Buffer currently */ |
685 | m_can_write(priv, M_CAN_TXBC, (1 << TXBC_NDTB_OFF) | | 685 | m_can_write(priv, M_CAN_TXBC, (1 << TXBC_NDTB_OFF) | priv->txb_off); |
686 | (priv->mram_off + priv->txb_off)); | ||
687 | 686 | ||
688 | /* only support 8 bytes firstly */ | 687 | /* only support 8 bytes firstly */ |
689 | m_can_write(priv, M_CAN_TXESC, TXESC_TBDS_8BYTES); | 688 | m_can_write(priv, M_CAN_TXESC, TXESC_TBDS_8BYTES); |
690 | 689 | ||
691 | m_can_write(priv, M_CAN_TXEFC, 0x00010000 | | 690 | m_can_write(priv, M_CAN_TXEFC, 0x00010000 | priv->txe_off); |
692 | (priv->mram_off + priv->txe_off)); | ||
693 | 691 | ||
694 | /* rx fifo configuration, blocking mode, fifo size 1 */ | 692 | /* rx fifo configuration, blocking mode, fifo size 1 */ |
695 | m_can_write(priv, M_CAN_RXF0C, (priv->rxf0_elems << RXFC_FS_OFF) | | 693 | m_can_write(priv, M_CAN_RXF0C, (priv->rxf0_elems << RXFC_FS_OFF) | |
696 | RXFC_FWM_1 | (priv->mram_off + priv->rxf0_off)); | 694 | RXFC_FWM_1 | priv->rxf0_off); |
697 | 695 | ||
698 | m_can_write(priv, M_CAN_RXF1C, (priv->rxf1_elems << RXFC_FS_OFF) | | 696 | m_can_write(priv, M_CAN_RXF1C, (priv->rxf1_elems << RXFC_FS_OFF) | |
699 | RXFC_FWM_1 | (priv->mram_off + priv->rxf1_off)); | 697 | RXFC_FWM_1 | priv->rxf1_off); |
700 | 698 | ||
701 | cccr = m_can_read(priv, M_CAN_CCCR); | 699 | cccr = m_can_read(priv, M_CAN_CCCR); |
702 | cccr &= ~(CCCR_TEST | CCCR_MON); | 700 | cccr &= ~(CCCR_TEST | CCCR_MON); |
@@ -868,14 +866,12 @@ static netdev_tx_t m_can_start_xmit(struct sk_buff *skb, | |||
868 | } | 866 | } |
869 | 867 | ||
870 | /* message ram configuration */ | 868 | /* message ram configuration */ |
871 | writel(id | flags, | 869 | writel(id | flags, priv->mram_base + priv->txb_off); |
872 | priv->mram_base + priv->mram_off + priv->txb_off); | 870 | writel(frame->can_dlc << 16, priv->mram_base + priv->txb_off + 0x4); |
873 | writel(frame->can_dlc << 16, | ||
874 | priv->mram_base + priv->mram_off + priv->txb_off + 0x4); | ||
875 | writel(*(u32 *)(frame->data + 0), | 871 | writel(*(u32 *)(frame->data + 0), |
876 | priv->mram_base + priv->mram_off + priv->txb_off + 0x8); | 872 | priv->mram_base + priv->txb_off + 0x8); |
877 | writel(*(u32 *)(frame->data + 4), | 873 | writel(*(u32 *)(frame->data + 4), |
878 | priv->mram_base + priv->mram_off + priv->txb_off + 0xc); | 874 | priv->mram_base + priv->txb_off + 0xc); |
879 | 875 | ||
880 | can_put_echo_skb(skb, dev, 0); | 876 | can_put_echo_skb(skb, dev, 0); |
881 | 877 | ||