diff options
author | Emmanuel Grumbach <emmanuel.grumbach@intel.com> | 2012-04-18 10:28:17 -0400 |
---|---|---|
committer | Wey-Yi Guy <wey-yi.w.guy@intel.com> | 2012-04-18 10:29:43 -0400 |
commit | 68e8dfdadb424fd76ca81eeb399c3228adc5cea2 (patch) | |
tree | e8b641240ec3cdf61aa218d2c9d7e9c340683f69 /drivers/net/wireless/iwlwifi/iwl-eeprom.c | |
parent | 9130bab137844d9ad3db6ab524de299cd2b9e39d (diff) |
iwlwifi: op_mode holds its pointer to the transport
Instead of using the shared area that we be killed.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-eeprom.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-eeprom.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c index a004431d1a60..622a8f33d178 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c | |||
@@ -189,7 +189,7 @@ static void iwl_eeprom_release_semaphore(struct iwl_trans *trans) | |||
189 | 189 | ||
190 | static int iwl_eeprom_verify_signature(struct iwl_priv *priv) | 190 | static int iwl_eeprom_verify_signature(struct iwl_priv *priv) |
191 | { | 191 | { |
192 | u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP) & | 192 | u32 gp = iwl_read32(priv->trans, CSR_EEPROM_GP) & |
193 | CSR_EEPROM_GP_VALID_MSK; | 193 | CSR_EEPROM_GP_VALID_MSK; |
194 | int ret = 0; | 194 | int ret = 0; |
195 | 195 | ||
@@ -719,14 +719,14 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv) | |||
719 | int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) | 719 | int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) |
720 | { | 720 | { |
721 | __le16 *e; | 721 | __le16 *e; |
722 | u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP); | 722 | u32 gp = iwl_read32(priv->trans, CSR_EEPROM_GP); |
723 | int sz; | 723 | int sz; |
724 | int ret; | 724 | int ret; |
725 | u16 addr; | 725 | u16 addr; |
726 | u16 validblockaddr = 0; | 726 | u16 validblockaddr = 0; |
727 | u16 cache_addr = 0; | 727 | u16 cache_addr = 0; |
728 | 728 | ||
729 | priv->nvm_device_type = iwl_get_nvm_type(trans(priv), hw_rev); | 729 | priv->nvm_device_type = iwl_get_nvm_type(priv->trans, hw_rev); |
730 | if (priv->nvm_device_type == -ENOENT) | 730 | if (priv->nvm_device_type == -ENOENT) |
731 | return -ENOENT; | 731 | return -ENOENT; |
732 | /* allocate eeprom */ | 732 | /* allocate eeprom */ |
@@ -747,7 +747,7 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) | |||
747 | } | 747 | } |
748 | 748 | ||
749 | /* Make sure driver (instead of uCode) is allowed to read EEPROM */ | 749 | /* Make sure driver (instead of uCode) is allowed to read EEPROM */ |
750 | ret = iwl_eeprom_acquire_semaphore(trans(priv)); | 750 | ret = iwl_eeprom_acquire_semaphore(priv->trans); |
751 | if (ret < 0) { | 751 | if (ret < 0) { |
752 | IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n"); | 752 | IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n"); |
753 | ret = -ENOENT; | 753 | ret = -ENOENT; |
@@ -756,22 +756,22 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) | |||
756 | 756 | ||
757 | if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) { | 757 | if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) { |
758 | 758 | ||
759 | ret = iwl_init_otp_access(trans(priv)); | 759 | ret = iwl_init_otp_access(priv->trans); |
760 | if (ret) { | 760 | if (ret) { |
761 | IWL_ERR(priv, "Failed to initialize OTP access.\n"); | 761 | IWL_ERR(priv, "Failed to initialize OTP access.\n"); |
762 | ret = -ENOENT; | 762 | ret = -ENOENT; |
763 | goto done; | 763 | goto done; |
764 | } | 764 | } |
765 | iwl_write32(trans(priv), CSR_EEPROM_GP, | 765 | iwl_write32(priv->trans, CSR_EEPROM_GP, |
766 | iwl_read32(trans(priv), CSR_EEPROM_GP) & | 766 | iwl_read32(priv->trans, CSR_EEPROM_GP) & |
767 | ~CSR_EEPROM_GP_IF_OWNER_MSK); | 767 | ~CSR_EEPROM_GP_IF_OWNER_MSK); |
768 | 768 | ||
769 | iwl_set_bit(trans(priv), CSR_OTP_GP_REG, | 769 | iwl_set_bit(priv->trans, CSR_OTP_GP_REG, |
770 | CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK | | 770 | CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK | |
771 | CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK); | 771 | CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK); |
772 | /* traversing the linked list if no shadow ram supported */ | 772 | /* traversing the linked list if no shadow ram supported */ |
773 | if (!cfg(priv)->base_params->shadow_ram_support) { | 773 | if (!cfg(priv)->base_params->shadow_ram_support) { |
774 | if (iwl_find_otp_image(trans(priv), &validblockaddr)) { | 774 | if (iwl_find_otp_image(priv->trans, &validblockaddr)) { |
775 | ret = -ENOENT; | 775 | ret = -ENOENT; |
776 | goto done; | 776 | goto done; |
777 | } | 777 | } |
@@ -780,7 +780,7 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) | |||
780 | addr += sizeof(u16)) { | 780 | addr += sizeof(u16)) { |
781 | __le16 eeprom_data; | 781 | __le16 eeprom_data; |
782 | 782 | ||
783 | ret = iwl_read_otp_word(trans(priv), addr, | 783 | ret = iwl_read_otp_word(priv->trans, addr, |
784 | &eeprom_data); | 784 | &eeprom_data); |
785 | if (ret) | 785 | if (ret) |
786 | goto done; | 786 | goto done; |
@@ -792,10 +792,10 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) | |||
792 | for (addr = 0; addr < sz; addr += sizeof(u16)) { | 792 | for (addr = 0; addr < sz; addr += sizeof(u16)) { |
793 | u32 r; | 793 | u32 r; |
794 | 794 | ||
795 | iwl_write32(trans(priv), CSR_EEPROM_REG, | 795 | iwl_write32(priv->trans, CSR_EEPROM_REG, |
796 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); | 796 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); |
797 | 797 | ||
798 | ret = iwl_poll_bit(trans(priv), CSR_EEPROM_REG, | 798 | ret = iwl_poll_bit(priv->trans, CSR_EEPROM_REG, |
799 | CSR_EEPROM_REG_READ_VALID_MSK, | 799 | CSR_EEPROM_REG_READ_VALID_MSK, |
800 | CSR_EEPROM_REG_READ_VALID_MSK, | 800 | CSR_EEPROM_REG_READ_VALID_MSK, |
801 | IWL_EEPROM_ACCESS_TIMEOUT); | 801 | IWL_EEPROM_ACCESS_TIMEOUT); |
@@ -804,7 +804,7 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) | |||
804 | "Time out reading EEPROM[%d]\n", addr); | 804 | "Time out reading EEPROM[%d]\n", addr); |
805 | goto done; | 805 | goto done; |
806 | } | 806 | } |
807 | r = iwl_read32(trans(priv), CSR_EEPROM_REG); | 807 | r = iwl_read32(priv->trans, CSR_EEPROM_REG); |
808 | e[addr / 2] = cpu_to_le16(r >> 16); | 808 | e[addr / 2] = cpu_to_le16(r >> 16); |
809 | } | 809 | } |
810 | } | 810 | } |
@@ -816,7 +816,7 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) | |||
816 | 816 | ||
817 | ret = 0; | 817 | ret = 0; |
818 | done: | 818 | done: |
819 | iwl_eeprom_release_semaphore(trans(priv)); | 819 | iwl_eeprom_release_semaphore(priv->trans); |
820 | 820 | ||
821 | err: | 821 | err: |
822 | if (ret) | 822 | if (ret) |
@@ -1132,7 +1132,7 @@ void iwl_rf_config(struct iwl_priv *priv) | |||
1132 | 1132 | ||
1133 | /* write radio config values to register */ | 1133 | /* write radio config values to register */ |
1134 | if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) { | 1134 | if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) { |
1135 | iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG, | 1135 | iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG, |
1136 | EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | | 1136 | EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | |
1137 | EEPROM_RF_CFG_STEP_MSK(radio_cfg) | | 1137 | EEPROM_RF_CFG_STEP_MSK(radio_cfg) | |
1138 | EEPROM_RF_CFG_DASH_MSK(radio_cfg)); | 1138 | EEPROM_RF_CFG_DASH_MSK(radio_cfg)); |
@@ -1144,7 +1144,7 @@ void iwl_rf_config(struct iwl_priv *priv) | |||
1144 | WARN_ON(1); | 1144 | WARN_ON(1); |
1145 | 1145 | ||
1146 | /* set CSR_HW_CONFIG_REG for uCode use */ | 1146 | /* set CSR_HW_CONFIG_REG for uCode use */ |
1147 | iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG, | 1147 | iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG, |
1148 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | 1148 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | |
1149 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | 1149 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); |
1150 | } | 1150 | } |