diff options
author | Tomas Winkler <tomas.winkler@intel.com> | 2008-04-16 19:34:49 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-05-07 15:02:10 -0400 |
commit | 6f4083aadd57e3da12fa4e67fcadaec23138a315 (patch) | |
tree | d824f8591b67b8d575b225928af84d491528736a /drivers/net/wireless/iwlwifi/iwl-csr.h | |
parent | 947b13a7ccd31d8adbf41f466d6a1c770461596a (diff) |
iwlwifi: cleanup set_pwr_src
This patch cleans up semantic of set_pwr_src
set_pwr_src is now part of apm handlers group
in iwlcore
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-csr.h')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-csr.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h index 12725796ea5f..a59f48b02f05 100644 --- a/drivers/net/wireless/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/iwlwifi/iwl-csr.h | |||
@@ -170,6 +170,10 @@ | |||
170 | #define CSR49_FH_INT_TX_MASK (CSR_FH_INT_BIT_TX_CHNL1 | \ | 170 | #define CSR49_FH_INT_TX_MASK (CSR_FH_INT_BIT_TX_CHNL1 | \ |
171 | CSR_FH_INT_BIT_TX_CHNL0) | 171 | CSR_FH_INT_BIT_TX_CHNL0) |
172 | 172 | ||
173 | /* GPIO */ | ||
174 | #define CSR_GPIO_IN_BIT_AUX_POWER (0x00000200) | ||
175 | #define CSR_GPIO_IN_VAL_VAUX_PWR_SRC (0x00000000) | ||
176 | #define CSR_GPIO_IN_VAL_VMAIN_PWR_SRC (0x00000200) | ||
173 | 177 | ||
174 | /* RESET */ | 178 | /* RESET */ |
175 | #define CSR_RESET_REG_FLAG_NEVO_RESET (0x00000001) | 179 | #define CSR_RESET_REG_FLAG_NEVO_RESET (0x00000001) |
@@ -206,11 +210,6 @@ | |||
206 | #define CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED (0x00000004) | 210 | #define CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED (0x00000004) |
207 | #define CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT (0x00000008) | 211 | #define CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT (0x00000008) |
208 | 212 | ||
209 | /* GPIO */ | ||
210 | #define CSR_GPIO_IN_BIT_AUX_POWER (0x00000200) | ||
211 | #define CSR_GPIO_IN_VAL_VAUX_PWR_SRC (0x00000000) | ||
212 | #define CSR_GPIO_IN_VAL_VMAIN_PWR_SRC CSR_GPIO_IN_BIT_AUX_POWER | ||
213 | |||
214 | /* GI Chicken Bits */ | 213 | /* GI Chicken Bits */ |
215 | #define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX (0x00800000) | 214 | #define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX (0x00800000) |
216 | #define CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER (0x20000000) | 215 | #define CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER (0x20000000) |