diff options
| author | Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> | 2011-12-07 06:21:39 -0500 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2011-12-16 09:30:42 -0500 |
| commit | 1b2538b2ab8f37e55b91b3cce98d2df5c126125d (patch) | |
| tree | 9b0bd6720383ca2532e508846becf97548858698 /drivers/net/wireless/ath/ath9k/hw.h | |
| parent | 356cb55d81d1692bd74b96c71deeb7e1cf956196 (diff) | |
ath9k_hw: remove ATH9K_HW_CAP_CST
its not used anywhere in the current code
Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 31 |
1 files changed, 15 insertions, 16 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index aadc7923b0c0..615cc839f0de 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
| @@ -196,22 +196,21 @@ enum ath_ini_subsys { | |||
| 196 | enum ath9k_hw_caps { | 196 | enum ath9k_hw_caps { |
| 197 | ATH9K_HW_CAP_HT = BIT(0), | 197 | ATH9K_HW_CAP_HT = BIT(0), |
| 198 | ATH9K_HW_CAP_RFSILENT = BIT(1), | 198 | ATH9K_HW_CAP_RFSILENT = BIT(1), |
| 199 | ATH9K_HW_CAP_CST = BIT(2), | 199 | ATH9K_HW_CAP_AUTOSLEEP = BIT(2), |
| 200 | ATH9K_HW_CAP_AUTOSLEEP = BIT(4), | 200 | ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(3), |
| 201 | ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(5), | 201 | ATH9K_HW_CAP_EDMA = BIT(4), |
| 202 | ATH9K_HW_CAP_EDMA = BIT(6), | 202 | ATH9K_HW_CAP_RAC_SUPPORTED = BIT(5), |
| 203 | ATH9K_HW_CAP_RAC_SUPPORTED = BIT(7), | 203 | ATH9K_HW_CAP_LDPC = BIT(6), |
| 204 | ATH9K_HW_CAP_LDPC = BIT(8), | 204 | ATH9K_HW_CAP_FASTCLOCK = BIT(7), |
| 205 | ATH9K_HW_CAP_FASTCLOCK = BIT(9), | 205 | ATH9K_HW_CAP_SGI_20 = BIT(8), |
| 206 | ATH9K_HW_CAP_SGI_20 = BIT(10), | 206 | ATH9K_HW_CAP_PAPRD = BIT(9), |
| 207 | ATH9K_HW_CAP_PAPRD = BIT(11), | 207 | ATH9K_HW_CAP_ANT_DIV_COMB = BIT(10), |
| 208 | ATH9K_HW_CAP_ANT_DIV_COMB = BIT(12), | 208 | ATH9K_HW_CAP_2GHZ = BIT(11), |
| 209 | ATH9K_HW_CAP_2GHZ = BIT(13), | 209 | ATH9K_HW_CAP_5GHZ = BIT(12), |
| 210 | ATH9K_HW_CAP_5GHZ = BIT(14), | 210 | ATH9K_HW_CAP_APM = BIT(13), |
| 211 | ATH9K_HW_CAP_APM = BIT(15), | 211 | ATH9K_HW_CAP_RTT = BIT(14), |
| 212 | ATH9K_HW_CAP_RTT = BIT(16), | 212 | ATH9K_HW_CAP_MCI = BIT(15), |
| 213 | ATH9K_HW_CAP_MCI = BIT(17), | 213 | ATH9K_HW_CAP_DFS = BIT(16), |
| 214 | ATH9K_HW_CAP_DFS = BIT(18), | ||
| 215 | }; | 214 | }; |
| 216 | 215 | ||
| 217 | struct ath9k_hw_capabilities { | 216 | struct ath9k_hw_capabilities { |