diff options
author | Nick Kossifidis <mickflemm@gmail.com> | 2010-11-23 13:36:45 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-11-30 13:52:29 -0500 |
commit | 9320b5c4a7260d9593102f378201d17e3f030739 (patch) | |
tree | d4a85a6286b47f86a66a82ad3e756f5117af2b39 /drivers/net/wireless/ath/ath5k/eeprom.c | |
parent | ea066d5a91f2610116dcd27054f749e4f07799d8 (diff) |
ath5k: Reset cleanup and generic cleanup
* No functional changes
* Clean up reset:
Introduce init functions for each unit and call them instead
of having everything inside ath5k_hw_reset (it's just c/p for
now so nothing changes except calling order -I tested it with
various cards and it's ok-)
* Further cleanups:
ofdm_timings belongs to phy.c
rate_duration belongs to pcu.c
clock functions are general and belong to reset.c (more to follow)
* Reorder functions for better organization:
We start with helpers and other functions follow in categories,
init functions are last
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/eeprom.c')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/eeprom.c | 147 |
1 files changed, 82 insertions, 65 deletions
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c index 39722dd73e43..033eab9ad4e7 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.c +++ b/drivers/net/wireless/ath/ath5k/eeprom.c | |||
@@ -28,6 +28,43 @@ | |||
28 | #include "debug.h" | 28 | #include "debug.h" |
29 | #include "base.h" | 29 | #include "base.h" |
30 | 30 | ||
31 | |||
32 | /******************\ | ||
33 | * Helper functions * | ||
34 | \******************/ | ||
35 | |||
36 | /* | ||
37 | * Translate binary channel representation in EEPROM to frequency | ||
38 | */ | ||
39 | static u16 ath5k_eeprom_bin2freq(struct ath5k_eeprom_info *ee, u16 bin, | ||
40 | unsigned int mode) | ||
41 | { | ||
42 | u16 val; | ||
43 | |||
44 | if (bin == AR5K_EEPROM_CHANNEL_DIS) | ||
45 | return bin; | ||
46 | |||
47 | if (mode == AR5K_EEPROM_MODE_11A) { | ||
48 | if (ee->ee_version > AR5K_EEPROM_VERSION_3_2) | ||
49 | val = (5 * bin) + 4800; | ||
50 | else | ||
51 | val = bin > 62 ? (10 * 62) + (5 * (bin - 62)) + 5100 : | ||
52 | (bin * 10) + 5100; | ||
53 | } else { | ||
54 | if (ee->ee_version > AR5K_EEPROM_VERSION_3_2) | ||
55 | val = bin + 2300; | ||
56 | else | ||
57 | val = bin + 2400; | ||
58 | } | ||
59 | |||
60 | return val; | ||
61 | } | ||
62 | |||
63 | |||
64 | /*********\ | ||
65 | * Parsers * | ||
66 | \*********/ | ||
67 | |||
31 | /* | 68 | /* |
32 | * Read from eeprom | 69 | * Read from eeprom |
33 | */ | 70 | */ |
@@ -63,33 +100,6 @@ static int ath5k_hw_eeprom_read(struct ath5k_hw *ah, u32 offset, u16 *data) | |||
63 | } | 100 | } |
64 | 101 | ||
65 | /* | 102 | /* |
66 | * Translate binary channel representation in EEPROM to frequency | ||
67 | */ | ||
68 | static u16 ath5k_eeprom_bin2freq(struct ath5k_eeprom_info *ee, u16 bin, | ||
69 | unsigned int mode) | ||
70 | { | ||
71 | u16 val; | ||
72 | |||
73 | if (bin == AR5K_EEPROM_CHANNEL_DIS) | ||
74 | return bin; | ||
75 | |||
76 | if (mode == AR5K_EEPROM_MODE_11A) { | ||
77 | if (ee->ee_version > AR5K_EEPROM_VERSION_3_2) | ||
78 | val = (5 * bin) + 4800; | ||
79 | else | ||
80 | val = bin > 62 ? (10 * 62) + (5 * (bin - 62)) + 5100 : | ||
81 | (bin * 10) + 5100; | ||
82 | } else { | ||
83 | if (ee->ee_version > AR5K_EEPROM_VERSION_3_2) | ||
84 | val = bin + 2300; | ||
85 | else | ||
86 | val = bin + 2400; | ||
87 | } | ||
88 | |||
89 | return val; | ||
90 | } | ||
91 | |||
92 | /* | ||
93 | * Initialize eeprom & capabilities structs | 103 | * Initialize eeprom & capabilities structs |
94 | */ | 104 | */ |
95 | static int | 105 | static int |
@@ -647,6 +657,7 @@ ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset) | |||
647 | return 0; | 657 | return 0; |
648 | } | 658 | } |
649 | 659 | ||
660 | |||
650 | /* | 661 | /* |
651 | * Read power calibration for RF5111 chips | 662 | * Read power calibration for RF5111 chips |
652 | * | 663 | * |
@@ -1514,6 +1525,7 @@ ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned int mode) | |||
1514 | return 0; | 1525 | return 0; |
1515 | } | 1526 | } |
1516 | 1527 | ||
1528 | |||
1517 | /* | 1529 | /* |
1518 | * Read per channel calibration info from EEPROM | 1530 | * Read per channel calibration info from EEPROM |
1519 | * | 1531 | * |
@@ -1607,15 +1619,6 @@ ath5k_eeprom_free_pcal_info(struct ath5k_hw *ah, int mode) | |||
1607 | return 0; | 1619 | return 0; |
1608 | } | 1620 | } |
1609 | 1621 | ||
1610 | void | ||
1611 | ath5k_eeprom_detach(struct ath5k_hw *ah) | ||
1612 | { | ||
1613 | u8 mode; | ||
1614 | |||
1615 | for (mode = AR5K_EEPROM_MODE_11A; mode <= AR5K_EEPROM_MODE_11G; mode++) | ||
1616 | ath5k_eeprom_free_pcal_info(ah, mode); | ||
1617 | } | ||
1618 | |||
1619 | /* Read conformance test limits used for regulatory control */ | 1622 | /* Read conformance test limits used for regulatory control */ |
1620 | static int | 1623 | static int |
1621 | ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah) | 1624 | ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah) |
@@ -1757,6 +1760,44 @@ ath5k_eeprom_read_spur_chans(struct ath5k_hw *ah) | |||
1757 | } | 1760 | } |
1758 | 1761 | ||
1759 | /* | 1762 | /* |
1763 | * Read the MAC address from eeprom | ||
1764 | */ | ||
1765 | int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) | ||
1766 | { | ||
1767 | u8 mac_d[ETH_ALEN] = {}; | ||
1768 | u32 total, offset; | ||
1769 | u16 data; | ||
1770 | int octet, ret; | ||
1771 | |||
1772 | ret = ath5k_hw_eeprom_read(ah, 0x20, &data); | ||
1773 | if (ret) | ||
1774 | return ret; | ||
1775 | |||
1776 | for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) { | ||
1777 | ret = ath5k_hw_eeprom_read(ah, offset, &data); | ||
1778 | if (ret) | ||
1779 | return ret; | ||
1780 | |||
1781 | total += data; | ||
1782 | mac_d[octet + 1] = data & 0xff; | ||
1783 | mac_d[octet] = data >> 8; | ||
1784 | octet += 2; | ||
1785 | } | ||
1786 | |||
1787 | if (!total || total == 3 * 0xffff) | ||
1788 | return -EINVAL; | ||
1789 | |||
1790 | memcpy(mac, mac_d, ETH_ALEN); | ||
1791 | |||
1792 | return 0; | ||
1793 | } | ||
1794 | |||
1795 | |||
1796 | /***********************\ | ||
1797 | * Init/Detach functions * | ||
1798 | \***********************/ | ||
1799 | |||
1800 | /* | ||
1760 | * Initialize eeprom data structure | 1801 | * Initialize eeprom data structure |
1761 | */ | 1802 | */ |
1762 | int | 1803 | int |
@@ -1787,35 +1828,11 @@ ath5k_eeprom_init(struct ath5k_hw *ah) | |||
1787 | return 0; | 1828 | return 0; |
1788 | } | 1829 | } |
1789 | 1830 | ||
1790 | /* | 1831 | void |
1791 | * Read the MAC address from eeprom | 1832 | ath5k_eeprom_detach(struct ath5k_hw *ah) |
1792 | */ | ||
1793 | int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) | ||
1794 | { | 1833 | { |
1795 | u8 mac_d[ETH_ALEN] = {}; | 1834 | u8 mode; |
1796 | u32 total, offset; | ||
1797 | u16 data; | ||
1798 | int octet, ret; | ||
1799 | |||
1800 | ret = ath5k_hw_eeprom_read(ah, 0x20, &data); | ||
1801 | if (ret) | ||
1802 | return ret; | ||
1803 | |||
1804 | for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) { | ||
1805 | ret = ath5k_hw_eeprom_read(ah, offset, &data); | ||
1806 | if (ret) | ||
1807 | return ret; | ||
1808 | |||
1809 | total += data; | ||
1810 | mac_d[octet + 1] = data & 0xff; | ||
1811 | mac_d[octet] = data >> 8; | ||
1812 | octet += 2; | ||
1813 | } | ||
1814 | |||
1815 | if (!total || total == 3 * 0xffff) | ||
1816 | return -EINVAL; | ||
1817 | |||
1818 | memcpy(mac, mac_d, ETH_ALEN); | ||
1819 | 1835 | ||
1820 | return 0; | 1836 | for (mode = AR5K_EEPROM_MODE_11A; mode <= AR5K_EEPROM_MODE_11G; mode++) |
1837 | ath5k_eeprom_free_pcal_info(ah, mode); | ||
1821 | } | 1838 | } |