diff options
author | Nick Kossifidis <mickflemm@gmail.com> | 2011-11-25 13:40:25 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-11-28 14:44:16 -0500 |
commit | c47faa364cfb249d5d7670fb7293a6f9acd8aa9e (patch) | |
tree | 6b81c368508e94966efec2ddcc412c6b2154a97e /drivers/net/wireless/ath/ath5k/desc.c | |
parent | 1846ac3dbec0894095520b2756b68c4fd81e3fbb (diff) |
ath5k: Cleanups v2 + add kerneldoc on all hw functions
No functional changes
Add kernel doc for all ath5k_hw_* functions and strcucts. Also do some cleanup,
rename ath5k_hw_init_beacon to ath5k_hw_init_beacon_timers, remove an unused
variable from ath5k_hw_pcu_init and a few obsolete macros, mostly related to XR.
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/desc.c')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/desc.c | 217 |
1 files changed, 170 insertions, 47 deletions
diff --git a/drivers/net/wireless/ath/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c index 7e88dda82221..f8bfa3ac2af0 100644 --- a/drivers/net/wireless/ath/ath5k/desc.c +++ b/drivers/net/wireless/ath/ath5k/desc.c | |||
@@ -26,20 +26,61 @@ | |||
26 | #include "debug.h" | 26 | #include "debug.h" |
27 | 27 | ||
28 | 28 | ||
29 | /** | ||
30 | * DOC: Hardware descriptor functions | ||
31 | * | ||
32 | * Here we handle the processing of the low-level hw descriptors | ||
33 | * that hw reads and writes via DMA for each TX and RX attempt (that means | ||
34 | * we can also have descriptors for failed TX/RX tries). We have two kind of | ||
35 | * descriptors for RX and TX, control descriptors tell the hw how to send or | ||
36 | * receive a packet where to read/write it from/to etc and status descriptors | ||
37 | * that contain information about how the packet was sent or received (errors | ||
38 | * included). | ||
39 | * | ||
40 | * Descriptor format is not exactly the same for each MAC chip version so we | ||
41 | * have function pointers on &struct ath5k_hw we initialize at runtime based on | ||
42 | * the chip used. | ||
43 | */ | ||
44 | |||
45 | |||
29 | /************************\ | 46 | /************************\ |
30 | * TX Control descriptors * | 47 | * TX Control descriptors * |
31 | \************************/ | 48 | \************************/ |
32 | 49 | ||
33 | /* | 50 | /** |
34 | * Initialize the 2-word tx control descriptor on 5210/5211 | 51 | * ath5k_hw_setup_2word_tx_desc() - Initialize a 2-word tx control descriptor |
52 | * @ah: The &struct ath5k_hw | ||
53 | * @desc: The &struct ath5k_desc | ||
54 | * @pkt_len: Frame length in bytes | ||
55 | * @hdr_len: Header length in bytes (only used on AR5210) | ||
56 | * @padsize: Any padding we've added to the frame length | ||
57 | * @type: One of enum ath5k_pkt_type | ||
58 | * @tx_power: Tx power in 0.5dB steps | ||
59 | * @tx_rate0: HW idx for transmission rate | ||
60 | * @tx_tries0: Max number of retransmissions | ||
61 | * @key_index: Index on key table to use for encryption | ||
62 | * @antenna_mode: Which antenna to use (0 for auto) | ||
63 | * @flags: One of AR5K_TXDESC_* flags (desc.h) | ||
64 | * @rtscts_rate: HW idx for RTS/CTS transmission rate | ||
65 | * @rtscts_duration: What to put on duration field on the header of RTS/CTS | ||
66 | * | ||
67 | * Internal function to initialize a 2-Word TX control descriptor | ||
68 | * found on AR5210 and AR5211 MACs chips. | ||
69 | * | ||
70 | * Returns 0 on success or -EINVAL on false input | ||
35 | */ | 71 | */ |
36 | static int | 72 | static int |
37 | ath5k_hw_setup_2word_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc, | 73 | ath5k_hw_setup_2word_tx_desc(struct ath5k_hw *ah, |
38 | unsigned int pkt_len, unsigned int hdr_len, int padsize, | 74 | struct ath5k_desc *desc, |
39 | enum ath5k_pkt_type type, | 75 | unsigned int pkt_len, unsigned int hdr_len, |
40 | unsigned int tx_power, unsigned int tx_rate0, unsigned int tx_tries0, | 76 | int padsize, |
41 | unsigned int key_index, unsigned int antenna_mode, unsigned int flags, | 77 | enum ath5k_pkt_type type, |
42 | unsigned int rtscts_rate, unsigned int rtscts_duration) | 78 | unsigned int tx_power, |
79 | unsigned int tx_rate0, unsigned int tx_tries0, | ||
80 | unsigned int key_index, | ||
81 | unsigned int antenna_mode, | ||
82 | unsigned int flags, | ||
83 | unsigned int rtscts_rate, unsigned int rtscts_duration) | ||
43 | { | 84 | { |
44 | u32 frame_type; | 85 | u32 frame_type; |
45 | struct ath5k_hw_2w_tx_ctl *tx_ctl; | 86 | struct ath5k_hw_2w_tx_ctl *tx_ctl; |
@@ -172,17 +213,40 @@ ath5k_hw_setup_2word_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc, | |||
172 | return 0; | 213 | return 0; |
173 | } | 214 | } |
174 | 215 | ||
175 | /* | 216 | /** |
176 | * Initialize the 4-word tx control descriptor on 5212 | 217 | * ath5k_hw_setup_4word_tx_desc() - Initialize a 4-word tx control descriptor |
218 | * @ah: The &struct ath5k_hw | ||
219 | * @desc: The &struct ath5k_desc | ||
220 | * @pkt_len: Frame length in bytes | ||
221 | * @hdr_len: Header length in bytes (only used on AR5210) | ||
222 | * @padsize: Any padding we've added to the frame length | ||
223 | * @type: One of enum ath5k_pkt_type | ||
224 | * @tx_power: Tx power in 0.5dB steps | ||
225 | * @tx_rate0: HW idx for transmission rate | ||
226 | * @tx_tries0: Max number of retransmissions | ||
227 | * @key_index: Index on key table to use for encryption | ||
228 | * @antenna_mode: Which antenna to use (0 for auto) | ||
229 | * @flags: One of AR5K_TXDESC_* flags (desc.h) | ||
230 | * @rtscts_rate: HW idx for RTS/CTS transmission rate | ||
231 | * @rtscts_duration: What to put on duration field on the header of RTS/CTS | ||
232 | * | ||
233 | * Internal function to initialize a 4-Word TX control descriptor | ||
234 | * found on AR5212 and later MACs chips. | ||
235 | * | ||
236 | * Returns 0 on success or -EINVAL on false input | ||
177 | */ | 237 | */ |
178 | static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | 238 | static int |
179 | struct ath5k_desc *desc, unsigned int pkt_len, unsigned int hdr_len, | 239 | ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, |
180 | int padsize, | 240 | struct ath5k_desc *desc, |
181 | enum ath5k_pkt_type type, unsigned int tx_power, unsigned int tx_rate0, | 241 | unsigned int pkt_len, unsigned int hdr_len, |
182 | unsigned int tx_tries0, unsigned int key_index, | 242 | int padsize, |
183 | unsigned int antenna_mode, unsigned int flags, | 243 | enum ath5k_pkt_type type, |
184 | unsigned int rtscts_rate, | 244 | unsigned int tx_power, |
185 | unsigned int rtscts_duration) | 245 | unsigned int tx_rate0, unsigned int tx_tries0, |
246 | unsigned int key_index, | ||
247 | unsigned int antenna_mode, | ||
248 | unsigned int flags, | ||
249 | unsigned int rtscts_rate, unsigned int rtscts_duration) | ||
186 | { | 250 | { |
187 | struct ath5k_hw_4w_tx_ctl *tx_ctl; | 251 | struct ath5k_hw_4w_tx_ctl *tx_ctl; |
188 | unsigned int frame_len; | 252 | unsigned int frame_len; |
@@ -292,13 +356,29 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | |||
292 | return 0; | 356 | return 0; |
293 | } | 357 | } |
294 | 358 | ||
295 | /* | 359 | /** |
296 | * Initialize a 4-word multi rate retry tx control descriptor on 5212 | 360 | * ath5k_hw_setup_mrr_tx_desc() - Initialize an MRR tx control descriptor |
361 | * @ah: The &struct ath5k_hw | ||
362 | * @desc: The &struct ath5k_desc | ||
363 | * @tx_rate1: HW idx for rate used on transmission series 1 | ||
364 | * @tx_tries1: Max number of retransmissions for transmission series 1 | ||
365 | * @tx_rate2: HW idx for rate used on transmission series 2 | ||
366 | * @tx_tries2: Max number of retransmissions for transmission series 2 | ||
367 | * @tx_rate3: HW idx for rate used on transmission series 3 | ||
368 | * @tx_tries3: Max number of retransmissions for transmission series 3 | ||
369 | * | ||
370 | * Multi rate retry (MRR) tx control descriptors are available only on AR5212 | ||
371 | * MACs, they are part of the normal 4-word tx control descriptor (see above) | ||
372 | * but we handle them through a separate function for better abstraction. | ||
373 | * | ||
374 | * Returns 0 on success or -EINVAL on invalid input | ||
297 | */ | 375 | */ |
298 | int | 376 | int |
299 | ath5k_hw_setup_mrr_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc, | 377 | ath5k_hw_setup_mrr_tx_desc(struct ath5k_hw *ah, |
300 | unsigned int tx_rate1, u_int tx_tries1, u_int tx_rate2, | 378 | struct ath5k_desc *desc, |
301 | u_int tx_tries2, unsigned int tx_rate3, u_int tx_tries3) | 379 | u_int tx_rate1, u_int tx_tries1, |
380 | u_int tx_rate2, u_int tx_tries2, | ||
381 | u_int tx_rate3, u_int tx_tries3) | ||
302 | { | 382 | { |
303 | struct ath5k_hw_4w_tx_ctl *tx_ctl; | 383 | struct ath5k_hw_4w_tx_ctl *tx_ctl; |
304 | 384 | ||
@@ -350,11 +430,16 @@ ath5k_hw_setup_mrr_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc, | |||
350 | * TX Status descriptors * | 430 | * TX Status descriptors * |
351 | \***********************/ | 431 | \***********************/ |
352 | 432 | ||
353 | /* | 433 | /** |
354 | * Process the tx status descriptor on 5210/5211 | 434 | * ath5k_hw_proc_2word_tx_status() - Process a tx status descriptor on 5210/1 |
435 | * @ah: The &struct ath5k_hw | ||
436 | * @desc: The &struct ath5k_desc | ||
437 | * @ts: The &struct ath5k_tx_status | ||
355 | */ | 438 | */ |
356 | static int ath5k_hw_proc_2word_tx_status(struct ath5k_hw *ah, | 439 | static int |
357 | struct ath5k_desc *desc, struct ath5k_tx_status *ts) | 440 | ath5k_hw_proc_2word_tx_status(struct ath5k_hw *ah, |
441 | struct ath5k_desc *desc, | ||
442 | struct ath5k_tx_status *ts) | ||
358 | { | 443 | { |
359 | struct ath5k_hw_2w_tx_ctl *tx_ctl; | 444 | struct ath5k_hw_2w_tx_ctl *tx_ctl; |
360 | struct ath5k_hw_tx_status *tx_status; | 445 | struct ath5k_hw_tx_status *tx_status; |
@@ -399,11 +484,16 @@ static int ath5k_hw_proc_2word_tx_status(struct ath5k_hw *ah, | |||
399 | return 0; | 484 | return 0; |
400 | } | 485 | } |
401 | 486 | ||
402 | /* | 487 | /** |
403 | * Process a tx status descriptor on 5212 | 488 | * ath5k_hw_proc_4word_tx_status() - Process a tx status descriptor on 5212 |
489 | * @ah: The &struct ath5k_hw | ||
490 | * @desc: The &struct ath5k_desc | ||
491 | * @ts: The &struct ath5k_tx_status | ||
404 | */ | 492 | */ |
405 | static int ath5k_hw_proc_4word_tx_status(struct ath5k_hw *ah, | 493 | static int |
406 | struct ath5k_desc *desc, struct ath5k_tx_status *ts) | 494 | ath5k_hw_proc_4word_tx_status(struct ath5k_hw *ah, |
495 | struct ath5k_desc *desc, | ||
496 | struct ath5k_tx_status *ts) | ||
407 | { | 497 | { |
408 | struct ath5k_hw_4w_tx_ctl *tx_ctl; | 498 | struct ath5k_hw_4w_tx_ctl *tx_ctl; |
409 | struct ath5k_hw_tx_status *tx_status; | 499 | struct ath5k_hw_tx_status *tx_status; |
@@ -460,11 +550,17 @@ static int ath5k_hw_proc_4word_tx_status(struct ath5k_hw *ah, | |||
460 | * RX Descriptors * | 550 | * RX Descriptors * |
461 | \****************/ | 551 | \****************/ |
462 | 552 | ||
463 | /* | 553 | /** |
464 | * Initialize an rx control descriptor | 554 | * ath5k_hw_setup_rx_desc() - Initialize an rx control descriptor |
555 | * @ah: The &struct ath5k_hw | ||
556 | * @desc: The &struct ath5k_desc | ||
557 | * @size: RX buffer length in bytes | ||
558 | * @flags: One of AR5K_RXDESC_* flags | ||
465 | */ | 559 | */ |
466 | int ath5k_hw_setup_rx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc, | 560 | int |
467 | u32 size, unsigned int flags) | 561 | ath5k_hw_setup_rx_desc(struct ath5k_hw *ah, |
562 | struct ath5k_desc *desc, | ||
563 | u32 size, unsigned int flags) | ||
468 | { | 564 | { |
469 | struct ath5k_hw_rx_ctl *rx_ctl; | 565 | struct ath5k_hw_rx_ctl *rx_ctl; |
470 | 566 | ||
@@ -491,11 +587,22 @@ int ath5k_hw_setup_rx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc, | |||
491 | return 0; | 587 | return 0; |
492 | } | 588 | } |
493 | 589 | ||
494 | /* | 590 | /** |
495 | * Process the rx status descriptor on 5210/5211 | 591 | * ath5k_hw_proc_5210_rx_status() - Process the rx status descriptor on 5210/1 |
592 | * @ah: The &struct ath5k_hw | ||
593 | * @desc: The &struct ath5k_desc | ||
594 | * @rs: The &struct ath5k_rx_status | ||
595 | * | ||
596 | * Internal function used to process an RX status descriptor | ||
597 | * on AR5210/5211 MAC. | ||
598 | * | ||
599 | * Returns 0 on success or -EINPROGRESS in case we haven't received the who;e | ||
600 | * frame yet. | ||
496 | */ | 601 | */ |
497 | static int ath5k_hw_proc_5210_rx_status(struct ath5k_hw *ah, | 602 | static int |
498 | struct ath5k_desc *desc, struct ath5k_rx_status *rs) | 603 | ath5k_hw_proc_5210_rx_status(struct ath5k_hw *ah, |
604 | struct ath5k_desc *desc, | ||
605 | struct ath5k_rx_status *rs) | ||
499 | { | 606 | { |
500 | struct ath5k_hw_rx_status *rx_status; | 607 | struct ath5k_hw_rx_status *rx_status; |
501 | 608 | ||
@@ -574,12 +681,22 @@ static int ath5k_hw_proc_5210_rx_status(struct ath5k_hw *ah, | |||
574 | return 0; | 681 | return 0; |
575 | } | 682 | } |
576 | 683 | ||
577 | /* | 684 | /** |
578 | * Process the rx status descriptor on 5212 | 685 | * ath5k_hw_proc_5212_rx_status() - Process the rx status descriptor on 5212 |
686 | * @ah: The &struct ath5k_hw | ||
687 | * @desc: The &struct ath5k_desc | ||
688 | * @rs: The &struct ath5k_rx_status | ||
689 | * | ||
690 | * Internal function used to process an RX status descriptor | ||
691 | * on AR5212 and later MAC. | ||
692 | * | ||
693 | * Returns 0 on success or -EINPROGRESS in case we haven't received the who;e | ||
694 | * frame yet. | ||
579 | */ | 695 | */ |
580 | static int ath5k_hw_proc_5212_rx_status(struct ath5k_hw *ah, | 696 | static int |
581 | struct ath5k_desc *desc, | 697 | ath5k_hw_proc_5212_rx_status(struct ath5k_hw *ah, |
582 | struct ath5k_rx_status *rs) | 698 | struct ath5k_desc *desc, |
699 | struct ath5k_rx_status *rs) | ||
583 | { | 700 | { |
584 | struct ath5k_hw_rx_status *rx_status; | 701 | struct ath5k_hw_rx_status *rx_status; |
585 | u32 rxstat0, rxstat1; | 702 | u32 rxstat0, rxstat1; |
@@ -646,10 +763,16 @@ static int ath5k_hw_proc_5212_rx_status(struct ath5k_hw *ah, | |||
646 | * Attach * | 763 | * Attach * |
647 | \********/ | 764 | \********/ |
648 | 765 | ||
649 | /* | 766 | /** |
650 | * Init function pointers inside ath5k_hw struct | 767 | * ath5k_hw_init_desc_functions() - Init function pointers inside ah |
768 | * @ah: The &struct ath5k_hw | ||
769 | * | ||
770 | * Maps the internal descriptor functions to the function pointers on ah, used | ||
771 | * from above. This is used as an abstraction layer to handle the various chips | ||
772 | * the same way. | ||
651 | */ | 773 | */ |
652 | int ath5k_hw_init_desc_functions(struct ath5k_hw *ah) | 774 | int |
775 | ath5k_hw_init_desc_functions(struct ath5k_hw *ah) | ||
653 | { | 776 | { |
654 | if (ah->ah_version == AR5K_AR5212) { | 777 | if (ah->ah_version == AR5K_AR5212) { |
655 | ah->ah_setup_tx_desc = ath5k_hw_setup_4word_tx_desc; | 778 | ah->ah_setup_tx_desc = ath5k_hw_setup_4word_tx_desc; |