diff options
author | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-30 21:57:33 -0400 |
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committer | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-31 10:26:23 -0400 |
commit | 25985edcedea6396277003854657b5f3cb31a628 (patch) | |
tree | f026e810210a2ee7290caeb737c23cb6472b7c38 /drivers/net/wan/ixp4xx_hss.c | |
parent | 6aba74f2791287ec407e0f92487a725a25908067 (diff) |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'drivers/net/wan/ixp4xx_hss.c')
-rw-r--r-- | drivers/net/wan/ixp4xx_hss.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wan/ixp4xx_hss.c b/drivers/net/wan/ixp4xx_hss.c index 6c571e198835..f1e1643dc3eb 100644 --- a/drivers/net/wan/ixp4xx_hss.c +++ b/drivers/net/wan/ixp4xx_hss.c | |||
@@ -178,7 +178,7 @@ | |||
178 | * | 178 | * |
179 | * The resulting average clock frequency (assuming 33.333 MHz oscillator) is: | 179 | * The resulting average clock frequency (assuming 33.333 MHz oscillator) is: |
180 | * freq = 66.666 MHz / (A + (B + 1) / (C + 1)) | 180 | * freq = 66.666 MHz / (A + (B + 1) / (C + 1)) |
181 | * minumum freq = 66.666 MHz / (A + 1) | 181 | * minimum freq = 66.666 MHz / (A + 1) |
182 | * maximum freq = 66.666 MHz / A | 182 | * maximum freq = 66.666 MHz / A |
183 | * | 183 | * |
184 | * Example: A = 2, B = 2, C = 7, CLOCK_CR register = 2 << 22 | 2 << 12 | 7 | 184 | * Example: A = 2, B = 2, C = 7, CLOCK_CR register = 2 << 22 | 2 << 12 | 7 |
@@ -230,7 +230,7 @@ | |||
230 | #define PKT_PIPE_MODE_WRITE 0x57 | 230 | #define PKT_PIPE_MODE_WRITE 0x57 |
231 | 231 | ||
232 | /* HDLC packet status values - desc->status */ | 232 | /* HDLC packet status values - desc->status */ |
233 | #define ERR_SHUTDOWN 1 /* stop or shutdown occurrance */ | 233 | #define ERR_SHUTDOWN 1 /* stop or shutdown occurrence */ |
234 | #define ERR_HDLC_ALIGN 2 /* HDLC alignment error */ | 234 | #define ERR_HDLC_ALIGN 2 /* HDLC alignment error */ |
235 | #define ERR_HDLC_FCS 3 /* HDLC Frame Check Sum error */ | 235 | #define ERR_HDLC_FCS 3 /* HDLC Frame Check Sum error */ |
236 | #define ERR_RXFREE_Q_EMPTY 4 /* RX-free queue became empty while receiving | 236 | #define ERR_RXFREE_Q_EMPTY 4 /* RX-free queue became empty while receiving |