diff options
author | Ben Hutchings <bhutchings@solarflare.com> | 2010-06-23 07:30:07 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-06-25 01:13:22 -0400 |
commit | 62776d034cc40c49bafdb3551a6ba35f78e3f08d (patch) | |
tree | 1cd2132940ced266ad53619a0c947e153cc83a5e /drivers/net/sfc/falcon.c | |
parent | 0c605a2061670412d3b5580c92f1e161b1a693d2 (diff) |
sfc: Implement message level control
Replace EFX_ERR() with netif_err(), EFX_INFO() with netif_info(),
EFX_LOG() with netif_dbg() and EFX_TRACE() and EFX_REGDUMP() with
netif_vdbg().
Replace EFX_ERR_RL(), EFX_INFO_RL() and EFX_LOG_RL() using explicit
calls to net_ratelimit().
Implement the ethtool operations to get and set message level flags,
and add a 'debug' module parameter for the initial value.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon.c')
-rw-r--r-- | drivers/net/sfc/falcon.c | 176 |
1 files changed, 107 insertions, 69 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index 8558865ff380..92d38ede6bef 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c | |||
@@ -167,13 +167,15 @@ irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id) | |||
167 | * exit without having touched the hardware. | 167 | * exit without having touched the hardware. |
168 | */ | 168 | */ |
169 | if (unlikely(EFX_OWORD_IS_ZERO(*int_ker))) { | 169 | if (unlikely(EFX_OWORD_IS_ZERO(*int_ker))) { |
170 | EFX_TRACE(efx, "IRQ %d on CPU %d not for me\n", irq, | 170 | netif_vdbg(efx, intr, efx->net_dev, |
171 | raw_smp_processor_id()); | 171 | "IRQ %d on CPU %d not for me\n", irq, |
172 | raw_smp_processor_id()); | ||
172 | return IRQ_NONE; | 173 | return IRQ_NONE; |
173 | } | 174 | } |
174 | efx->last_irq_cpu = raw_smp_processor_id(); | 175 | efx->last_irq_cpu = raw_smp_processor_id(); |
175 | EFX_TRACE(efx, "IRQ %d on CPU %d status " EFX_OWORD_FMT "\n", | 176 | netif_vdbg(efx, intr, efx->net_dev, |
176 | irq, raw_smp_processor_id(), EFX_OWORD_VAL(*int_ker)); | 177 | "IRQ %d on CPU %d status " EFX_OWORD_FMT "\n", |
178 | irq, raw_smp_processor_id(), EFX_OWORD_VAL(*int_ker)); | ||
177 | 179 | ||
178 | /* Determine interrupting queues, clear interrupt status | 180 | /* Determine interrupting queues, clear interrupt status |
179 | * register and acknowledge the device interrupt. | 181 | * register and acknowledge the device interrupt. |
@@ -239,7 +241,8 @@ static int falcon_spi_wait(struct efx_nic *efx) | |||
239 | if (!falcon_spi_poll(efx)) | 241 | if (!falcon_spi_poll(efx)) |
240 | return 0; | 242 | return 0; |
241 | if (time_after_eq(jiffies, timeout)) { | 243 | if (time_after_eq(jiffies, timeout)) { |
242 | EFX_ERR(efx, "timed out waiting for SPI\n"); | 244 | netif_err(efx, hw, efx->net_dev, |
245 | "timed out waiting for SPI\n"); | ||
243 | return -ETIMEDOUT; | 246 | return -ETIMEDOUT; |
244 | } | 247 | } |
245 | schedule_timeout_uninterruptible(1); | 248 | schedule_timeout_uninterruptible(1); |
@@ -333,9 +336,10 @@ falcon_spi_wait_write(struct efx_nic *efx, const struct efx_spi_device *spi) | |||
333 | if (!(status & SPI_STATUS_NRDY)) | 336 | if (!(status & SPI_STATUS_NRDY)) |
334 | return 0; | 337 | return 0; |
335 | if (time_after_eq(jiffies, timeout)) { | 338 | if (time_after_eq(jiffies, timeout)) { |
336 | EFX_ERR(efx, "SPI write timeout on device %d" | 339 | netif_err(efx, hw, efx->net_dev, |
337 | " last status=0x%02x\n", | 340 | "SPI write timeout on device %d" |
338 | spi->device_id, status); | 341 | " last status=0x%02x\n", |
342 | spi->device_id, status); | ||
339 | return -ETIMEDOUT; | 343 | return -ETIMEDOUT; |
340 | } | 344 | } |
341 | schedule_timeout_uninterruptible(1); | 345 | schedule_timeout_uninterruptible(1); |
@@ -469,7 +473,8 @@ static void falcon_reset_macs(struct efx_nic *efx) | |||
469 | udelay(10); | 473 | udelay(10); |
470 | } | 474 | } |
471 | 475 | ||
472 | EFX_ERR(efx, "timed out waiting for XMAC core reset\n"); | 476 | netif_err(efx, hw, efx->net_dev, |
477 | "timed out waiting for XMAC core reset\n"); | ||
473 | } | 478 | } |
474 | } | 479 | } |
475 | 480 | ||
@@ -492,12 +497,13 @@ static void falcon_reset_macs(struct efx_nic *efx) | |||
492 | if (!EFX_OWORD_FIELD(reg, FRF_AB_RST_XGTX) && | 497 | if (!EFX_OWORD_FIELD(reg, FRF_AB_RST_XGTX) && |
493 | !EFX_OWORD_FIELD(reg, FRF_AB_RST_XGRX) && | 498 | !EFX_OWORD_FIELD(reg, FRF_AB_RST_XGRX) && |
494 | !EFX_OWORD_FIELD(reg, FRF_AB_RST_EM)) { | 499 | !EFX_OWORD_FIELD(reg, FRF_AB_RST_EM)) { |
495 | EFX_LOG(efx, "Completed MAC reset after %d loops\n", | 500 | netif_dbg(efx, hw, efx->net_dev, |
496 | count); | 501 | "Completed MAC reset after %d loops\n", |
502 | count); | ||
497 | break; | 503 | break; |
498 | } | 504 | } |
499 | if (count > 20) { | 505 | if (count > 20) { |
500 | EFX_ERR(efx, "MAC reset failed\n"); | 506 | netif_err(efx, hw, efx->net_dev, "MAC reset failed\n"); |
501 | break; | 507 | break; |
502 | } | 508 | } |
503 | count++; | 509 | count++; |
@@ -627,7 +633,8 @@ static void falcon_stats_complete(struct efx_nic *efx) | |||
627 | rmb(); /* read the done flag before the stats */ | 633 | rmb(); /* read the done flag before the stats */ |
628 | efx->mac_op->update_stats(efx); | 634 | efx->mac_op->update_stats(efx); |
629 | } else { | 635 | } else { |
630 | EFX_ERR(efx, "timed out waiting for statistics\n"); | 636 | netif_err(efx, hw, efx->net_dev, |
637 | "timed out waiting for statistics\n"); | ||
631 | } | 638 | } |
632 | } | 639 | } |
633 | 640 | ||
@@ -717,16 +724,17 @@ static int falcon_gmii_wait(struct efx_nic *efx) | |||
717 | if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSY) == 0) { | 724 | if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSY) == 0) { |
718 | if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_LNFL) != 0 || | 725 | if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_LNFL) != 0 || |
719 | EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSERR) != 0) { | 726 | EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSERR) != 0) { |
720 | EFX_ERR(efx, "error from GMII access " | 727 | netif_err(efx, hw, efx->net_dev, |
721 | EFX_OWORD_FMT"\n", | 728 | "error from GMII access " |
722 | EFX_OWORD_VAL(md_stat)); | 729 | EFX_OWORD_FMT"\n", |
730 | EFX_OWORD_VAL(md_stat)); | ||
723 | return -EIO; | 731 | return -EIO; |
724 | } | 732 | } |
725 | return 0; | 733 | return 0; |
726 | } | 734 | } |
727 | udelay(10); | 735 | udelay(10); |
728 | } | 736 | } |
729 | EFX_ERR(efx, "timed out waiting for GMII\n"); | 737 | netif_err(efx, hw, efx->net_dev, "timed out waiting for GMII\n"); |
730 | return -ETIMEDOUT; | 738 | return -ETIMEDOUT; |
731 | } | 739 | } |
732 | 740 | ||
@@ -738,7 +746,8 @@ static int falcon_mdio_write(struct net_device *net_dev, | |||
738 | efx_oword_t reg; | 746 | efx_oword_t reg; |
739 | int rc; | 747 | int rc; |
740 | 748 | ||
741 | EFX_REGDUMP(efx, "writing MDIO %d register %d.%d with 0x%04x\n", | 749 | netif_vdbg(efx, hw, efx->net_dev, |
750 | "writing MDIO %d register %d.%d with 0x%04x\n", | ||
742 | prtad, devad, addr, value); | 751 | prtad, devad, addr, value); |
743 | 752 | ||
744 | mutex_lock(&efx->mdio_lock); | 753 | mutex_lock(&efx->mdio_lock); |
@@ -812,8 +821,9 @@ static int falcon_mdio_read(struct net_device *net_dev, | |||
812 | if (rc == 0) { | 821 | if (rc == 0) { |
813 | efx_reado(efx, ®, FR_AB_MD_RXD); | 822 | efx_reado(efx, ®, FR_AB_MD_RXD); |
814 | rc = EFX_OWORD_FIELD(reg, FRF_AB_MD_RXD); | 823 | rc = EFX_OWORD_FIELD(reg, FRF_AB_MD_RXD); |
815 | EFX_REGDUMP(efx, "read from MDIO %d register %d.%d, got %04x\n", | 824 | netif_vdbg(efx, hw, efx->net_dev, |
816 | prtad, devad, addr, rc); | 825 | "read from MDIO %d register %d.%d, got %04x\n", |
826 | prtad, devad, addr, rc); | ||
817 | } else { | 827 | } else { |
818 | /* Abort the read operation */ | 828 | /* Abort the read operation */ |
819 | EFX_POPULATE_OWORD_2(reg, | 829 | EFX_POPULATE_OWORD_2(reg, |
@@ -821,8 +831,9 @@ static int falcon_mdio_read(struct net_device *net_dev, | |||
821 | FRF_AB_MD_GC, 1); | 831 | FRF_AB_MD_GC, 1); |
822 | efx_writeo(efx, ®, FR_AB_MD_CS); | 832 | efx_writeo(efx, ®, FR_AB_MD_CS); |
823 | 833 | ||
824 | EFX_LOG(efx, "read from MDIO %d register %d.%d, got error %d\n", | 834 | netif_dbg(efx, hw, efx->net_dev, |
825 | prtad, devad, addr, rc); | 835 | "read from MDIO %d register %d.%d, got error %d\n", |
836 | prtad, devad, addr, rc); | ||
826 | } | 837 | } |
827 | 838 | ||
828 | out: | 839 | out: |
@@ -873,7 +884,8 @@ static void falcon_switch_mac(struct efx_nic *efx) | |||
873 | 884 | ||
874 | falcon_clock_mac(efx); | 885 | falcon_clock_mac(efx); |
875 | 886 | ||
876 | EFX_LOG(efx, "selected %cMAC\n", EFX_IS10G(efx) ? 'X' : 'G'); | 887 | netif_dbg(efx, hw, efx->net_dev, "selected %cMAC\n", |
888 | EFX_IS10G(efx) ? 'X' : 'G'); | ||
877 | /* Not all macs support a mac-level link state */ | 889 | /* Not all macs support a mac-level link state */ |
878 | efx->xmac_poll_required = false; | 890 | efx->xmac_poll_required = false; |
879 | falcon_reset_macs(efx); | 891 | falcon_reset_macs(efx); |
@@ -897,8 +909,8 @@ static int falcon_probe_port(struct efx_nic *efx) | |||
897 | efx->phy_op = &falcon_qt202x_phy_ops; | 909 | efx->phy_op = &falcon_qt202x_phy_ops; |
898 | break; | 910 | break; |
899 | default: | 911 | default: |
900 | EFX_ERR(efx, "Unknown PHY type %d\n", | 912 | netif_err(efx, probe, efx->net_dev, "Unknown PHY type %d\n", |
901 | efx->phy_type); | 913 | efx->phy_type); |
902 | return -ENODEV; | 914 | return -ENODEV; |
903 | } | 915 | } |
904 | 916 | ||
@@ -926,10 +938,11 @@ static int falcon_probe_port(struct efx_nic *efx) | |||
926 | FALCON_MAC_STATS_SIZE); | 938 | FALCON_MAC_STATS_SIZE); |
927 | if (rc) | 939 | if (rc) |
928 | return rc; | 940 | return rc; |
929 | EFX_LOG(efx, "stats buffer at %llx (virt %p phys %llx)\n", | 941 | netif_dbg(efx, probe, efx->net_dev, |
930 | (u64)efx->stats_buffer.dma_addr, | 942 | "stats buffer at %llx (virt %p phys %llx)\n", |
931 | efx->stats_buffer.addr, | 943 | (u64)efx->stats_buffer.dma_addr, |
932 | (u64)virt_to_phys(efx->stats_buffer.addr)); | 944 | efx->stats_buffer.addr, |
945 | (u64)virt_to_phys(efx->stats_buffer.addr)); | ||
933 | 946 | ||
934 | return 0; | 947 | return 0; |
935 | } | 948 | } |
@@ -969,8 +982,8 @@ falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) | |||
969 | rc = falcon_spi_read(efx, spi, 0, FALCON_NVCONFIG_END, NULL, region); | 982 | rc = falcon_spi_read(efx, spi, 0, FALCON_NVCONFIG_END, NULL, region); |
970 | mutex_unlock(&efx->spi_lock); | 983 | mutex_unlock(&efx->spi_lock); |
971 | if (rc) { | 984 | if (rc) { |
972 | EFX_ERR(efx, "Failed to read %s\n", | 985 | netif_err(efx, hw, efx->net_dev, "Failed to read %s\n", |
973 | efx->spi_flash ? "flash" : "EEPROM"); | 986 | efx->spi_flash ? "flash" : "EEPROM"); |
974 | rc = -EIO; | 987 | rc = -EIO; |
975 | goto out; | 988 | goto out; |
976 | } | 989 | } |
@@ -980,11 +993,13 @@ falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) | |||
980 | 993 | ||
981 | rc = -EINVAL; | 994 | rc = -EINVAL; |
982 | if (magic_num != FALCON_NVCONFIG_BOARD_MAGIC_NUM) { | 995 | if (magic_num != FALCON_NVCONFIG_BOARD_MAGIC_NUM) { |
983 | EFX_ERR(efx, "NVRAM bad magic 0x%x\n", magic_num); | 996 | netif_err(efx, hw, efx->net_dev, |
997 | "NVRAM bad magic 0x%x\n", magic_num); | ||
984 | goto out; | 998 | goto out; |
985 | } | 999 | } |
986 | if (struct_ver < 2) { | 1000 | if (struct_ver < 2) { |
987 | EFX_ERR(efx, "NVRAM has ancient version 0x%x\n", struct_ver); | 1001 | netif_err(efx, hw, efx->net_dev, |
1002 | "NVRAM has ancient version 0x%x\n", struct_ver); | ||
988 | goto out; | 1003 | goto out; |
989 | } else if (struct_ver < 4) { | 1004 | } else if (struct_ver < 4) { |
990 | word = &nvconfig->board_magic_num; | 1005 | word = &nvconfig->board_magic_num; |
@@ -997,7 +1012,8 @@ falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) | |||
997 | csum += le16_to_cpu(*word); | 1012 | csum += le16_to_cpu(*word); |
998 | 1013 | ||
999 | if (~csum & 0xffff) { | 1014 | if (~csum & 0xffff) { |
1000 | EFX_ERR(efx, "NVRAM has incorrect checksum\n"); | 1015 | netif_err(efx, hw, efx->net_dev, |
1016 | "NVRAM has incorrect checksum\n"); | ||
1001 | goto out; | 1017 | goto out; |
1002 | } | 1018 | } |
1003 | 1019 | ||
@@ -1075,22 +1091,25 @@ static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method) | |||
1075 | efx_oword_t glb_ctl_reg_ker; | 1091 | efx_oword_t glb_ctl_reg_ker; |
1076 | int rc; | 1092 | int rc; |
1077 | 1093 | ||
1078 | EFX_LOG(efx, "performing %s hardware reset\n", RESET_TYPE(method)); | 1094 | netif_dbg(efx, hw, efx->net_dev, "performing %s hardware reset\n", |
1095 | RESET_TYPE(method)); | ||
1079 | 1096 | ||
1080 | /* Initiate device reset */ | 1097 | /* Initiate device reset */ |
1081 | if (method == RESET_TYPE_WORLD) { | 1098 | if (method == RESET_TYPE_WORLD) { |
1082 | rc = pci_save_state(efx->pci_dev); | 1099 | rc = pci_save_state(efx->pci_dev); |
1083 | if (rc) { | 1100 | if (rc) { |
1084 | EFX_ERR(efx, "failed to backup PCI state of primary " | 1101 | netif_err(efx, drv, efx->net_dev, |
1085 | "function prior to hardware reset\n"); | 1102 | "failed to backup PCI state of primary " |
1103 | "function prior to hardware reset\n"); | ||
1086 | goto fail1; | 1104 | goto fail1; |
1087 | } | 1105 | } |
1088 | if (efx_nic_is_dual_func(efx)) { | 1106 | if (efx_nic_is_dual_func(efx)) { |
1089 | rc = pci_save_state(nic_data->pci_dev2); | 1107 | rc = pci_save_state(nic_data->pci_dev2); |
1090 | if (rc) { | 1108 | if (rc) { |
1091 | EFX_ERR(efx, "failed to backup PCI state of " | 1109 | netif_err(efx, drv, efx->net_dev, |
1092 | "secondary function prior to " | 1110 | "failed to backup PCI state of " |
1093 | "hardware reset\n"); | 1111 | "secondary function prior to " |
1112 | "hardware reset\n"); | ||
1094 | goto fail2; | 1113 | goto fail2; |
1095 | } | 1114 | } |
1096 | } | 1115 | } |
@@ -1115,7 +1134,7 @@ static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method) | |||
1115 | } | 1134 | } |
1116 | efx_writeo(efx, &glb_ctl_reg_ker, FR_AB_GLB_CTL); | 1135 | efx_writeo(efx, &glb_ctl_reg_ker, FR_AB_GLB_CTL); |
1117 | 1136 | ||
1118 | EFX_LOG(efx, "waiting for hardware reset\n"); | 1137 | netif_dbg(efx, hw, efx->net_dev, "waiting for hardware reset\n"); |
1119 | schedule_timeout_uninterruptible(HZ / 20); | 1138 | schedule_timeout_uninterruptible(HZ / 20); |
1120 | 1139 | ||
1121 | /* Restore PCI configuration if needed */ | 1140 | /* Restore PCI configuration if needed */ |
@@ -1123,28 +1142,32 @@ static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method) | |||
1123 | if (efx_nic_is_dual_func(efx)) { | 1142 | if (efx_nic_is_dual_func(efx)) { |
1124 | rc = pci_restore_state(nic_data->pci_dev2); | 1143 | rc = pci_restore_state(nic_data->pci_dev2); |
1125 | if (rc) { | 1144 | if (rc) { |
1126 | EFX_ERR(efx, "failed to restore PCI config for " | 1145 | netif_err(efx, drv, efx->net_dev, |
1127 | "the secondary function\n"); | 1146 | "failed to restore PCI config for " |
1147 | "the secondary function\n"); | ||
1128 | goto fail3; | 1148 | goto fail3; |
1129 | } | 1149 | } |
1130 | } | 1150 | } |
1131 | rc = pci_restore_state(efx->pci_dev); | 1151 | rc = pci_restore_state(efx->pci_dev); |
1132 | if (rc) { | 1152 | if (rc) { |
1133 | EFX_ERR(efx, "failed to restore PCI config for the " | 1153 | netif_err(efx, drv, efx->net_dev, |
1134 | "primary function\n"); | 1154 | "failed to restore PCI config for the " |
1155 | "primary function\n"); | ||
1135 | goto fail4; | 1156 | goto fail4; |
1136 | } | 1157 | } |
1137 | EFX_LOG(efx, "successfully restored PCI config\n"); | 1158 | netif_dbg(efx, drv, efx->net_dev, |
1159 | "successfully restored PCI config\n"); | ||
1138 | } | 1160 | } |
1139 | 1161 | ||
1140 | /* Assert that reset complete */ | 1162 | /* Assert that reset complete */ |
1141 | efx_reado(efx, &glb_ctl_reg_ker, FR_AB_GLB_CTL); | 1163 | efx_reado(efx, &glb_ctl_reg_ker, FR_AB_GLB_CTL); |
1142 | if (EFX_OWORD_FIELD(glb_ctl_reg_ker, FRF_AB_SWRST) != 0) { | 1164 | if (EFX_OWORD_FIELD(glb_ctl_reg_ker, FRF_AB_SWRST) != 0) { |
1143 | rc = -ETIMEDOUT; | 1165 | rc = -ETIMEDOUT; |
1144 | EFX_ERR(efx, "timed out waiting for hardware reset\n"); | 1166 | netif_err(efx, hw, efx->net_dev, |
1167 | "timed out waiting for hardware reset\n"); | ||
1145 | goto fail5; | 1168 | goto fail5; |
1146 | } | 1169 | } |
1147 | EFX_LOG(efx, "hardware reset complete\n"); | 1170 | netif_dbg(efx, hw, efx->net_dev, "hardware reset complete\n"); |
1148 | 1171 | ||
1149 | return 0; | 1172 | return 0; |
1150 | 1173 | ||
@@ -1167,8 +1190,9 @@ static void falcon_monitor(struct efx_nic *efx) | |||
1167 | 1190 | ||
1168 | rc = falcon_board(efx)->type->monitor(efx); | 1191 | rc = falcon_board(efx)->type->monitor(efx); |
1169 | if (rc) { | 1192 | if (rc) { |
1170 | EFX_ERR(efx, "Board sensor %s; shutting down PHY\n", | 1193 | netif_err(efx, hw, efx->net_dev, |
1171 | (rc == -ERANGE) ? "reported fault" : "failed"); | 1194 | "Board sensor %s; shutting down PHY\n", |
1195 | (rc == -ERANGE) ? "reported fault" : "failed"); | ||
1172 | efx->phy_mode |= PHY_MODE_LOW_POWER; | 1196 | efx->phy_mode |= PHY_MODE_LOW_POWER; |
1173 | rc = __efx_reconfigure_port(efx); | 1197 | rc = __efx_reconfigure_port(efx); |
1174 | WARN_ON(rc); | 1198 | WARN_ON(rc); |
@@ -1219,7 +1243,8 @@ static int falcon_reset_sram(struct efx_nic *efx) | |||
1219 | /* Wait for SRAM reset to complete */ | 1243 | /* Wait for SRAM reset to complete */ |
1220 | count = 0; | 1244 | count = 0; |
1221 | do { | 1245 | do { |
1222 | EFX_LOG(efx, "waiting for SRAM reset (attempt %d)...\n", count); | 1246 | netif_dbg(efx, hw, efx->net_dev, |
1247 | "waiting for SRAM reset (attempt %d)...\n", count); | ||
1223 | 1248 | ||
1224 | /* SRAM reset is slow; expect around 16ms */ | 1249 | /* SRAM reset is slow; expect around 16ms */ |
1225 | schedule_timeout_uninterruptible(HZ / 50); | 1250 | schedule_timeout_uninterruptible(HZ / 50); |
@@ -1227,13 +1252,14 @@ static int falcon_reset_sram(struct efx_nic *efx) | |||
1227 | /* Check for reset complete */ | 1252 | /* Check for reset complete */ |
1228 | efx_reado(efx, &srm_cfg_reg_ker, FR_AZ_SRM_CFG); | 1253 | efx_reado(efx, &srm_cfg_reg_ker, FR_AZ_SRM_CFG); |
1229 | if (!EFX_OWORD_FIELD(srm_cfg_reg_ker, FRF_AZ_SRM_INIT_EN)) { | 1254 | if (!EFX_OWORD_FIELD(srm_cfg_reg_ker, FRF_AZ_SRM_INIT_EN)) { |
1230 | EFX_LOG(efx, "SRAM reset complete\n"); | 1255 | netif_dbg(efx, hw, efx->net_dev, |
1256 | "SRAM reset complete\n"); | ||
1231 | 1257 | ||
1232 | return 0; | 1258 | return 0; |
1233 | } | 1259 | } |
1234 | } while (++count < 20); /* wait upto 0.4 sec */ | 1260 | } while (++count < 20); /* wait upto 0.4 sec */ |
1235 | 1261 | ||
1236 | EFX_ERR(efx, "timed out waiting for SRAM reset\n"); | 1262 | netif_err(efx, hw, efx->net_dev, "timed out waiting for SRAM reset\n"); |
1237 | return -ETIMEDOUT; | 1263 | return -ETIMEDOUT; |
1238 | } | 1264 | } |
1239 | 1265 | ||
@@ -1292,7 +1318,8 @@ static int falcon_probe_nvconfig(struct efx_nic *efx) | |||
1292 | 1318 | ||
1293 | rc = falcon_read_nvram(efx, nvconfig); | 1319 | rc = falcon_read_nvram(efx, nvconfig); |
1294 | if (rc == -EINVAL) { | 1320 | if (rc == -EINVAL) { |
1295 | EFX_ERR(efx, "NVRAM is invalid therefore using defaults\n"); | 1321 | netif_err(efx, probe, efx->net_dev, |
1322 | "NVRAM is invalid therefore using defaults\n"); | ||
1296 | efx->phy_type = PHY_TYPE_NONE; | 1323 | efx->phy_type = PHY_TYPE_NONE; |
1297 | efx->mdio.prtad = MDIO_PRTAD_NONE; | 1324 | efx->mdio.prtad = MDIO_PRTAD_NONE; |
1298 | board_rev = 0; | 1325 | board_rev = 0; |
@@ -1326,7 +1353,8 @@ static int falcon_probe_nvconfig(struct efx_nic *efx) | |||
1326 | /* Read the MAC addresses */ | 1353 | /* Read the MAC addresses */ |
1327 | memcpy(efx->mac_address, nvconfig->mac_address[0], ETH_ALEN); | 1354 | memcpy(efx->mac_address, nvconfig->mac_address[0], ETH_ALEN); |
1328 | 1355 | ||
1329 | EFX_LOG(efx, "PHY is %d phy_id %d\n", efx->phy_type, efx->mdio.prtad); | 1356 | netif_dbg(efx, probe, efx->net_dev, "PHY is %d phy_id %d\n", |
1357 | efx->phy_type, efx->mdio.prtad); | ||
1330 | 1358 | ||
1331 | rc = falcon_probe_board(efx, board_rev); | 1359 | rc = falcon_probe_board(efx, board_rev); |
1332 | if (rc) | 1360 | if (rc) |
@@ -1355,14 +1383,16 @@ static void falcon_probe_spi_devices(struct efx_nic *efx) | |||
1355 | if (EFX_OWORD_FIELD(gpio_ctl, FRF_AB_GPIO3_PWRUP_VALUE)) { | 1383 | if (EFX_OWORD_FIELD(gpio_ctl, FRF_AB_GPIO3_PWRUP_VALUE)) { |
1356 | boot_dev = (EFX_OWORD_FIELD(nic_stat, FRF_AB_SF_PRST) ? | 1384 | boot_dev = (EFX_OWORD_FIELD(nic_stat, FRF_AB_SF_PRST) ? |
1357 | FFE_AB_SPI_DEVICE_FLASH : FFE_AB_SPI_DEVICE_EEPROM); | 1385 | FFE_AB_SPI_DEVICE_FLASH : FFE_AB_SPI_DEVICE_EEPROM); |
1358 | EFX_LOG(efx, "Booted from %s\n", | 1386 | netif_dbg(efx, probe, efx->net_dev, "Booted from %s\n", |
1359 | boot_dev == FFE_AB_SPI_DEVICE_FLASH ? "flash" : "EEPROM"); | 1387 | boot_dev == FFE_AB_SPI_DEVICE_FLASH ? |
1388 | "flash" : "EEPROM"); | ||
1360 | } else { | 1389 | } else { |
1361 | /* Disable VPD and set clock dividers to safe | 1390 | /* Disable VPD and set clock dividers to safe |
1362 | * values for initial programming. */ | 1391 | * values for initial programming. */ |
1363 | boot_dev = -1; | 1392 | boot_dev = -1; |
1364 | EFX_LOG(efx, "Booted from internal ASIC settings;" | 1393 | netif_dbg(efx, probe, efx->net_dev, |
1365 | " setting SPI config\n"); | 1394 | "Booted from internal ASIC settings;" |
1395 | " setting SPI config\n"); | ||
1366 | EFX_POPULATE_OWORD_3(ee_vpd_cfg, FRF_AB_EE_VPD_EN, 0, | 1396 | EFX_POPULATE_OWORD_3(ee_vpd_cfg, FRF_AB_EE_VPD_EN, 0, |
1367 | /* 125 MHz / 7 ~= 20 MHz */ | 1397 | /* 125 MHz / 7 ~= 20 MHz */ |
1368 | FRF_AB_EE_SF_CLOCK_DIV, 7, | 1398 | FRF_AB_EE_SF_CLOCK_DIV, 7, |
@@ -1396,7 +1426,8 @@ static int falcon_probe_nic(struct efx_nic *efx) | |||
1396 | rc = -ENODEV; | 1426 | rc = -ENODEV; |
1397 | 1427 | ||
1398 | if (efx_nic_fpga_ver(efx) != 0) { | 1428 | if (efx_nic_fpga_ver(efx) != 0) { |
1399 | EFX_ERR(efx, "Falcon FPGA not supported\n"); | 1429 | netif_err(efx, probe, efx->net_dev, |
1430 | "Falcon FPGA not supported\n"); | ||
1400 | goto fail1; | 1431 | goto fail1; |
1401 | } | 1432 | } |
1402 | 1433 | ||
@@ -1406,16 +1437,19 @@ static int falcon_probe_nic(struct efx_nic *efx) | |||
1406 | u8 pci_rev = efx->pci_dev->revision; | 1437 | u8 pci_rev = efx->pci_dev->revision; |
1407 | 1438 | ||
1408 | if ((pci_rev == 0xff) || (pci_rev == 0)) { | 1439 | if ((pci_rev == 0xff) || (pci_rev == 0)) { |
1409 | EFX_ERR(efx, "Falcon rev A0 not supported\n"); | 1440 | netif_err(efx, probe, efx->net_dev, |
1441 | "Falcon rev A0 not supported\n"); | ||
1410 | goto fail1; | 1442 | goto fail1; |
1411 | } | 1443 | } |
1412 | efx_reado(efx, &nic_stat, FR_AB_NIC_STAT); | 1444 | efx_reado(efx, &nic_stat, FR_AB_NIC_STAT); |
1413 | if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) { | 1445 | if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) { |
1414 | EFX_ERR(efx, "Falcon rev A1 1G not supported\n"); | 1446 | netif_err(efx, probe, efx->net_dev, |
1447 | "Falcon rev A1 1G not supported\n"); | ||
1415 | goto fail1; | 1448 | goto fail1; |
1416 | } | 1449 | } |
1417 | if (EFX_OWORD_FIELD(nic_stat, FRF_AA_STRAP_PCIE) == 0) { | 1450 | if (EFX_OWORD_FIELD(nic_stat, FRF_AA_STRAP_PCIE) == 0) { |
1418 | EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n"); | 1451 | netif_err(efx, probe, efx->net_dev, |
1452 | "Falcon rev A1 PCI-X not supported\n"); | ||
1419 | goto fail1; | 1453 | goto fail1; |
1420 | } | 1454 | } |
1421 | 1455 | ||
@@ -1429,7 +1463,8 @@ static int falcon_probe_nic(struct efx_nic *efx) | |||
1429 | } | 1463 | } |
1430 | } | 1464 | } |
1431 | if (!nic_data->pci_dev2) { | 1465 | if (!nic_data->pci_dev2) { |
1432 | EFX_ERR(efx, "failed to find secondary function\n"); | 1466 | netif_err(efx, probe, efx->net_dev, |
1467 | "failed to find secondary function\n"); | ||
1433 | rc = -ENODEV; | 1468 | rc = -ENODEV; |
1434 | goto fail2; | 1469 | goto fail2; |
1435 | } | 1470 | } |
@@ -1438,7 +1473,7 @@ static int falcon_probe_nic(struct efx_nic *efx) | |||
1438 | /* Now we can reset the NIC */ | 1473 | /* Now we can reset the NIC */ |
1439 | rc = falcon_reset_hw(efx, RESET_TYPE_ALL); | 1474 | rc = falcon_reset_hw(efx, RESET_TYPE_ALL); |
1440 | if (rc) { | 1475 | if (rc) { |
1441 | EFX_ERR(efx, "failed to reset NIC\n"); | 1476 | netif_err(efx, probe, efx->net_dev, "failed to reset NIC\n"); |
1442 | goto fail3; | 1477 | goto fail3; |
1443 | } | 1478 | } |
1444 | 1479 | ||
@@ -1448,9 +1483,11 @@ static int falcon_probe_nic(struct efx_nic *efx) | |||
1448 | goto fail4; | 1483 | goto fail4; |
1449 | BUG_ON(efx->irq_status.dma_addr & 0x0f); | 1484 | BUG_ON(efx->irq_status.dma_addr & 0x0f); |
1450 | 1485 | ||
1451 | EFX_LOG(efx, "INT_KER at %llx (virt %p phys %llx)\n", | 1486 | netif_dbg(efx, probe, efx->net_dev, |
1452 | (u64)efx->irq_status.dma_addr, | 1487 | "INT_KER at %llx (virt %p phys %llx)\n", |
1453 | efx->irq_status.addr, (u64)virt_to_phys(efx->irq_status.addr)); | 1488 | (u64)efx->irq_status.dma_addr, |
1489 | efx->irq_status.addr, | ||
1490 | (u64)virt_to_phys(efx->irq_status.addr)); | ||
1454 | 1491 | ||
1455 | falcon_probe_spi_devices(efx); | 1492 | falcon_probe_spi_devices(efx); |
1456 | 1493 | ||
@@ -1474,7 +1511,8 @@ static int falcon_probe_nic(struct efx_nic *efx) | |||
1474 | 1511 | ||
1475 | rc = falcon_board(efx)->type->init(efx); | 1512 | rc = falcon_board(efx)->type->init(efx); |
1476 | if (rc) { | 1513 | if (rc) { |
1477 | EFX_ERR(efx, "failed to initialise board\n"); | 1514 | netif_err(efx, probe, efx->net_dev, |
1515 | "failed to initialise board\n"); | ||
1478 | goto fail6; | 1516 | goto fail6; |
1479 | } | 1517 | } |
1480 | 1518 | ||