diff options
author | Rusty Russell <rusty@rustcorp.com.au> | 2011-12-19 08:56:45 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-12-19 22:27:29 -0500 |
commit | 3db1cd5c05f35fb43eb134df6f321de4e63141f2 (patch) | |
tree | 960039f3f4f0a524b37e94434624da154859bc64 /drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | |
parent | a8e510f682fe6d7671c11887e07c55f86caaf3c1 (diff) |
net: fix assignment of 0/1 to bool variables.
DaveM said:
Please, this kind of stuff rots forever and not using bool properly
drives me crazy.
Joe Perches <joe@perches.com> gave me the spatch script:
@@
bool b;
@@
-b = 0
+b = false
@@
bool b;
@@
-b = 1
+b = true
I merely installed coccinelle, read the documentation and took credit.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c')
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c index 9a56fd74e673..8b113e3f16f5 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | |||
@@ -1214,7 +1214,7 @@ s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, | |||
1214 | u32 max_retry = 10; | 1214 | u32 max_retry = 10; |
1215 | u32 retry = 0; | 1215 | u32 retry = 0; |
1216 | u16 swfw_mask = 0; | 1216 | u16 swfw_mask = 0; |
1217 | bool nack = 1; | 1217 | bool nack = true; |
1218 | *data = 0; | 1218 | *data = 0; |
1219 | 1219 | ||
1220 | if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1) | 1220 | if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1) |
@@ -1421,7 +1421,7 @@ static void ixgbe_i2c_stop(struct ixgbe_hw *hw) | |||
1421 | static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) | 1421 | static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) |
1422 | { | 1422 | { |
1423 | s32 i; | 1423 | s32 i; |
1424 | bool bit = 0; | 1424 | bool bit = false; |
1425 | 1425 | ||
1426 | for (i = 7; i >= 0; i--) { | 1426 | for (i = 7; i >= 0; i--) { |
1427 | ixgbe_clock_in_i2c_bit(hw, &bit); | 1427 | ixgbe_clock_in_i2c_bit(hw, &bit); |
@@ -1443,7 +1443,7 @@ static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data) | |||
1443 | s32 status = 0; | 1443 | s32 status = 0; |
1444 | s32 i; | 1444 | s32 i; |
1445 | u32 i2cctl; | 1445 | u32 i2cctl; |
1446 | bool bit = 0; | 1446 | bool bit = false; |
1447 | 1447 | ||
1448 | for (i = 7; i >= 0; i--) { | 1448 | for (i = 7; i >= 0; i--) { |
1449 | bit = (data >> i) & 0x1; | 1449 | bit = (data >> i) & 0x1; |
@@ -1473,7 +1473,7 @@ static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) | |||
1473 | u32 i = 0; | 1473 | u32 i = 0; |
1474 | u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); | 1474 | u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); |
1475 | u32 timeout = 10; | 1475 | u32 timeout = 10; |
1476 | bool ack = 1; | 1476 | bool ack = true; |
1477 | 1477 | ||
1478 | ixgbe_raise_i2c_clk(hw, &i2cctl); | 1478 | ixgbe_raise_i2c_clk(hw, &i2cctl); |
1479 | 1479 | ||
@@ -1646,9 +1646,9 @@ static bool ixgbe_get_i2c_data(u32 *i2cctl) | |||
1646 | bool data; | 1646 | bool data; |
1647 | 1647 | ||
1648 | if (*i2cctl & IXGBE_I2C_DATA_IN) | 1648 | if (*i2cctl & IXGBE_I2C_DATA_IN) |
1649 | data = 1; | 1649 | data = true; |
1650 | else | 1650 | else |
1651 | data = 0; | 1651 | data = false; |
1652 | 1652 | ||
1653 | return data; | 1653 | return data; |
1654 | } | 1654 | } |