diff options
author | Philip Avinash <avinashphilip@ti.com> | 2013-01-04 02:56:49 -0500 |
---|---|---|
committer | Artem Bityutskiy <artem.bityutskiy@linux.intel.com> | 2013-02-04 02:26:29 -0500 |
commit | c3e4b995e47e8f72297779852907f6d3ecd75139 (patch) | |
tree | 04e8e4dc014f8d14a2fac95f83fa87f26e61ffd4 /drivers/mtd | |
parent | a8459f21ed48fc366ad49ce9828f6bbb1cfac9a9 (diff) |
mtd: nand: omap2: Update nerrors using ecc.strength
Remove check of ecc bytes with 13, number of errors can directly update
from nand ecc strength. This will increase re-usability of the code.
Also add macro definitions BCH8_ERROR_MAX & BCH4_ERROR_MAX for better
readability and cleaner code.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/omap2.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 0002d5e94f0d..ec20f67e8949 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c | |||
@@ -117,6 +117,9 @@ | |||
117 | 117 | ||
118 | #define OMAP24XX_DMA_GPMC 4 | 118 | #define OMAP24XX_DMA_GPMC 4 |
119 | 119 | ||
120 | #define BCH8_MAX_ERROR 8 /* upto 8 bit correctable */ | ||
121 | #define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */ | ||
122 | |||
120 | /* oob info generated runtime depending on ecc algorithm and layout selected */ | 123 | /* oob info generated runtime depending on ecc algorithm and layout selected */ |
121 | static struct nand_ecclayout omap_oobinfo; | 124 | static struct nand_ecclayout omap_oobinfo; |
122 | /* Define some generic bad / good block scan pattern which are used | 125 | /* Define some generic bad / good block scan pattern which are used |
@@ -1041,7 +1044,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode) | |||
1041 | struct nand_chip *chip = mtd->priv; | 1044 | struct nand_chip *chip = mtd->priv; |
1042 | u32 val; | 1045 | u32 val; |
1043 | 1046 | ||
1044 | nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4; | 1047 | nerrors = info->nand.ecc.strength; |
1045 | dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0; | 1048 | dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0; |
1046 | nsectors = 1; | 1049 | nsectors = 1; |
1047 | /* | 1050 | /* |
@@ -1218,13 +1221,14 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt) | |||
1218 | struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, | 1221 | struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, |
1219 | mtd); | 1222 | mtd); |
1220 | #ifdef CONFIG_MTD_NAND_OMAP_BCH8 | 1223 | #ifdef CONFIG_MTD_NAND_OMAP_BCH8 |
1221 | const int hw_errors = 8; | 1224 | const int hw_errors = BCH8_MAX_ERROR; |
1222 | #else | 1225 | #else |
1223 | const int hw_errors = 4; | 1226 | const int hw_errors = BCH4_MAX_ERROR; |
1224 | #endif | 1227 | #endif |
1225 | info->bch = NULL; | 1228 | info->bch = NULL; |
1226 | 1229 | ||
1227 | max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4; | 1230 | max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? |
1231 | BCH8_MAX_ERROR : BCH4_MAX_ERROR; | ||
1228 | if (max_errors != hw_errors) { | 1232 | if (max_errors != hw_errors) { |
1229 | pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported", | 1233 | pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported", |
1230 | max_errors, hw_errors); | 1234 | max_errors, hw_errors); |