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authorMatthias Schwarzott <zzam@gentoo.org>2008-04-12 14:04:47 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-04-24 13:09:39 -0400
commit82cd2dff4a5562a081c8bbf449a1ae7b9ecb5b1b (patch)
treee62706a33540adce477fde218d6c3f6baef59403 /drivers/media
parent1881ee89e0fe03ac5bba9045acb3bea1818f9466 (diff)
V4L/DVB (7572): mt312: Fix diseqc
Correct the frequency of the emitted diseqc signal to 22kHz. Adds sleep(100) to wait for message to be transmitted. For now the only user of mt312 is b2c2-flexcop, and it does overwrite all diseqc related functions with own code. Signed-off-by: Matthias Schwarzott <zzam@gentoo.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/dvb/frontends/mt312.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/media/dvb/frontends/mt312.c b/drivers/media/dvb/frontends/mt312.c
index b03a959ef2e8..32b419477887 100644
--- a/drivers/media/dvb/frontends/mt312.c
+++ b/drivers/media/dvb/frontends/mt312.c
@@ -270,7 +270,7 @@ static int mt312_initfe(struct dvb_frontend *fe)
270 MT312_SYS_CLK) * 2, 1000000); 270 MT312_SYS_CLK) * 2, 1000000);
271 271
272 /* DISEQC_RATIO */ 272 /* DISEQC_RATIO */
273 buf[1] = mt312_div(MT312_PLL_CLK, 15000 * 4); 273 buf[1] = mt312_div(MT312_PLL_CLK, 22000 * 4);
274 274
275 ret = mt312_write(state, SYS_CLK, buf, sizeof(buf)); 275 ret = mt312_write(state, SYS_CLK, buf, sizeof(buf));
276 if (ret < 0) 276 if (ret < 0)
@@ -323,6 +323,9 @@ static int mt312_send_master_cmd(struct dvb_frontend *fe,
323 if (ret < 0) 323 if (ret < 0)
324 return ret; 324 return ret;
325 325
326 /* is there a better way to wait for message to be transmitted */
327 msleep(100);
328
326 /* set DISEQC_MODE[2:0] to zero if a return message is expected */ 329 /* set DISEQC_MODE[2:0] to zero if a return message is expected */
327 if (c->msg[0] & 0x02) { 330 if (c->msg[0] & 0x02) {
328 ret = mt312_writereg(state, DISEQC_MODE, (diseqc_mode & 0x40)); 331 ret = mt312_writereg(state, DISEQC_MODE, (diseqc_mode & 0x40));