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authorMauro Carvalho Chehab <mchehab@redhat.com>2011-12-22 15:44:43 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2011-12-31 06:14:54 -0500
commit31b4f32c26d5a1999abb0e8ab308f80b4f4760c7 (patch)
tree14efae512506fde8e0334c780fd84b616e234aac /drivers/media/dvb/frontends/cx24123.c
parent1ac6a854ad444680bffbacd9e340e40c75adc367 (diff)
[media] cx23123: remove an unused argument from cx24123_pll_writereg()
cx24123_pll_writereg doesn't use dvb_frontend_parameters. Just remove it. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/frontends/cx24123.c')
-rw-r--r--drivers/media/dvb/frontends/cx24123.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/media/dvb/frontends/cx24123.c b/drivers/media/dvb/frontends/cx24123.c
index 96f99a8fe0a9..4dfe786bf603 100644
--- a/drivers/media/dvb/frontends/cx24123.c
+++ b/drivers/media/dvb/frontends/cx24123.c
@@ -601,8 +601,7 @@ static int cx24123_pll_calculate(struct dvb_frontend *fe,
601 * Tuner cx24109 is written through a dedicated 3wire interface 601 * Tuner cx24109 is written through a dedicated 3wire interface
602 * on the demod chip. 602 * on the demod chip.
603 */ 603 */
604static int cx24123_pll_writereg(struct dvb_frontend *fe, 604static int cx24123_pll_writereg(struct dvb_frontend *fe, u32 data)
605 struct dvb_frontend_parameters *p, u32 data)
606{ 605{
607 struct cx24123_state *state = fe->demodulator_priv; 606 struct cx24123_state *state = fe->demodulator_priv;
608 unsigned long timeout; 607 unsigned long timeout;
@@ -673,12 +672,12 @@ static int cx24123_pll_tune(struct dvb_frontend *fe,
673 } 672 }
674 673
675 /* Write the new VCO/VGA */ 674 /* Write the new VCO/VGA */
676 cx24123_pll_writereg(fe, p, state->VCAarg); 675 cx24123_pll_writereg(fe, state->VCAarg);
677 cx24123_pll_writereg(fe, p, state->VGAarg); 676 cx24123_pll_writereg(fe, state->VGAarg);
678 677
679 /* Write the new bandselect and pll args */ 678 /* Write the new bandselect and pll args */
680 cx24123_pll_writereg(fe, p, state->bandselectarg); 679 cx24123_pll_writereg(fe, state->bandselectarg);
681 cx24123_pll_writereg(fe, p, state->pllarg); 680 cx24123_pll_writereg(fe, state->pllarg);
682 681
683 /* set the FILTUNE voltage */ 682 /* set the FILTUNE voltage */
684 val = cx24123_readreg(state, 0x28) & ~0x3; 683 val = cx24123_readreg(state, 0x28) & ~0x3;