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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/ide/ide-dma.c
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/ide/ide-dma.c')
-rw-r--r--drivers/ide/ide-dma.c959
1 files changed, 959 insertions, 0 deletions
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
new file mode 100644
index 000000000000..2d2eefb610dd
--- /dev/null
+++ b/drivers/ide/ide-dma.c
@@ -0,0 +1,959 @@
1/*
2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
3 *
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8/*
9 * Special Thanks to Mark for his Six years of work.
10 *
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
13 */
14
15/*
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
21 *
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
23 *
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
25 *
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
31 *
32 * Use "hdparm -i" to view modes supported by a given drive.
33 *
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
36 *
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
40 *
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
46 *
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
51 *
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
53 *
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
58 *
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
61 *
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
64 *
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
67 *
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
70 *
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
72 *
73 * ATA-66/100 and recovery functions, I forgot the rest......
74 *
75 */
76
77#include <linux/config.h>
78#include <linux/module.h>
79#include <linux/types.h>
80#include <linux/kernel.h>
81#include <linux/timer.h>
82#include <linux/mm.h>
83#include <linux/interrupt.h>
84#include <linux/pci.h>
85#include <linux/init.h>
86#include <linux/ide.h>
87#include <linux/delay.h>
88#include <linux/scatterlist.h>
89
90#include <asm/io.h>
91#include <asm/irq.h>
92
93struct drive_list_entry {
94 const char *id_model;
95 const char *id_firmware;
96};
97
98static const struct drive_list_entry drive_whitelist [] = {
99
100 { "Micropolis 2112A" , "ALL" },
101 { "CONNER CTMA 4000" , "ALL" },
102 { "CONNER CTT8000-A" , "ALL" },
103 { "ST34342A" , "ALL" },
104 { NULL , NULL }
105};
106
107static const struct drive_list_entry drive_blacklist [] = {
108
109 { "WDC AC11000H" , "ALL" },
110 { "WDC AC22100H" , "ALL" },
111 { "WDC AC32500H" , "ALL" },
112 { "WDC AC33100H" , "ALL" },
113 { "WDC AC31600H" , "ALL" },
114 { "WDC AC32100H" , "24.09P07" },
115 { "WDC AC23200L" , "21.10N21" },
116 { "Compaq CRD-8241B" , "ALL" },
117 { "CRD-8400B" , "ALL" },
118 { "CRD-8480B", "ALL" },
119 { "CRD-8482B", "ALL" },
120 { "CRD-84" , "ALL" },
121 { "SanDisk SDP3B" , "ALL" },
122 { "SanDisk SDP3B-64" , "ALL" },
123 { "SANYO CD-ROM CRD" , "ALL" },
124 { "HITACHI CDR-8" , "ALL" },
125 { "HITACHI CDR-8335" , "ALL" },
126 { "HITACHI CDR-8435" , "ALL" },
127 { "Toshiba CD-ROM XM-6202B" , "ALL" },
128 { "CD-532E-A" , "ALL" },
129 { "E-IDE CD-ROM CR-840", "ALL" },
130 { "CD-ROM Drive/F5A", "ALL" },
131 { "WPI CDD-820", "ALL" },
132 { "SAMSUNG CD-ROM SC-148C", "ALL" },
133 { "SAMSUNG CD-ROM SC", "ALL" },
134 { "SanDisk SDP3B-64" , "ALL" },
135 { "SAMSUNG CD-ROM SN-124", "ALL" },
136 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" },
137 { "_NEC DV5800A", "ALL" },
138 { NULL , NULL }
139
140};
141
142/**
143 * in_drive_list - look for drive in black/white list
144 * @id: drive identifier
145 * @drive_table: list to inspect
146 *
147 * Look for a drive in the blacklist and the whitelist tables
148 * Returns 1 if the drive is found in the table.
149 */
150
151static int in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
152{
153 for ( ; drive_table->id_model ; drive_table++)
154 if ((!strcmp(drive_table->id_model, id->model)) &&
155 ((strstr(drive_table->id_firmware, id->fw_rev)) ||
156 (!strcmp(drive_table->id_firmware, "ALL"))))
157 return 1;
158 return 0;
159}
160
161/**
162 * ide_dma_intr - IDE DMA interrupt handler
163 * @drive: the drive the interrupt is for
164 *
165 * Handle an interrupt completing a read/write DMA transfer on an
166 * IDE device
167 */
168
169ide_startstop_t ide_dma_intr (ide_drive_t *drive)
170{
171 u8 stat = 0, dma_stat = 0;
172
173 dma_stat = HWIF(drive)->ide_dma_end(drive);
174 stat = HWIF(drive)->INB(IDE_STATUS_REG); /* get drive status */
175 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
176 if (!dma_stat) {
177 struct request *rq = HWGROUP(drive)->rq;
178
179 if (rq->rq_disk) {
180 ide_driver_t *drv;
181
182 drv = *(ide_driver_t **)rq->rq_disk->private_data;;
183 drv->end_request(drive, 1, rq->nr_sectors);
184 } else
185 ide_end_request(drive, 1, rq->nr_sectors);
186 return ide_stopped;
187 }
188 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
189 drive->name, dma_stat);
190 }
191 return ide_error(drive, "dma_intr", stat);
192}
193
194EXPORT_SYMBOL_GPL(ide_dma_intr);
195
196#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
197/**
198 * ide_build_sglist - map IDE scatter gather for DMA I/O
199 * @drive: the drive to build the DMA table for
200 * @rq: the request holding the sg list
201 *
202 * Perform the PCI mapping magic necessary to access the source or
203 * target buffers of a request via PCI DMA. The lower layers of the
204 * kernel provide the necessary cache management so that we can
205 * operate in a portable fashion
206 */
207
208int ide_build_sglist(ide_drive_t *drive, struct request *rq)
209{
210 ide_hwif_t *hwif = HWIF(drive);
211 struct scatterlist *sg = hwif->sg_table;
212
213 if ((rq->flags & REQ_DRIVE_TASKFILE) && rq->nr_sectors > 256)
214 BUG();
215
216 ide_map_sg(drive, rq);
217
218 if (rq_data_dir(rq) == READ)
219 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
220 else
221 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
222
223 return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
224}
225
226EXPORT_SYMBOL_GPL(ide_build_sglist);
227
228/**
229 * ide_build_dmatable - build IDE DMA table
230 *
231 * ide_build_dmatable() prepares a dma request. We map the command
232 * to get the pci bus addresses of the buffers and then build up
233 * the PRD table that the IDE layer wants to be fed. The code
234 * knows about the 64K wrap bug in the CS5530.
235 *
236 * Returns the number of built PRD entries if all went okay,
237 * returns 0 otherwise.
238 *
239 * May also be invoked from trm290.c
240 */
241
242int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
243{
244 ide_hwif_t *hwif = HWIF(drive);
245 unsigned int *table = hwif->dmatable_cpu;
246 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
247 unsigned int count = 0;
248 int i;
249 struct scatterlist *sg;
250
251 hwif->sg_nents = i = ide_build_sglist(drive, rq);
252
253 if (!i)
254 return 0;
255
256 sg = hwif->sg_table;
257 while (i) {
258 u32 cur_addr;
259 u32 cur_len;
260
261 cur_addr = sg_dma_address(sg);
262 cur_len = sg_dma_len(sg);
263
264 /*
265 * Fill in the dma table, without crossing any 64kB boundaries.
266 * Most hardware requires 16-bit alignment of all blocks,
267 * but the trm290 requires 32-bit alignment.
268 */
269
270 while (cur_len) {
271 if (count++ >= PRD_ENTRIES) {
272 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
273 goto use_pio_instead;
274 } else {
275 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
276
277 if (bcount > cur_len)
278 bcount = cur_len;
279 *table++ = cpu_to_le32(cur_addr);
280 xcount = bcount & 0xffff;
281 if (is_trm290)
282 xcount = ((xcount >> 2) - 1) << 16;
283 if (xcount == 0x0000) {
284 /*
285 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
286 * but at least one (e.g. CS5530) misinterprets it as zero (!).
287 * So here we break the 64KB entry into two 32KB entries instead.
288 */
289 if (count++ >= PRD_ENTRIES) {
290 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
291 goto use_pio_instead;
292 }
293 *table++ = cpu_to_le32(0x8000);
294 *table++ = cpu_to_le32(cur_addr + 0x8000);
295 xcount = 0x8000;
296 }
297 *table++ = cpu_to_le32(xcount);
298 cur_addr += bcount;
299 cur_len -= bcount;
300 }
301 }
302
303 sg++;
304 i--;
305 }
306
307 if (count) {
308 if (!is_trm290)
309 *--table |= cpu_to_le32(0x80000000);
310 return count;
311 }
312 printk(KERN_ERR "%s: empty DMA table?\n", drive->name);
313use_pio_instead:
314 pci_unmap_sg(hwif->pci_dev,
315 hwif->sg_table,
316 hwif->sg_nents,
317 hwif->sg_dma_direction);
318 return 0; /* revert to PIO for this request */
319}
320
321EXPORT_SYMBOL_GPL(ide_build_dmatable);
322
323/**
324 * ide_destroy_dmatable - clean up DMA mapping
325 * @drive: The drive to unmap
326 *
327 * Teardown mappings after DMA has completed. This must be called
328 * after the completion of each use of ide_build_dmatable and before
329 * the next use of ide_build_dmatable. Failure to do so will cause
330 * an oops as only one mapping can be live for each target at a given
331 * time.
332 */
333
334void ide_destroy_dmatable (ide_drive_t *drive)
335{
336 struct pci_dev *dev = HWIF(drive)->pci_dev;
337 struct scatterlist *sg = HWIF(drive)->sg_table;
338 int nents = HWIF(drive)->sg_nents;
339
340 pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
341}
342
343EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
344
345/**
346 * config_drive_for_dma - attempt to activate IDE DMA
347 * @drive: the drive to place in DMA mode
348 *
349 * If the drive supports at least mode 2 DMA or UDMA of any kind
350 * then attempt to place it into DMA mode. Drives that are known to
351 * support DMA but predate the DMA properties or that are known
352 * to have DMA handling bugs are also set up appropriately based
353 * on the good/bad drive lists.
354 */
355
356static int config_drive_for_dma (ide_drive_t *drive)
357{
358 struct hd_driveid *id = drive->id;
359 ide_hwif_t *hwif = HWIF(drive);
360
361 if ((id->capability & 1) && hwif->autodma) {
362 /*
363 * Enable DMA on any drive that has
364 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
365 */
366 if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
367 return hwif->ide_dma_on(drive);
368 /*
369 * Enable DMA on any drive that has mode2 DMA
370 * (multi or single) enabled
371 */
372 if (id->field_valid & 2) /* regular DMA */
373 if ((id->dma_mword & 0x404) == 0x404 ||
374 (id->dma_1word & 0x404) == 0x404)
375 return hwif->ide_dma_on(drive);
376
377 /* Consult the list of known "good" drives */
378 if (__ide_dma_good_drive(drive))
379 return hwif->ide_dma_on(drive);
380 }
381// if (hwif->tuneproc != NULL) hwif->tuneproc(drive, 255);
382 return hwif->ide_dma_off_quietly(drive);
383}
384
385/**
386 * dma_timer_expiry - handle a DMA timeout
387 * @drive: Drive that timed out
388 *
389 * An IDE DMA transfer timed out. In the event of an error we ask
390 * the driver to resolve the problem, if a DMA transfer is still
391 * in progress we continue to wait (arguably we need to add a
392 * secondary 'I don't care what the drive thinks' timeout here)
393 * Finally if we have an interrupt we let it complete the I/O.
394 * But only one time - we clear expiry and if it's still not
395 * completed after WAIT_CMD, we error and retry in PIO.
396 * This can occur if an interrupt is lost or due to hang or bugs.
397 */
398
399static int dma_timer_expiry (ide_drive_t *drive)
400{
401 ide_hwif_t *hwif = HWIF(drive);
402 u8 dma_stat = hwif->INB(hwif->dma_status);
403
404 printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
405 drive->name, dma_stat);
406
407 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
408 return WAIT_CMD;
409
410 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
411
412 /* 1 dmaing, 2 error, 4 intr */
413 if (dma_stat & 2) /* ERROR */
414 return -1;
415
416 if (dma_stat & 1) /* DMAing */
417 return WAIT_CMD;
418
419 if (dma_stat & 4) /* Got an Interrupt */
420 return WAIT_CMD;
421
422 return 0; /* Status is unknown -- reset the bus */
423}
424
425/**
426 * __ide_dma_host_off - Generic DMA kill
427 * @drive: drive to control
428 *
429 * Perform the generic IDE controller DMA off operation. This
430 * works for most IDE bus mastering controllers
431 */
432
433int __ide_dma_host_off (ide_drive_t *drive)
434{
435 ide_hwif_t *hwif = HWIF(drive);
436 u8 unit = (drive->select.b.unit & 0x01);
437 u8 dma_stat = hwif->INB(hwif->dma_status);
438
439 hwif->OUTB((dma_stat & ~(1<<(5+unit))), hwif->dma_status);
440 return 0;
441}
442
443EXPORT_SYMBOL(__ide_dma_host_off);
444
445/**
446 * __ide_dma_host_off_quietly - Generic DMA kill
447 * @drive: drive to control
448 *
449 * Turn off the current DMA on this IDE controller.
450 */
451
452int __ide_dma_off_quietly (ide_drive_t *drive)
453{
454 drive->using_dma = 0;
455 ide_toggle_bounce(drive, 0);
456
457 if (HWIF(drive)->ide_dma_host_off(drive))
458 return 1;
459
460 return 0;
461}
462
463EXPORT_SYMBOL(__ide_dma_off_quietly);
464#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
465
466/**
467 * __ide_dma_off - disable DMA on a device
468 * @drive: drive to disable DMA on
469 *
470 * Disable IDE DMA for a device on this IDE controller.
471 * Inform the user that DMA has been disabled.
472 */
473
474int __ide_dma_off (ide_drive_t *drive)
475{
476 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
477 return HWIF(drive)->ide_dma_off_quietly(drive);
478}
479
480EXPORT_SYMBOL(__ide_dma_off);
481
482#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
483/**
484 * __ide_dma_host_on - Enable DMA on a host
485 * @drive: drive to enable for DMA
486 *
487 * Enable DMA on an IDE controller following generic bus mastering
488 * IDE controller behaviour
489 */
490
491int __ide_dma_host_on (ide_drive_t *drive)
492{
493 if (drive->using_dma) {
494 ide_hwif_t *hwif = HWIF(drive);
495 u8 unit = (drive->select.b.unit & 0x01);
496 u8 dma_stat = hwif->INB(hwif->dma_status);
497
498 hwif->OUTB((dma_stat|(1<<(5+unit))), hwif->dma_status);
499 return 0;
500 }
501 return 1;
502}
503
504EXPORT_SYMBOL(__ide_dma_host_on);
505
506/**
507 * __ide_dma_on - Enable DMA on a device
508 * @drive: drive to enable DMA on
509 *
510 * Enable IDE DMA for a device on this IDE controller.
511 */
512
513int __ide_dma_on (ide_drive_t *drive)
514{
515 /* consult the list of known "bad" drives */
516 if (__ide_dma_bad_drive(drive))
517 return 1;
518
519 drive->using_dma = 1;
520 ide_toggle_bounce(drive, 1);
521
522 if (HWIF(drive)->ide_dma_host_on(drive))
523 return 1;
524
525 return 0;
526}
527
528EXPORT_SYMBOL(__ide_dma_on);
529
530/**
531 * __ide_dma_check - check DMA setup
532 * @drive: drive to check
533 *
534 * Don't use - due for extermination
535 */
536
537int __ide_dma_check (ide_drive_t *drive)
538{
539 return config_drive_for_dma(drive);
540}
541
542EXPORT_SYMBOL(__ide_dma_check);
543
544/**
545 * ide_dma_setup - begin a DMA phase
546 * @drive: target device
547 *
548 * Build an IDE DMA PRD (IDE speak for scatter gather table)
549 * and then set up the DMA transfer registers for a device
550 * that follows generic IDE PCI DMA behaviour. Controllers can
551 * override this function if they need to
552 *
553 * Returns 0 on success. If a PIO fallback is required then 1
554 * is returned.
555 */
556
557int ide_dma_setup(ide_drive_t *drive)
558{
559 ide_hwif_t *hwif = drive->hwif;
560 struct request *rq = HWGROUP(drive)->rq;
561 unsigned int reading;
562 u8 dma_stat;
563
564 if (rq_data_dir(rq))
565 reading = 0;
566 else
567 reading = 1 << 3;
568
569 /* fall back to pio! */
570 if (!ide_build_dmatable(drive, rq)) {
571 ide_map_sg(drive, rq);
572 return 1;
573 }
574
575 /* PRD table */
576 hwif->OUTL(hwif->dmatable_dma, hwif->dma_prdtable);
577
578 /* specify r/w */
579 hwif->OUTB(reading, hwif->dma_command);
580
581 /* read dma_status for INTR & ERROR flags */
582 dma_stat = hwif->INB(hwif->dma_status);
583
584 /* clear INTR & ERROR flags */
585 hwif->OUTB(dma_stat|6, hwif->dma_status);
586 drive->waiting_for_dma = 1;
587 return 0;
588}
589
590EXPORT_SYMBOL_GPL(ide_dma_setup);
591
592static void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
593{
594 /* issue cmd to drive */
595 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
596}
597
598void ide_dma_start(ide_drive_t *drive)
599{
600 ide_hwif_t *hwif = HWIF(drive);
601 u8 dma_cmd = hwif->INB(hwif->dma_command);
602
603 /* Note that this is done *after* the cmd has
604 * been issued to the drive, as per the BM-IDE spec.
605 * The Promise Ultra33 doesn't work correctly when
606 * we do this part before issuing the drive cmd.
607 */
608 /* start DMA */
609 hwif->OUTB(dma_cmd|1, hwif->dma_command);
610 hwif->dma = 1;
611 wmb();
612}
613
614EXPORT_SYMBOL_GPL(ide_dma_start);
615
616/* returns 1 on error, 0 otherwise */
617int __ide_dma_end (ide_drive_t *drive)
618{
619 ide_hwif_t *hwif = HWIF(drive);
620 u8 dma_stat = 0, dma_cmd = 0;
621
622 drive->waiting_for_dma = 0;
623 /* get dma_command mode */
624 dma_cmd = hwif->INB(hwif->dma_command);
625 /* stop DMA */
626 hwif->OUTB(dma_cmd&~1, hwif->dma_command);
627 /* get DMA status */
628 dma_stat = hwif->INB(hwif->dma_status);
629 /* clear the INTR & ERROR bits */
630 hwif->OUTB(dma_stat|6, hwif->dma_status);
631 /* purge DMA mappings */
632 ide_destroy_dmatable(drive);
633 /* verify good DMA status */
634 hwif->dma = 0;
635 wmb();
636 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
637}
638
639EXPORT_SYMBOL(__ide_dma_end);
640
641/* returns 1 if dma irq issued, 0 otherwise */
642static int __ide_dma_test_irq(ide_drive_t *drive)
643{
644 ide_hwif_t *hwif = HWIF(drive);
645 u8 dma_stat = hwif->INB(hwif->dma_status);
646
647#if 0 /* do not set unless you know what you are doing */
648 if (dma_stat & 4) {
649 u8 stat = hwif->INB(IDE_STATUS_REG);
650 hwif->OUTB(hwif->dma_status, dma_stat & 0xE4);
651 }
652#endif
653 /* return 1 if INTR asserted */
654 if ((dma_stat & 4) == 4)
655 return 1;
656 if (!drive->waiting_for_dma)
657 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
658 drive->name, __FUNCTION__);
659 return 0;
660}
661#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
662
663int __ide_dma_bad_drive (ide_drive_t *drive)
664{
665 struct hd_driveid *id = drive->id;
666
667 int blacklist = in_drive_list(id, drive_blacklist);
668 if (blacklist) {
669 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
670 drive->name, id->model);
671 return blacklist;
672 }
673 return 0;
674}
675
676EXPORT_SYMBOL(__ide_dma_bad_drive);
677
678int __ide_dma_good_drive (ide_drive_t *drive)
679{
680 struct hd_driveid *id = drive->id;
681 return in_drive_list(id, drive_whitelist);
682}
683
684EXPORT_SYMBOL(__ide_dma_good_drive);
685
686int ide_use_dma(ide_drive_t *drive)
687{
688 struct hd_driveid *id = drive->id;
689 ide_hwif_t *hwif = drive->hwif;
690
691 /* consult the list of known "bad" drives */
692 if (__ide_dma_bad_drive(drive))
693 return 0;
694
695 /* capable of UltraDMA modes */
696 if (id->field_valid & 4) {
697 if (hwif->ultra_mask & id->dma_ultra)
698 return 1;
699 }
700
701 /* capable of regular DMA modes */
702 if (id->field_valid & 2) {
703 if (hwif->mwdma_mask & id->dma_mword)
704 return 1;
705 if (hwif->swdma_mask & id->dma_1word)
706 return 1;
707 }
708
709 /* consult the list of known "good" drives */
710 if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
711 return 1;
712
713 return 0;
714}
715
716EXPORT_SYMBOL_GPL(ide_use_dma);
717
718void ide_dma_verbose(ide_drive_t *drive)
719{
720 struct hd_driveid *id = drive->id;
721 ide_hwif_t *hwif = HWIF(drive);
722
723 if (id->field_valid & 4) {
724 if ((id->dma_ultra >> 8) && (id->dma_mword >> 8))
725 goto bug_dma_off;
726 if (id->dma_ultra & ((id->dma_ultra >> 8) & hwif->ultra_mask)) {
727 if (((id->dma_ultra >> 11) & 0x1F) &&
728 eighty_ninty_three(drive)) {
729 if ((id->dma_ultra >> 15) & 1) {
730 printk(", UDMA(mode 7)");
731 } else if ((id->dma_ultra >> 14) & 1) {
732 printk(", UDMA(133)");
733 } else if ((id->dma_ultra >> 13) & 1) {
734 printk(", UDMA(100)");
735 } else if ((id->dma_ultra >> 12) & 1) {
736 printk(", UDMA(66)");
737 } else if ((id->dma_ultra >> 11) & 1) {
738 printk(", UDMA(44)");
739 } else
740 goto mode_two;
741 } else {
742 mode_two:
743 if ((id->dma_ultra >> 10) & 1) {
744 printk(", UDMA(33)");
745 } else if ((id->dma_ultra >> 9) & 1) {
746 printk(", UDMA(25)");
747 } else if ((id->dma_ultra >> 8) & 1) {
748 printk(", UDMA(16)");
749 }
750 }
751 } else {
752 printk(", (U)DMA"); /* Can be BIOS-enabled! */
753 }
754 } else if (id->field_valid & 2) {
755 if ((id->dma_mword >> 8) && (id->dma_1word >> 8))
756 goto bug_dma_off;
757 printk(", DMA");
758 } else if (id->field_valid & 1) {
759 printk(", BUG");
760 }
761 return;
762bug_dma_off:
763 printk(", BUG DMA OFF");
764 hwif->ide_dma_off_quietly(drive);
765 return;
766}
767
768EXPORT_SYMBOL(ide_dma_verbose);
769
770#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
771int __ide_dma_lostirq (ide_drive_t *drive)
772{
773 printk("%s: DMA interrupt recovery\n", drive->name);
774 return 1;
775}
776
777EXPORT_SYMBOL(__ide_dma_lostirq);
778
779int __ide_dma_timeout (ide_drive_t *drive)
780{
781 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
782 if (HWIF(drive)->ide_dma_test_irq(drive))
783 return 0;
784
785 return HWIF(drive)->ide_dma_end(drive);
786}
787
788EXPORT_SYMBOL(__ide_dma_timeout);
789
790/*
791 * Needed for allowing full modular support of ide-driver
792 */
793static int ide_release_dma_engine(ide_hwif_t *hwif)
794{
795 if (hwif->dmatable_cpu) {
796 pci_free_consistent(hwif->pci_dev,
797 PRD_ENTRIES * PRD_BYTES,
798 hwif->dmatable_cpu,
799 hwif->dmatable_dma);
800 hwif->dmatable_cpu = NULL;
801 }
802 return 1;
803}
804
805static int ide_release_iomio_dma(ide_hwif_t *hwif)
806{
807 if ((hwif->dma_extra) && (hwif->channel == 0))
808 release_region((hwif->dma_base + 16), hwif->dma_extra);
809 release_region(hwif->dma_base, 8);
810 if (hwif->dma_base2)
811 release_region(hwif->dma_base, 8);
812 return 1;
813}
814
815/*
816 * Needed for allowing full modular support of ide-driver
817 */
818int ide_release_dma (ide_hwif_t *hwif)
819{
820 if (hwif->mmio == 2)
821 return 1;
822 if (hwif->chipset == ide_etrax100)
823 return 1;
824
825 ide_release_dma_engine(hwif);
826 return ide_release_iomio_dma(hwif);
827}
828
829static int ide_allocate_dma_engine(ide_hwif_t *hwif)
830{
831 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
832 PRD_ENTRIES * PRD_BYTES,
833 &hwif->dmatable_dma);
834
835 if (hwif->dmatable_cpu)
836 return 0;
837
838 printk(KERN_ERR "%s: -- Error, unable to allocate%s DMA table(s).\n",
839 hwif->cds->name, !hwif->dmatable_cpu ? " CPU" : "");
840
841 ide_release_dma_engine(hwif);
842 return 1;
843}
844
845static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
846{
847 printk(KERN_INFO " %s: MMIO-DMA ", hwif->name);
848
849 hwif->dma_base = base;
850 if (hwif->cds->extra && hwif->channel == 0)
851 hwif->dma_extra = hwif->cds->extra;
852
853 if(hwif->mate)
854 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
855 else
856 hwif->dma_master = base;
857 return 0;
858}
859
860static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
861{
862 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx",
863 hwif->name, base, base + ports - 1);
864 if (!request_region(base, ports, hwif->name)) {
865 printk(" -- Error, ports in use.\n");
866 return 1;
867 }
868 hwif->dma_base = base;
869 if ((hwif->cds->extra) && (hwif->channel == 0)) {
870 request_region(base+16, hwif->cds->extra, hwif->cds->name);
871 hwif->dma_extra = hwif->cds->extra;
872 }
873
874 if(hwif->mate)
875 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
876 else
877 hwif->dma_master = base;
878 if (hwif->dma_base2) {
879 if (!request_region(hwif->dma_base2, ports, hwif->name))
880 {
881 printk(" -- Error, secondary ports in use.\n");
882 release_region(base, ports);
883 return 1;
884 }
885 }
886 return 0;
887}
888
889static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
890{
891 if (hwif->mmio == 2)
892 return ide_mapped_mmio_dma(hwif, base,ports);
893 BUG_ON(hwif->mmio == 1);
894 return ide_iomio_dma(hwif, base, ports);
895}
896
897/*
898 * This can be called for a dynamically installed interface. Don't __init it
899 */
900void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
901{
902 if (ide_dma_iobase(hwif, dma_base, num_ports))
903 return;
904
905 if (ide_allocate_dma_engine(hwif)) {
906 ide_release_dma(hwif);
907 return;
908 }
909
910 if (!(hwif->dma_command))
911 hwif->dma_command = hwif->dma_base;
912 if (!(hwif->dma_vendor1))
913 hwif->dma_vendor1 = (hwif->dma_base + 1);
914 if (!(hwif->dma_status))
915 hwif->dma_status = (hwif->dma_base + 2);
916 if (!(hwif->dma_vendor3))
917 hwif->dma_vendor3 = (hwif->dma_base + 3);
918 if (!(hwif->dma_prdtable))
919 hwif->dma_prdtable = (hwif->dma_base + 4);
920
921 if (!hwif->ide_dma_off_quietly)
922 hwif->ide_dma_off_quietly = &__ide_dma_off_quietly;
923 if (!hwif->ide_dma_host_off)
924 hwif->ide_dma_host_off = &__ide_dma_host_off;
925 if (!hwif->ide_dma_on)
926 hwif->ide_dma_on = &__ide_dma_on;
927 if (!hwif->ide_dma_host_on)
928 hwif->ide_dma_host_on = &__ide_dma_host_on;
929 if (!hwif->ide_dma_check)
930 hwif->ide_dma_check = &__ide_dma_check;
931 if (!hwif->dma_setup)
932 hwif->dma_setup = &ide_dma_setup;
933 if (!hwif->dma_exec_cmd)
934 hwif->dma_exec_cmd = &ide_dma_exec_cmd;
935 if (!hwif->dma_start)
936 hwif->dma_start = &ide_dma_start;
937 if (!hwif->ide_dma_end)
938 hwif->ide_dma_end = &__ide_dma_end;
939 if (!hwif->ide_dma_test_irq)
940 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
941 if (!hwif->ide_dma_timeout)
942 hwif->ide_dma_timeout = &__ide_dma_timeout;
943 if (!hwif->ide_dma_lostirq)
944 hwif->ide_dma_lostirq = &__ide_dma_lostirq;
945
946 if (hwif->chipset != ide_trm290) {
947 u8 dma_stat = hwif->INB(hwif->dma_status);
948 printk(", BIOS settings: %s:%s, %s:%s",
949 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
950 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
951 }
952 printk("\n");
953
954 if (!(hwif->dma_master))
955 BUG();
956}
957
958EXPORT_SYMBOL_GPL(ide_setup_dma);
959#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 14:43:09 -0500