diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2012-08-10 13:26:24 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2012-09-20 13:10:33 -0400 |
commit | ee93b86be118dcdec1a8e29983ed1d010c71bfee (patch) | |
tree | 4f662dde9f72811d6c97c624a285da6943f77070 /drivers/gpu | |
parent | 95f5a3acfaf6f5672420398e01ca32220b36bb90 (diff) |
drm/radeon: remove gui_idle interrupt infrastructure
It was only used for dynpm, but has been replaced with
a better implementation using fences. Remove it.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_irq_kms.c | 33 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 5 |
8 files changed, 0 insertions, 91 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index bea39e7d9a51..90366e309495 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -2528,10 +2528,6 @@ int evergreen_irq_set(struct radeon_device *rdev) | |||
2528 | DRM_DEBUG("evergreen_irq_set: hdmi 5\n"); | 2528 | DRM_DEBUG("evergreen_irq_set: hdmi 5\n"); |
2529 | afmt6 |= AFMT_AZ_FORMAT_WTRIG_MASK; | 2529 | afmt6 |= AFMT_AZ_FORMAT_WTRIG_MASK; |
2530 | } | 2530 | } |
2531 | if (rdev->irq.gui_idle) { | ||
2532 | DRM_DEBUG("gui idle\n"); | ||
2533 | grbm_int_cntl |= GUI_IDLE_INT_ENABLE; | ||
2534 | } | ||
2535 | 2531 | ||
2536 | if (rdev->family >= CHIP_CAYMAN) { | 2532 | if (rdev->family >= CHIP_CAYMAN) { |
2537 | cayman_cp_int_cntl_setup(rdev, 0, cp_int_cntl); | 2533 | cayman_cp_int_cntl_setup(rdev, 0, cp_int_cntl); |
@@ -3066,7 +3062,6 @@ restart_ih: | |||
3066 | break; | 3062 | break; |
3067 | case 233: /* GUI IDLE */ | 3063 | case 233: /* GUI IDLE */ |
3068 | DRM_DEBUG("IH: GUI idle\n"); | 3064 | DRM_DEBUG("IH: GUI idle\n"); |
3069 | wake_up(&rdev->irq.idle_queue); | ||
3070 | break; | 3065 | break; |
3071 | default: | 3066 | default: |
3072 | DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); | 3067 | DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 163c33e1a1d6..ff3a444836d4 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -700,9 +700,6 @@ int r100_irq_set(struct radeon_device *rdev) | |||
700 | if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { | 700 | if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { |
701 | tmp |= RADEON_SW_INT_ENABLE; | 701 | tmp |= RADEON_SW_INT_ENABLE; |
702 | } | 702 | } |
703 | if (rdev->irq.gui_idle) { | ||
704 | tmp |= RADEON_GUI_IDLE_MASK; | ||
705 | } | ||
706 | if (rdev->irq.crtc_vblank_int[0] || | 703 | if (rdev->irq.crtc_vblank_int[0] || |
707 | atomic_read(&rdev->irq.pflip[0])) { | 704 | atomic_read(&rdev->irq.pflip[0])) { |
708 | tmp |= RADEON_CRTC_VBLANK_MASK; | 705 | tmp |= RADEON_CRTC_VBLANK_MASK; |
@@ -739,12 +736,6 @@ static uint32_t r100_irq_ack(struct radeon_device *rdev) | |||
739 | RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT | | 736 | RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT | |
740 | RADEON_FP_DETECT_STAT | RADEON_FP2_DETECT_STAT; | 737 | RADEON_FP_DETECT_STAT | RADEON_FP2_DETECT_STAT; |
741 | 738 | ||
742 | /* the interrupt works, but the status bit is permanently asserted */ | ||
743 | if (rdev->irq.gui_idle && radeon_gui_idle(rdev)) { | ||
744 | if (!rdev->irq.gui_idle_acked) | ||
745 | irq_mask |= RADEON_GUI_IDLE_STAT; | ||
746 | } | ||
747 | |||
748 | if (irqs) { | 739 | if (irqs) { |
749 | WREG32(RADEON_GEN_INT_STATUS, irqs); | 740 | WREG32(RADEON_GEN_INT_STATUS, irqs); |
750 | } | 741 | } |
@@ -756,9 +747,6 @@ int r100_irq_process(struct radeon_device *rdev) | |||
756 | uint32_t status, msi_rearm; | 747 | uint32_t status, msi_rearm; |
757 | bool queue_hotplug = false; | 748 | bool queue_hotplug = false; |
758 | 749 | ||
759 | /* reset gui idle ack. the status bit is broken */ | ||
760 | rdev->irq.gui_idle_acked = false; | ||
761 | |||
762 | status = r100_irq_ack(rdev); | 750 | status = r100_irq_ack(rdev); |
763 | if (!status) { | 751 | if (!status) { |
764 | return IRQ_NONE; | 752 | return IRQ_NONE; |
@@ -771,11 +759,6 @@ int r100_irq_process(struct radeon_device *rdev) | |||
771 | if (status & RADEON_SW_INT_TEST) { | 759 | if (status & RADEON_SW_INT_TEST) { |
772 | radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); | 760 | radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); |
773 | } | 761 | } |
774 | /* gui idle interrupt */ | ||
775 | if (status & RADEON_GUI_IDLE_STAT) { | ||
776 | rdev->irq.gui_idle_acked = true; | ||
777 | wake_up(&rdev->irq.idle_queue); | ||
778 | } | ||
779 | /* Vertical blank interrupts */ | 762 | /* Vertical blank interrupts */ |
780 | if (status & RADEON_CRTC_VBLANK_STAT) { | 763 | if (status & RADEON_CRTC_VBLANK_STAT) { |
781 | if (rdev->irq.crtc_vblank_int[0]) { | 764 | if (rdev->irq.crtc_vblank_int[0]) { |
@@ -805,8 +788,6 @@ int r100_irq_process(struct radeon_device *rdev) | |||
805 | } | 788 | } |
806 | status = r100_irq_ack(rdev); | 789 | status = r100_irq_ack(rdev); |
807 | } | 790 | } |
808 | /* reset gui idle ack. the status bit is broken */ | ||
809 | rdev->irq.gui_idle_acked = false; | ||
810 | if (queue_hotplug) | 791 | if (queue_hotplug) |
811 | schedule_work(&rdev->hotplug_work); | 792 | schedule_work(&rdev->hotplug_work); |
812 | if (rdev->msi_enabled) { | 793 | if (rdev->msi_enabled) { |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index d79c639ae739..459c251991c1 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -3088,10 +3088,6 @@ int r600_irq_set(struct radeon_device *rdev) | |||
3088 | DRM_DEBUG("r600_irq_set: hdmi 0\n"); | 3088 | DRM_DEBUG("r600_irq_set: hdmi 0\n"); |
3089 | hdmi1 |= HDMI0_AZ_FORMAT_WTRIG_MASK; | 3089 | hdmi1 |= HDMI0_AZ_FORMAT_WTRIG_MASK; |
3090 | } | 3090 | } |
3091 | if (rdev->irq.gui_idle) { | ||
3092 | DRM_DEBUG("gui idle\n"); | ||
3093 | grbm_int_cntl |= GUI_IDLE_INT_ENABLE; | ||
3094 | } | ||
3095 | 3091 | ||
3096 | WREG32(CP_INT_CNTL, cp_int_cntl); | 3092 | WREG32(CP_INT_CNTL, cp_int_cntl); |
3097 | WREG32(DxMODE_INT_MASK, mode_int); | 3093 | WREG32(DxMODE_INT_MASK, mode_int); |
@@ -3475,7 +3471,6 @@ restart_ih: | |||
3475 | break; | 3471 | break; |
3476 | case 233: /* GUI IDLE */ | 3472 | case 233: /* GUI IDLE */ |
3477 | DRM_DEBUG("IH: GUI idle\n"); | 3473 | DRM_DEBUG("IH: GUI idle\n"); |
3478 | wake_up(&rdev->irq.idle_queue); | ||
3479 | break; | 3474 | break; |
3480 | default: | 3475 | default: |
3481 | DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); | 3476 | DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 59a15315ae9f..5dbd591818fe 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -566,9 +566,6 @@ struct radeon_irq { | |||
566 | atomic_t pflip[RADEON_MAX_CRTCS]; | 566 | atomic_t pflip[RADEON_MAX_CRTCS]; |
567 | wait_queue_head_t vblank_queue; | 567 | wait_queue_head_t vblank_queue; |
568 | bool hpd[RADEON_MAX_HPD_PINS]; | 568 | bool hpd[RADEON_MAX_HPD_PINS]; |
569 | bool gui_idle; | ||
570 | bool gui_idle_acked; | ||
571 | wait_queue_head_t idle_queue; | ||
572 | bool afmt[RADEON_MAX_AFMT_BLOCKS]; | 569 | bool afmt[RADEON_MAX_AFMT_BLOCKS]; |
573 | union radeon_irq_stat_regs stat_regs; | 570 | union radeon_irq_stat_regs stat_regs; |
574 | }; | 571 | }; |
@@ -583,7 +580,6 @@ void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block); | |||
583 | void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block); | 580 | void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block); |
584 | void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask); | 581 | void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask); |
585 | void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask); | 582 | void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask); |
586 | int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev); | ||
587 | 583 | ||
588 | /* | 584 | /* |
589 | * CP & rings. | 585 | * CP & rings. |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 7a3daebd732d..c78f0346dfe4 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -1013,7 +1013,6 @@ int radeon_device_init(struct radeon_device *rdev, | |||
1013 | init_rwsem(&rdev->pm.mclk_lock); | 1013 | init_rwsem(&rdev->pm.mclk_lock); |
1014 | init_rwsem(&rdev->exclusive_lock); | 1014 | init_rwsem(&rdev->exclusive_lock); |
1015 | init_waitqueue_head(&rdev->irq.vblank_queue); | 1015 | init_waitqueue_head(&rdev->irq.vblank_queue); |
1016 | init_waitqueue_head(&rdev->irq.idle_queue); | ||
1017 | r = radeon_gem_init(rdev); | 1016 | r = radeon_gem_init(rdev); |
1018 | if (r) | 1017 | if (r) |
1019 | return r; | 1018 | return r; |
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c index afaa1727abd2..c4e638d6f8af 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c | |||
@@ -99,7 +99,6 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev) | |||
99 | /* Disable *all* interrupts */ | 99 | /* Disable *all* interrupts */ |
100 | for (i = 0; i < RADEON_NUM_RINGS; i++) | 100 | for (i = 0; i < RADEON_NUM_RINGS; i++) |
101 | atomic_set(&rdev->irq.ring_int[i], 0); | 101 | atomic_set(&rdev->irq.ring_int[i], 0); |
102 | rdev->irq.gui_idle = false; | ||
103 | for (i = 0; i < RADEON_MAX_HPD_PINS; i++) | 102 | for (i = 0; i < RADEON_MAX_HPD_PINS; i++) |
104 | rdev->irq.hpd[i] = false; | 103 | rdev->irq.hpd[i] = false; |
105 | for (i = 0; i < RADEON_MAX_CRTCS; i++) { | 104 | for (i = 0; i < RADEON_MAX_CRTCS; i++) { |
@@ -147,7 +146,6 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev) | |||
147 | /* Disable *all* interrupts */ | 146 | /* Disable *all* interrupts */ |
148 | for (i = 0; i < RADEON_NUM_RINGS; i++) | 147 | for (i = 0; i < RADEON_NUM_RINGS; i++) |
149 | atomic_set(&rdev->irq.ring_int[i], 0); | 148 | atomic_set(&rdev->irq.ring_int[i], 0); |
150 | rdev->irq.gui_idle = false; | ||
151 | for (i = 0; i < RADEON_MAX_HPD_PINS; i++) | 149 | for (i = 0; i < RADEON_MAX_HPD_PINS; i++) |
152 | rdev->irq.hpd[i] = false; | 150 | rdev->irq.hpd[i] = false; |
153 | for (i = 0; i < RADEON_MAX_CRTCS; i++) { | 151 | for (i = 0; i < RADEON_MAX_CRTCS; i++) { |
@@ -457,34 +455,3 @@ void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) | |||
457 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | 455 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
458 | } | 456 | } |
459 | 457 | ||
460 | /** | ||
461 | * radeon_irq_kms_wait_gui_idle - waits for drawing engine to be idle | ||
462 | * | ||
463 | * @rdev: radeon device pointer | ||
464 | * | ||
465 | * Enabled the GUI idle interrupt and waits for it to fire (r6xx+). | ||
466 | * This is currently used to make sure the 3D engine is idle for power | ||
467 | * management, but should be replaces with proper fence waits. | ||
468 | * GUI idle interrupts don't work very well on pre-r6xx hw and it also | ||
469 | * does not take into account other aspects of the chip that may be busy. | ||
470 | * DO NOT USE GOING FORWARD. | ||
471 | */ | ||
472 | int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev) | ||
473 | { | ||
474 | unsigned long irqflags; | ||
475 | int r; | ||
476 | |||
477 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | ||
478 | rdev->irq.gui_idle = true; | ||
479 | radeon_irq_set(rdev); | ||
480 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | ||
481 | |||
482 | r = wait_event_timeout(rdev->irq.idle_queue, radeon_gui_idle(rdev), | ||
483 | msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT)); | ||
484 | |||
485 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | ||
486 | rdev->irq.gui_idle = false; | ||
487 | radeon_irq_set(rdev); | ||
488 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | ||
489 | return r; | ||
490 | } | ||
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 31b84b6672b7..8f7064492e4b 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -575,9 +575,6 @@ int rs600_irq_set(struct radeon_device *rdev) | |||
575 | if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { | 575 | if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { |
576 | tmp |= S_000040_SW_INT_EN(1); | 576 | tmp |= S_000040_SW_INT_EN(1); |
577 | } | 577 | } |
578 | if (rdev->irq.gui_idle) { | ||
579 | tmp |= S_000040_GUI_IDLE(1); | ||
580 | } | ||
581 | if (rdev->irq.crtc_vblank_int[0] || | 578 | if (rdev->irq.crtc_vblank_int[0] || |
582 | atomic_read(&rdev->irq.pflip[0])) { | 579 | atomic_read(&rdev->irq.pflip[0])) { |
583 | mode_int |= S_006540_D1MODE_VBLANK_INT_MASK(1); | 580 | mode_int |= S_006540_D1MODE_VBLANK_INT_MASK(1); |
@@ -610,12 +607,6 @@ static inline u32 rs600_irq_ack(struct radeon_device *rdev) | |||
610 | uint32_t irq_mask = S_000044_SW_INT(1); | 607 | uint32_t irq_mask = S_000044_SW_INT(1); |
611 | u32 tmp; | 608 | u32 tmp; |
612 | 609 | ||
613 | /* the interrupt works, but the status bit is permanently asserted */ | ||
614 | if (rdev->irq.gui_idle && radeon_gui_idle(rdev)) { | ||
615 | if (!rdev->irq.gui_idle_acked) | ||
616 | irq_mask |= S_000044_GUI_IDLE_STAT(1); | ||
617 | } | ||
618 | |||
619 | if (G_000044_DISPLAY_INT_STAT(irqs)) { | 610 | if (G_000044_DISPLAY_INT_STAT(irqs)) { |
620 | rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); | 611 | rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); |
621 | if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { | 612 | if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { |
@@ -675,9 +666,6 @@ int rs600_irq_process(struct radeon_device *rdev) | |||
675 | bool queue_hotplug = false; | 666 | bool queue_hotplug = false; |
676 | bool queue_hdmi = false; | 667 | bool queue_hdmi = false; |
677 | 668 | ||
678 | /* reset gui idle ack. the status bit is broken */ | ||
679 | rdev->irq.gui_idle_acked = false; | ||
680 | |||
681 | status = rs600_irq_ack(rdev); | 669 | status = rs600_irq_ack(rdev); |
682 | if (!status && | 670 | if (!status && |
683 | !rdev->irq.stat_regs.r500.disp_int && | 671 | !rdev->irq.stat_regs.r500.disp_int && |
@@ -691,11 +679,6 @@ int rs600_irq_process(struct radeon_device *rdev) | |||
691 | if (G_000044_SW_INT(status)) { | 679 | if (G_000044_SW_INT(status)) { |
692 | radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); | 680 | radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); |
693 | } | 681 | } |
694 | /* GUI idle */ | ||
695 | if (G_000040_GUI_IDLE(status)) { | ||
696 | rdev->irq.gui_idle_acked = true; | ||
697 | wake_up(&rdev->irq.idle_queue); | ||
698 | } | ||
699 | /* Vertical blank interrupts */ | 682 | /* Vertical blank interrupts */ |
700 | if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { | 683 | if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { |
701 | if (rdev->irq.crtc_vblank_int[0]) { | 684 | if (rdev->irq.crtc_vblank_int[0]) { |
@@ -729,8 +712,6 @@ int rs600_irq_process(struct radeon_device *rdev) | |||
729 | } | 712 | } |
730 | status = rs600_irq_ack(rdev); | 713 | status = rs600_irq_ack(rdev); |
731 | } | 714 | } |
732 | /* reset gui idle ack. the status bit is broken */ | ||
733 | rdev->irq.gui_idle_acked = false; | ||
734 | if (queue_hotplug) | 715 | if (queue_hotplug) |
735 | schedule_work(&rdev->hotplug_work); | 716 | schedule_work(&rdev->hotplug_work); |
736 | if (queue_hdmi) | 717 | if (queue_hdmi) |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 0139e227e3c7..3feff33e9d7f 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -3199,10 +3199,6 @@ int si_irq_set(struct radeon_device *rdev) | |||
3199 | DRM_DEBUG("si_irq_set: hpd 6\n"); | 3199 | DRM_DEBUG("si_irq_set: hpd 6\n"); |
3200 | hpd6 |= DC_HPDx_INT_EN; | 3200 | hpd6 |= DC_HPDx_INT_EN; |
3201 | } | 3201 | } |
3202 | if (rdev->irq.gui_idle) { | ||
3203 | DRM_DEBUG("gui idle\n"); | ||
3204 | grbm_int_cntl |= GUI_IDLE_INT_ENABLE; | ||
3205 | } | ||
3206 | 3202 | ||
3207 | WREG32(CP_INT_CNTL_RING0, cp_int_cntl); | 3203 | WREG32(CP_INT_CNTL_RING0, cp_int_cntl); |
3208 | WREG32(CP_INT_CNTL_RING1, cp_int_cntl1); | 3204 | WREG32(CP_INT_CNTL_RING1, cp_int_cntl1); |
@@ -3658,7 +3654,6 @@ restart_ih: | |||
3658 | break; | 3654 | break; |
3659 | case 233: /* GUI IDLE */ | 3655 | case 233: /* GUI IDLE */ |
3660 | DRM_DEBUG("IH: GUI idle\n"); | 3656 | DRM_DEBUG("IH: GUI idle\n"); |
3661 | wake_up(&rdev->irq.idle_queue); | ||
3662 | break; | 3657 | break; |
3663 | default: | 3658 | default: |
3664 | DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); | 3659 | DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); |