diff options
author | Keith Packard <keithp@keithp.com> | 2011-09-28 19:23:51 -0400 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2011-09-30 19:23:46 -0400 |
commit | 97af61f57e03a39afa309d1c8a0d8fb9331e2f89 (patch) | |
tree | 052af6b12f186f0b499c74110560c752c4dcf9fe /drivers/gpu | |
parent | 1c0ae80a5e2893a3a3ed9582e46249ff559d2739 (diff) |
drm/i915: Check for eDP inside edp panel on/off funcs
Cleans up code dealing with eDP a bit. Remove redundant checks in
callers
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 9c2158c9c137..f80ff327d873 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -832,6 +832,8 @@ static void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp) | |||
832 | struct drm_i915_private *dev_priv = dev->dev_private; | 832 | struct drm_i915_private *dev_priv = dev->dev_private; |
833 | u32 pp; | 833 | u32 pp; |
834 | 834 | ||
835 | if (!is_edp(intel_dp)) | ||
836 | return; | ||
835 | /* | 837 | /* |
836 | * If the panel wasn't on, make sure there's not a currently | 838 | * If the panel wasn't on, make sure there's not a currently |
837 | * active PP sequence before enabling AUX VDD. | 839 | * active PP sequence before enabling AUX VDD. |
@@ -853,6 +855,8 @@ static void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp) | |||
853 | struct drm_i915_private *dev_priv = dev->dev_private; | 855 | struct drm_i915_private *dev_priv = dev->dev_private; |
854 | u32 pp; | 856 | u32 pp; |
855 | 857 | ||
858 | if (!is_edp(intel_dp)) | ||
859 | return; | ||
856 | pp = I915_READ(PCH_PP_CONTROL); | 860 | pp = I915_READ(PCH_PP_CONTROL); |
857 | pp &= ~PANEL_UNLOCK_MASK; | 861 | pp &= ~PANEL_UNLOCK_MASK; |
858 | pp |= PANEL_UNLOCK_REGS; | 862 | pp |= PANEL_UNLOCK_REGS; |
@@ -871,6 +875,8 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp) | |||
871 | struct drm_i915_private *dev_priv = dev->dev_private; | 875 | struct drm_i915_private *dev_priv = dev->dev_private; |
872 | u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_STATE_ON_IDLE; | 876 | u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_STATE_ON_IDLE; |
873 | 877 | ||
878 | if (!is_edp(intel_dp)) | ||
879 | return; | ||
874 | if (I915_READ(PCH_PP_STATUS) & PP_ON) | 880 | if (I915_READ(PCH_PP_STATUS) & PP_ON) |
875 | return true; | 881 | return true; |
876 | 882 | ||
@@ -905,6 +911,8 @@ static void ironlake_edp_panel_off (struct drm_device *dev) | |||
905 | u32 pp, idle_off_mask = PP_ON | PP_SEQUENCE_MASK | | 911 | u32 pp, idle_off_mask = PP_ON | PP_SEQUENCE_MASK | |
906 | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK; | 912 | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK; |
907 | 913 | ||
914 | if (!is_edp(intel_dp)) | ||
915 | return; | ||
908 | pp = I915_READ(PCH_PP_CONTROL); | 916 | pp = I915_READ(PCH_PP_CONTROL); |
909 | pp &= ~PANEL_UNLOCK_MASK; | 917 | pp &= ~PANEL_UNLOCK_MASK; |
910 | pp |= PANEL_UNLOCK_REGS; | 918 | pp |= PANEL_UNLOCK_REGS; |
@@ -1041,15 +1049,12 @@ static void intel_dp_commit(struct drm_encoder *encoder) | |||
1041 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); | 1049 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); |
1042 | struct drm_device *dev = encoder->dev; | 1050 | struct drm_device *dev = encoder->dev; |
1043 | 1051 | ||
1044 | if (is_edp(intel_dp)) | 1052 | ironlake_edp_panel_vdd_on(intel_dp); |
1045 | ironlake_edp_panel_vdd_on(intel_dp); | ||
1046 | 1053 | ||
1047 | intel_dp_start_link_train(intel_dp); | 1054 | intel_dp_start_link_train(intel_dp); |
1048 | 1055 | ||
1049 | if (is_edp(intel_dp)) { | 1056 | ironlake_edp_panel_on(intel_dp); |
1050 | ironlake_edp_panel_on(intel_dp); | 1057 | ironlake_edp_panel_vdd_off(intel_dp); |
1051 | ironlake_edp_panel_vdd_off(intel_dp); | ||
1052 | } | ||
1053 | 1058 | ||
1054 | intel_dp_complete_link_train(intel_dp); | 1059 | intel_dp_complete_link_train(intel_dp); |
1055 | 1060 | ||
@@ -1072,20 +1077,16 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | |||
1072 | ironlake_edp_backlight_off(dev); | 1077 | ironlake_edp_backlight_off(dev); |
1073 | intel_dp_sink_dpms(intel_dp, mode); | 1078 | intel_dp_sink_dpms(intel_dp, mode); |
1074 | intel_dp_link_down(intel_dp); | 1079 | intel_dp_link_down(intel_dp); |
1075 | if (is_edp(intel_dp)) | 1080 | ironlake_edp_panel_off(dev); |
1076 | ironlake_edp_panel_off(dev); | ||
1077 | if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) | 1081 | if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) |
1078 | ironlake_edp_pll_off(encoder); | 1082 | ironlake_edp_pll_off(encoder); |
1079 | } else { | 1083 | } else { |
1080 | if (is_edp(intel_dp)) | 1084 | ironlake_edp_panel_vdd_on(intel_dp); |
1081 | ironlake_edp_panel_vdd_on(intel_dp); | ||
1082 | intel_dp_sink_dpms(intel_dp, mode); | 1085 | intel_dp_sink_dpms(intel_dp, mode); |
1083 | if (!(dp_reg & DP_PORT_EN)) { | 1086 | if (!(dp_reg & DP_PORT_EN)) { |
1084 | intel_dp_start_link_train(intel_dp); | 1087 | intel_dp_start_link_train(intel_dp); |
1085 | if (is_edp(intel_dp)) { | 1088 | ironlake_edp_panel_on(intel_dp); |
1086 | ironlake_edp_panel_on(intel_dp); | 1089 | ironlake_edp_panel_vdd_off(intel_dp); |
1087 | ironlake_edp_panel_vdd_off(intel_dp); | ||
1088 | } | ||
1089 | intel_dp_complete_link_train(intel_dp); | 1090 | intel_dp_complete_link_train(intel_dp); |
1090 | } | 1091 | } |
1091 | if (is_edp(intel_dp)) | 1092 | if (is_edp(intel_dp)) |