diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2013-03-28 16:57:19 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-02 04:37:31 -0400 |
commit | 8a5c2ae753c588bcb2a4e38d1c6a39865dbf1ff3 (patch) | |
tree | a1ac52176dfe6fd475e0de2d025d851f0161e34b /drivers/gpu/drm | |
parent | d42264b1fcc0f7b2fc472af6694b098e86e63be0 (diff) |
drm/i915: fix ILK GPU reset for render
Earlier code would leave both bits set, so any reset after the first
would only reset media.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 0cfc778aa759..1c53438cea47 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -744,6 +744,7 @@ static int ironlake_do_reset(struct drm_device *dev) | |||
744 | int ret; | 744 | int ret; |
745 | 745 | ||
746 | gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); | 746 | gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); |
747 | gdrst &= ~GRDOM_MASK; | ||
747 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, | 748 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, |
748 | gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE); | 749 | gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE); |
749 | ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); | 750 | ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); |
@@ -752,6 +753,7 @@ static int ironlake_do_reset(struct drm_device *dev) | |||
752 | 753 | ||
753 | /* We can't reset render&media without also resetting display ... */ | 754 | /* We can't reset render&media without also resetting display ... */ |
754 | gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); | 755 | gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); |
756 | gdrst &= ~GRDOM_MASK; | ||
755 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, | 757 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, |
756 | gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE); | 758 | gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE); |
757 | return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); | 759 | return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5e91fbbedcef..95ad87c2981d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -91,6 +91,7 @@ | |||
91 | #define GRDOM_FULL (0<<2) | 91 | #define GRDOM_FULL (0<<2) |
92 | #define GRDOM_RENDER (1<<2) | 92 | #define GRDOM_RENDER (1<<2) |
93 | #define GRDOM_MEDIA (3<<2) | 93 | #define GRDOM_MEDIA (3<<2) |
94 | #define GRDOM_MASK (3<<2) | ||
94 | #define GRDOM_RESET_ENABLE (1<<0) | 95 | #define GRDOM_RESET_ENABLE (1<<0) |
95 | 96 | ||
96 | #define GEN6_MBCUNIT_SNPCR 0x900c /* for LLC config */ | 97 | #define GEN6_MBCUNIT_SNPCR 0x900c /* for LLC config */ |