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authorThomas Hellstrom <thellstrom@vmware.com>2010-10-26 15:21:47 -0400
committerDave Airlie <airlied@redhat.com>2010-10-26 21:07:46 -0400
commit135cba0dc399fdd47bd3ae305c1db75fcd77243f (patch)
tree3eedcd7c5701dfe05246aca3479ab7396169f2e7 /drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
parent8f895da57da80b307efa2f94b5d4caf801e959a5 (diff)
vmwgfx: Implement a proper GMR eviction mechanism
Use Ben's new range manager hooks to implement a manager for GMRs that manages ids rather than ranges. This means we can use the standard TTM code for binding, unbinding and eviction. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/vmwgfx/vmwgfx_drv.c')
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index f2942b3c59c0..d0ef624fbdcc 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -260,13 +260,11 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
260 idr_init(&dev_priv->context_idr); 260 idr_init(&dev_priv->context_idr);
261 idr_init(&dev_priv->surface_idr); 261 idr_init(&dev_priv->surface_idr);
262 idr_init(&dev_priv->stream_idr); 262 idr_init(&dev_priv->stream_idr);
263 ida_init(&dev_priv->gmr_ida);
264 mutex_init(&dev_priv->init_mutex); 263 mutex_init(&dev_priv->init_mutex);
265 init_waitqueue_head(&dev_priv->fence_queue); 264 init_waitqueue_head(&dev_priv->fence_queue);
266 init_waitqueue_head(&dev_priv->fifo_queue); 265 init_waitqueue_head(&dev_priv->fifo_queue);
267 atomic_set(&dev_priv->fence_queue_waiters, 0); 266 atomic_set(&dev_priv->fence_queue_waiters, 0);
268 atomic_set(&dev_priv->fifo_queue_waiters, 0); 267 atomic_set(&dev_priv->fifo_queue_waiters, 0);
269 INIT_LIST_HEAD(&dev_priv->gmr_lru);
270 268
271 dev_priv->io_start = pci_resource_start(dev->pdev, 0); 269 dev_priv->io_start = pci_resource_start(dev->pdev, 0);
272 dev_priv->vram_start = pci_resource_start(dev->pdev, 1); 270 dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
@@ -341,6 +339,14 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
341 goto out_err2; 339 goto out_err2;
342 } 340 }
343 341
342 dev_priv->has_gmr = true;
343 if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
344 dev_priv->max_gmr_ids) != 0) {
345 DRM_INFO("No GMR memory available. "
346 "Graphics memory resources are very limited.\n");
347 dev_priv->has_gmr = false;
348 }
349
344 dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start, 350 dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
345 dev_priv->mmio_size, DRM_MTRR_WC); 351 dev_priv->mmio_size, DRM_MTRR_WC);
346 352
@@ -440,13 +446,14 @@ out_err4:
440out_err3: 446out_err3:
441 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start, 447 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
442 dev_priv->mmio_size, DRM_MTRR_WC); 448 dev_priv->mmio_size, DRM_MTRR_WC);
449 if (dev_priv->has_gmr)
450 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
443 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM); 451 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
444out_err2: 452out_err2:
445 (void)ttm_bo_device_release(&dev_priv->bdev); 453 (void)ttm_bo_device_release(&dev_priv->bdev);
446out_err1: 454out_err1:
447 vmw_ttm_global_release(dev_priv); 455 vmw_ttm_global_release(dev_priv);
448out_err0: 456out_err0:
449 ida_destroy(&dev_priv->gmr_ida);
450 idr_destroy(&dev_priv->surface_idr); 457 idr_destroy(&dev_priv->surface_idr);
451 idr_destroy(&dev_priv->context_idr); 458 idr_destroy(&dev_priv->context_idr);
452 idr_destroy(&dev_priv->stream_idr); 459 idr_destroy(&dev_priv->stream_idr);
@@ -478,10 +485,11 @@ static int vmw_driver_unload(struct drm_device *dev)
478 iounmap(dev_priv->mmio_virt); 485 iounmap(dev_priv->mmio_virt);
479 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start, 486 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
480 dev_priv->mmio_size, DRM_MTRR_WC); 487 dev_priv->mmio_size, DRM_MTRR_WC);
488 if (dev_priv->has_gmr)
489 (void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
481 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM); 490 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
482 (void)ttm_bo_device_release(&dev_priv->bdev); 491 (void)ttm_bo_device_release(&dev_priv->bdev);
483 vmw_ttm_global_release(dev_priv); 492 vmw_ttm_global_release(dev_priv);
484 ida_destroy(&dev_priv->gmr_ida);
485 idr_destroy(&dev_priv->surface_idr); 493 idr_destroy(&dev_priv->surface_idr);
486 idr_destroy(&dev_priv->context_idr); 494 idr_destroy(&dev_priv->context_idr);
487 idr_destroy(&dev_priv->stream_idr); 495 idr_destroy(&dev_priv->stream_idr);