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authorAlex Deucher <alexdeucher@gmail.com>2010-03-08 12:55:16 -0500
committerDave Airlie <airlied@redhat.com>2010-03-14 19:56:46 -0400
commit86cb2bbfda2cf402aee46779ee90bbb7d915482b (patch)
tree341bcd42fe9bc49498905f97f2e61b2def21f22b /drivers/gpu/drm/radeon/radeon_atombios.c
parentb792210e7d1f9fb102061e2016da96cf2ad5cdbd (diff)
drm/radeon/kms: use lcd pll limits when available
The bios has alternate pll output limits for LCD panels. If available, use these for pll divider calculations. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_atombios.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 93783b15c81d..e4540b2b859c 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -887,6 +887,20 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
887 p1pll->pll_out_max = 887 p1pll->pll_out_max =
888 le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output); 888 le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output);
889 889
890 if (crev >= 4) {
891 p1pll->lcd_pll_out_min =
892 le16_to_cpu(firmware_info->info_14.usLcdMinPixelClockPLL_Output) * 100;
893 if (p1pll->lcd_pll_out_min == 0)
894 p1pll->lcd_pll_out_min = p1pll->pll_out_min;
895 p1pll->lcd_pll_out_max =
896 le16_to_cpu(firmware_info->info_14.usLcdMaxPixelClockPLL_Output) * 100;
897 if (p1pll->lcd_pll_out_max == 0)
898 p1pll->lcd_pll_out_max = p1pll->pll_out_max;
899 } else {
900 p1pll->lcd_pll_out_min = p1pll->pll_out_min;
901 p1pll->lcd_pll_out_max = p1pll->pll_out_max;
902 }
903
890 if (p1pll->pll_out_min == 0) { 904 if (p1pll->pll_out_min == 0) {
891 if (ASIC_IS_AVIVO(rdev)) 905 if (ASIC_IS_AVIVO(rdev))
892 p1pll->pll_out_min = 64800; 906 p1pll->pll_out_min = 64800;