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authorChristian König <deathsimple@vodafone.de>2011-09-15 13:02:22 -0400
committerDave Airlie <airlied@redhat.com>2011-12-20 14:49:36 -0500
commit15d3332f31afd571a6d23971dbc8d8db2856e661 (patch)
tree71610dd9dd6c455fe2f4ec3639691b10388d1dab /drivers/gpu/drm/radeon/radeon_asic.h
parent7465280c076d6440e5908c158c83b542dc063a30 (diff)
drm/radeon/kms: add support for semaphores v3
They are used to sync between rings, while fences sync between a ring and the cpu. v2 Fix radeon_semaphore_driver_fini when no semaphore were allocated. v3 Initialize list early on to avoid issue in case or early error Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 59914842a729..6b589d5ae436 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -69,6 +69,9 @@ int r100_irq_set(struct radeon_device *rdev);
69int r100_irq_process(struct radeon_device *rdev); 69int r100_irq_process(struct radeon_device *rdev);
70void r100_fence_ring_emit(struct radeon_device *rdev, 70void r100_fence_ring_emit(struct radeon_device *rdev,
71 struct radeon_fence *fence); 71 struct radeon_fence *fence);
72void r100_semaphore_ring_emit(struct radeon_device *rdev,
73 struct radeon_semaphore *semaphore,
74 unsigned ring, bool emit_wait);
72int r100_cs_parse(struct radeon_cs_parser *p); 75int r100_cs_parse(struct radeon_cs_parser *p);
73void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 76void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
74uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); 77uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg);
@@ -300,6 +303,9 @@ void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
300int r600_cs_parse(struct radeon_cs_parser *p); 303int r600_cs_parse(struct radeon_cs_parser *p);
301void r600_fence_ring_emit(struct radeon_device *rdev, 304void r600_fence_ring_emit(struct radeon_device *rdev,
302 struct radeon_fence *fence); 305 struct radeon_fence *fence);
306void r600_semaphore_ring_emit(struct radeon_device *rdev,
307 struct radeon_semaphore *semaphore,
308 unsigned ring, bool emit_wait);
303bool r600_gpu_is_lockup(struct radeon_device *rdev); 309bool r600_gpu_is_lockup(struct radeon_device *rdev);
304int r600_asic_reset(struct radeon_device *rdev); 310int r600_asic_reset(struct radeon_device *rdev);
305int r600_set_surface_reg(struct radeon_device *rdev, int reg, 311int r600_set_surface_reg(struct radeon_device *rdev, int reg,