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authorLauri Kasanen <cand@gmx.com>2012-07-31 10:41:46 -0400
committerAlex Deucher <alexander.deucher@amd.com>2012-09-20 13:10:41 -0400
commite9e2fbe975a1938b1acadb94ac7d5934298974ac (patch)
tree3dcab3d14e203deb405bfe7be0399719fbc60b6e /drivers/gpu/drm/radeon/r100.c
parent1109ca09b9e2f2766d64d037a88ea8816559b3b3 (diff)
drm/radeon: Remove unused functions
This applies on top of drm/radeon: Mark all possible functions / structs as static. Signed-off-by: Lauri Kasanen <cand@gmx.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r--drivers/gpu/drm/radeon/r100.c44
1 files changed, 0 insertions, 44 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index cd11760f2395..f3892efcf7f4 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -2528,50 +2528,6 @@ static void r100_errata(struct radeon_device *rdev)
2528 } 2528 }
2529} 2529}
2530 2530
2531/* Wait for vertical sync on primary CRTC */
2532static void r100_gpu_wait_for_vsync(struct radeon_device *rdev)
2533{
2534 uint32_t crtc_gen_cntl, tmp;
2535 int i;
2536
2537 crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL);
2538 if ((crtc_gen_cntl & RADEON_CRTC_DISP_REQ_EN_B) ||
2539 !(crtc_gen_cntl & RADEON_CRTC_EN)) {
2540 return;
2541 }
2542 /* Clear the CRTC_VBLANK_SAVE bit */
2543 WREG32(RADEON_CRTC_STATUS, RADEON_CRTC_VBLANK_SAVE_CLEAR);
2544 for (i = 0; i < rdev->usec_timeout; i++) {
2545 tmp = RREG32(RADEON_CRTC_STATUS);
2546 if (tmp & RADEON_CRTC_VBLANK_SAVE) {
2547 return;
2548 }
2549 DRM_UDELAY(1);
2550 }
2551}
2552
2553/* Wait for vertical sync on secondary CRTC */
2554static void r100_gpu_wait_for_vsync2(struct radeon_device *rdev)
2555{
2556 uint32_t crtc2_gen_cntl, tmp;
2557 int i;
2558
2559 crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
2560 if ((crtc2_gen_cntl & RADEON_CRTC2_DISP_REQ_EN_B) ||
2561 !(crtc2_gen_cntl & RADEON_CRTC2_EN))
2562 return;
2563
2564 /* Clear the CRTC_VBLANK_SAVE bit */
2565 WREG32(RADEON_CRTC2_STATUS, RADEON_CRTC2_VBLANK_SAVE_CLEAR);
2566 for (i = 0; i < rdev->usec_timeout; i++) {
2567 tmp = RREG32(RADEON_CRTC2_STATUS);
2568 if (tmp & RADEON_CRTC2_VBLANK_SAVE) {
2569 return;
2570 }
2571 DRM_UDELAY(1);
2572 }
2573}
2574
2575static int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n) 2531static int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n)
2576{ 2532{
2577 unsigned i; 2533 unsigned i;