diff options
author | Andi Kleen <ak@linux.intel.com> | 2011-10-13 19:08:41 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2011-10-18 04:44:20 -0400 |
commit | 488479ebcbdfabbc4d2ae3fab13971bba3ced605 (patch) | |
tree | 68f3921349cd17d510b8f8566cb1fb92a9e0c28b /drivers/gpu/drm/radeon/evergreen_cs.c | |
parent | 1c482ab3596b8ee4c635926b35ee88ad56ba2f9c (diff) |
drm/radeon: Drop inlines from evergreen_cs.c / r600_cs.c
Fixes
evergreen_cs_parse 4080 23124 +19044
and others compared to a non force inline kernel.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen_cs.c')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen_cs.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index a134790903d3..35dce993c8f8 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c | |||
@@ -122,7 +122,7 @@ static void evergreen_cs_track_init(struct evergreen_cs_track *track) | |||
122 | track->db_s_write_bo = NULL; | 122 | track->db_s_write_bo = NULL; |
123 | } | 123 | } |
124 | 124 | ||
125 | static inline int evergreen_cs_track_validate_cb(struct radeon_cs_parser *p, int i) | 125 | static int evergreen_cs_track_validate_cb(struct radeon_cs_parser *p, int i) |
126 | { | 126 | { |
127 | /* XXX fill in */ | 127 | /* XXX fill in */ |
128 | return 0; | 128 | return 0; |
@@ -242,7 +242,7 @@ static int evergreen_cs_packet_next_reloc(struct radeon_cs_parser *p, | |||
242 | * Check next packet is relocation packet3, do bo validation and compute | 242 | * Check next packet is relocation packet3, do bo validation and compute |
243 | * GPU offset using the provided start. | 243 | * GPU offset using the provided start. |
244 | **/ | 244 | **/ |
245 | static inline int evergreen_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p) | 245 | static int evergreen_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p) |
246 | { | 246 | { |
247 | struct radeon_cs_packet p3reloc; | 247 | struct radeon_cs_packet p3reloc; |
248 | int r; | 248 | int r; |
@@ -414,7 +414,7 @@ static int evergreen_cs_parse_packet0(struct radeon_cs_parser *p, | |||
414 | * if register is safe. If register is not flag as safe this function | 414 | * if register is safe. If register is not flag as safe this function |
415 | * will test it against a list of register needind special handling. | 415 | * will test it against a list of register needind special handling. |
416 | */ | 416 | */ |
417 | static inline int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) | 417 | static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) |
418 | { | 418 | { |
419 | struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track; | 419 | struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track; |
420 | struct radeon_cs_reloc *reloc; | 420 | struct radeon_cs_reloc *reloc; |
@@ -990,7 +990,7 @@ static inline int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u3 | |||
990 | * This function will check that the resource has valid field and that | 990 | * This function will check that the resource has valid field and that |
991 | * the texture and mipmap bo object are big enough to cover this resource. | 991 | * the texture and mipmap bo object are big enough to cover this resource. |
992 | */ | 992 | */ |
993 | static inline int evergreen_check_texture_resource(struct radeon_cs_parser *p, u32 idx, | 993 | static int evergreen_check_texture_resource(struct radeon_cs_parser *p, u32 idx, |
994 | struct radeon_bo *texture, | 994 | struct radeon_bo *texture, |
995 | struct radeon_bo *mipmap) | 995 | struct radeon_bo *mipmap) |
996 | { | 996 | { |