drm/nvc0/fb: slightly improve PMFB intr handling, move out of nvc0_graph.c

I'm still not certain how to determine the number of SUBPs are present on
a given board.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

2 files changed, 27 insertions, 18 deletions

diff --git a/drivers/gpu/drm/nouveau/nvc0_fb.c b/drivers/gpu/drm/nouveau/nvc0_fb.c
index 08e6b118f021..5bf55038fd92 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fb.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fb.c
@@ -32,6 +32,30 @@ struct nvc0_fb_priv {
         dma_addr_t r100c10;
 };
 
+static inline void
+nvc0_mfb_subp_isr(struct drm_device *dev, int unit, int subp)
+{
+        u32 subp_base = 0x141000 + (unit * 0x2000) + (subp * 0x400);
+        u32 stat = nv_rd32(dev, subp_base + 0x020);
+
+        if (stat) {
+                NV_INFO(dev, "PMFB%d_SUBP%d: 0x%08x\n", unit, subp, stat);
+                nv_wr32(dev, subp_base + 0x020, stat);
+        }
+}
+
+static void
+nvc0_mfb_isr(struct drm_device *dev)
+{
+        u32 units = nv_rd32(dev, 0x00017c);
+        while (units) {
+                u32 subp, unit = ffs(units) - 1;
+                for (subp = 0; subp < 2; subp++)
+                        nvc0_mfb_subp_isr(dev, unit, subp);
+                units &= ~(1 << unit);
+        }
+}
+
 static void
 nvc0_fb_destroy(struct drm_device *dev)
 {
@@ -39,6 +63,8 @@ nvc0_fb_destroy(struct drm_device *dev)
         struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
         struct nvc0_fb_priv *priv = pfb->priv;
 
+        nouveau_irq_unregister(dev, 25);
+
         if (priv->r100c10_page) {
                 pci_unmap_page(dev->pdev, priv->r100c10, PAGE_SIZE,
                                PCI_DMA_BIDIRECTIONAL);
@@ -74,6 +100,7 @@ nvc0_fb_create(struct drm_device *dev)
                 return -EFAULT;
         }
 
+        nouveau_irq_register(dev, 25, nvc0_mfb_isr);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c
index ecf0fb469181..4b8d0b3f7d2b 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.c
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.c
@@ -700,22 +700,6 @@ nvc0_graph_isr(struct drm_device *dev)
         nv_wr32(dev, 0x400500, 0x00010001);
 }
 
-static void
-nvc0_runk140_isr(struct drm_device *dev)
-{
-        u32 units = nv_rd32(dev, 0x00017c) & 0x1f;
-
-        while (units) {
-                u32 unit = ffs(units) - 1;
-                u32 reg = 0x140000 + unit * 0x2000;
-                u32 st0 = nv_mask(dev, reg + 0x1020, 0, 0);
-                u32 st1 = nv_mask(dev, reg + 0x1420, 0, 0);
-
-                NV_DEBUG(dev, "PRUNK140: %d 0x%08x 0x%08x\n", unit, st0, st1);
-                units &= ~(1 << unit);
-        }
-}
-
 static int
 nvc0_graph_create_fw(struct drm_device *dev, const char *fwname,
                      struct nvc0_graph_fuc *fuc)
@@ -764,7 +748,6 @@ nvc0_graph_destroy(struct drm_device *dev, int engine)
         }
 
         nouveau_irq_unregister(dev, 12);
-        nouveau_irq_unregister(dev, 25);
 
         nouveau_gpuobj_ref(NULL, &priv->unk4188b8);
         nouveau_gpuobj_ref(NULL, &priv->unk4188b4);
@@ -803,7 +786,6 @@ nvc0_graph_create(struct drm_device *dev)
 
         NVOBJ_ENGINE_ADD(dev, GR, &priv->base);
         nouveau_irq_register(dev, 12, nvc0_graph_isr);
-        nouveau_irq_register(dev, 25, nvc0_runk140_isr);
 
         if (nouveau_ctxfw) {
                 NV_INFO(dev, "PGRAPH: using external firmware\n");