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authorBen Skeggs <bskeggs@redhat.com>2012-07-19 18:17:34 -0400
committerBen Skeggs <bskeggs@redhat.com>2012-10-02 23:12:56 -0400
commitebb945a94bba2ce8dff7b0942ff2b3f2a52a0a69 (patch)
tree07cad59be501458e6ae1304b7c0352e322ac3387 /drivers/gpu/drm/nouveau/nvd0_display.c
parentac1499d9573f4aadd1d2beac11fe23af8ce90c24 (diff)
drm/nouveau: port all engines to new engine module format
This is a HUGE commit, but it's not nearly as bad as it looks - any problems can be isolated to a particular chipset and engine combination. It was simply too difficult to port each one at a time, the compat layers are *already* ridiculous. Most of the changes here are simply to the glue, the process for each of the engine modules was to start with a standard skeleton and copy+paste the old code into the appropriate places, fixing up variable names etc as needed. v2: Marcin Slusarz <marcin.slusarz@gmail.com> - fix find/replace bug in license header v3: Ben Skeggs <bskeggs@redhat.com> - bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and left no space for kernel's requirements during GEM pushbuf submission. - fix duplicate assignments noticed by clang v4: Marcin Slusarz <marcin.slusarz@gmail.com> - add sparse annotations to nv04_fifo_pause/nv04_fifo_start - use ioread32_native/iowrite32_native for fifo control registers v5: Ben Skeggs <bskeggs@redhat.com> - rebase on v3.6-rc4, modified to keep copy engine fix intact - nv10/fence: unmap fence bo before destroying - fixed fermi regression when using nvidia gr fuc - fixed typo in supported dma_mask checking Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvd0_display.c')
-rw-r--r--drivers/gpu/drm/nouveau/nvd0_display.c11
1 files changed, 1 insertions, 10 deletions
diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
index 2da4927b5e06..37b3f3f071d9 100644
--- a/drivers/gpu/drm/nouveau/nvd0_display.c
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -31,7 +31,6 @@
31#include "nouveau_connector.h" 31#include "nouveau_connector.h"
32#include "nouveau_encoder.h" 32#include "nouveau_encoder.h"
33#include "nouveau_crtc.h" 33#include "nouveau_crtc.h"
34#include "nouveau_dma.h"
35#include "nouveau_fb.h" 34#include "nouveau_fb.h"
36#include "nouveau_fence.h" 35#include "nouveau_fence.h"
37#include "nv50_display.h" 36#include "nv50_display.h"
@@ -1830,15 +1829,7 @@ nvd0_display_intr(struct drm_device *dev)
1830 intr &= ~0x00100000; 1829 intr &= ~0x00100000;
1831 } 1830 }
1832 1831
1833 for (i = 0; i < dev->mode_config.num_crtc; i++) { 1832 intr &= ~0x0f000000; /* vblank, handled in core */
1834 u32 mask = 0x01000000 << i;
1835 if (intr & mask) {
1836 u32 stat = nv_rd32(dev, 0x6100bc + (i * 0x800));
1837 nv_wr32(dev, 0x6100bc + (i * 0x800), stat);
1838 intr &= ~mask;
1839 }
1840 }
1841
1842 if (intr) 1833 if (intr)
1843 NV_INFO(dev, "PDISP: unknown intr 0x%08x\n", intr); 1834 NV_INFO(dev, "PDISP: unknown intr 0x%08x\n", intr);
1844} 1835}