drm/nv50: implement BAR1/BAR3 management on top of new VM code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 0 insertions, 1 deletions

diff --git a/drivers/gpu/drm/nouveau/nv50_vm.c b/drivers/gpu/drm/nouveau/nv50_vm.c
index ab6c3d0ce32e..efc63c0b0d92 100644
--- a/drivers/gpu/drm/nouveau/nv50_vm.c
+++ b/drivers/gpu/drm/nouveau/nv50_vm.c
@@ -151,7 +151,6 @@ nv50_vm_flush(struct nouveau_vm *vm)
         struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
 
         pinstmem->flush(vm->dev);
-
         nv50_vm_flush_engine(vm->dev, 6);
 }