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authorBen Skeggs <bskeggs@redhat.com>2011-02-13 18:57:35 -0500
committerBen Skeggs <bskeggs@redhat.com>2011-02-24 15:46:07 -0500
commit8f7286f8e4e80f7b868ba3d117ae900f0d207cbe (patch)
tree018804469b7bce4033b4156442c904512282fab2 /drivers/gpu/drm/nouveau/nouveau_vm.h
parent26c0c9e33a2eb44b345d22d5928d5c8b7b261226 (diff)
drm/nv50: support for compression
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_vm.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_vm.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_vm.h b/drivers/gpu/drm/nouveau/nouveau_vm.h
index 0e00264b8f49..2e06b55cfdc1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_vm.h
+++ b/drivers/gpu/drm/nouveau/nouveau_vm.h
@@ -67,7 +67,8 @@ struct nouveau_vm {
67 void (*map_pgt)(struct nouveau_gpuobj *pgd, u32 pde, 67 void (*map_pgt)(struct nouveau_gpuobj *pgd, u32 pde,
68 struct nouveau_gpuobj *pgt[2]); 68 struct nouveau_gpuobj *pgt[2]);
69 void (*map)(struct nouveau_vma *, struct nouveau_gpuobj *, 69 void (*map)(struct nouveau_vma *, struct nouveau_gpuobj *,
70 struct nouveau_mem *, u32 pte, u32 cnt, u64 phys); 70 struct nouveau_mem *, u32 pte, u32 cnt,
71 u64 phys, u64 delta);
71 void (*map_sg)(struct nouveau_vma *, struct nouveau_gpuobj *, 72 void (*map_sg)(struct nouveau_vma *, struct nouveau_gpuobj *,
72 struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *); 73 struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *);
73 void (*unmap)(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt); 74 void (*unmap)(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt);
@@ -93,7 +94,7 @@ void nouveau_vm_map_sg(struct nouveau_vma *, u64 offset, u64 length,
93void nv50_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde, 94void nv50_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde,
94 struct nouveau_gpuobj *pgt[2]); 95 struct nouveau_gpuobj *pgt[2]);
95void nv50_vm_map(struct nouveau_vma *, struct nouveau_gpuobj *, 96void nv50_vm_map(struct nouveau_vma *, struct nouveau_gpuobj *,
96 struct nouveau_mem *, u32 pte, u32 cnt, u64 phys); 97 struct nouveau_mem *, u32 pte, u32 cnt, u64 phys, u64 delta);
97void nv50_vm_map_sg(struct nouveau_vma *, struct nouveau_gpuobj *, 98void nv50_vm_map_sg(struct nouveau_vma *, struct nouveau_gpuobj *,
98 struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *); 99 struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *);
99void nv50_vm_unmap(struct nouveau_gpuobj *, u32 pte, u32 cnt); 100void nv50_vm_unmap(struct nouveau_gpuobj *, u32 pte, u32 cnt);
@@ -104,7 +105,7 @@ void nv50_vm_flush_engine(struct drm_device *, int engine);
104void nvc0_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde, 105void nvc0_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde,
105 struct nouveau_gpuobj *pgt[2]); 106 struct nouveau_gpuobj *pgt[2]);
106void nvc0_vm_map(struct nouveau_vma *, struct nouveau_gpuobj *, 107void nvc0_vm_map(struct nouveau_vma *, struct nouveau_gpuobj *,
107 struct nouveau_mem *, u32 pte, u32 cnt, u64 phys); 108 struct nouveau_mem *, u32 pte, u32 cnt, u64 phys, u64 delta);
108void nvc0_vm_map_sg(struct nouveau_vma *, struct nouveau_gpuobj *, 109void nvc0_vm_map_sg(struct nouveau_vma *, struct nouveau_gpuobj *,
109 struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *); 110 struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *);
110void nvc0_vm_unmap(struct nouveau_gpuobj *, u32 pte, u32 cnt); 111void nvc0_vm_unmap(struct nouveau_gpuobj *, u32 pte, u32 cnt);