diff options
author | Francisco Jerez <currojerez@riseup.net> | 2010-12-07 20:37:12 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2010-12-08 00:53:04 -0500 |
commit | fd70b6cd780742b97f525415bf5e4fb24a4bb6d8 (patch) | |
tree | 1f4dd8e185b53aace76c17b44b9c4bb839fc09d7 /drivers/gpu/drm/nouveau/nouveau_sgdma.c | |
parent | 60d2a88ae896ae51c76f8b15c2f4b762d5b00864 (diff) |
drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_sgdma.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_sgdma.c | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c index b57201ab538e..9a250eb53098 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c | |||
@@ -267,19 +267,15 @@ nouveau_sgdma_takedown(struct drm_device *dev) | |||
267 | nouveau_vm_put(&dev_priv->gart_info.vma); | 267 | nouveau_vm_put(&dev_priv->gart_info.vma); |
268 | } | 268 | } |
269 | 269 | ||
270 | int | 270 | uint32_t |
271 | nouveau_sgdma_get_page(struct drm_device *dev, uint32_t offset, uint32_t *page) | 271 | nouveau_sgdma_get_physical(struct drm_device *dev, uint32_t offset) |
272 | { | 272 | { |
273 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 273 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
274 | struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma; | 274 | struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma; |
275 | int pte; | 275 | int pte = (offset >> NV_CTXDMA_PAGE_SHIFT) + 2; |
276 | 276 | ||
277 | pte = (offset >> NV_CTXDMA_PAGE_SHIFT) << 2; | 277 | BUG_ON(dev_priv->card_type >= NV_50); |
278 | if (dev_priv->card_type < NV_50) { | ||
279 | *page = nv_ro32(gpuobj, (pte + 8)) & ~NV_CTXDMA_PAGE_MASK; | ||
280 | return 0; | ||
281 | } | ||
282 | 278 | ||
283 | NV_ERROR(dev, "Unimplemented on NV50\n"); | 279 | return (nv_ro32(gpuobj, 4 * pte) & ~NV_CTXDMA_PAGE_MASK) | |
284 | return -EINVAL; | 280 | (offset & NV_CTXDMA_PAGE_MASK); |
285 | } | 281 | } |