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authorBen Skeggs <bskeggs@redhat.com>2011-10-25 19:11:02 -0400
committerBen Skeggs <bskeggs@redhat.com>2011-12-21 04:01:24 -0500
commitf3fbaf34e2b1459eab248c5f0180928e7861120b (patch)
treebd5bc90f52df47630e67dfd90e707500a88f3634 /drivers/gpu/drm/nouveau/nouveau_drv.h
parentd4cca9e1fccb9f7804ddfbbc2aebff7be23faa1e (diff)
drm/nv50/pm: rewrite clock management, and switch to the new pm hooks
This area is horrifically complicated on these chipsets, and it's likely we will need at least a few more tweaks yet. Oh yes, and it's completely disabled on IGPs for the moment. From traces, things look potentially different there yet again. Sigh... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drv.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 067bda411a21..95892ce9b59c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -493,6 +493,7 @@ struct nouveau_pm_level {
493 u32 copy; 493 u32 copy;
494 u32 daemon; 494 u32 daemon;
495 u32 vdec; 495 u32 vdec;
496 u32 dom6;
496 u32 unka0; /* nva3:nvc0 */ 497 u32 unka0; /* nva3:nvc0 */
497 u32 hub01; /* nvc0- */ 498 u32 hub01; /* nvc0- */
498 u32 hub06; /* nvc0- */ 499 u32 hub06; /* nvc0- */