Merge remote-tracking branch 'airlied/drm-core-next' into drm-intel-next-queued

Backmerge of drm-next to resolve a few ugly conflicts and to get a few
fixes from 3.4-rc6 (which drm-next has already merged). Note that this
merge also restricts the stencil cache lra evict policy workaround to
snb (as it should) - I had to frob the code anyway because the
CM0_MASK_SHIFT define died in the masked bit cleanups.

We need the backmerge to get Paulo Zanoni's infoframe regression fix
for gm45 - further bugfixes from him touch the same area and would
needlessly conflict.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

11 files changed, 82 insertions, 49 deletions

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4ab57fd752dc..44a5f241b1a0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1021,11 +1021,9 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
         if (obj == NULL)
                 return -ENOENT;
 
-        down_write(&current->mm->mmap_sem);
-        addr = do_mmap(obj->filp, 0, args->size,
+        addr = vm_mmap(obj->filp, 0, args->size,
                        PROT_READ | PROT_WRITE, MAP_SHARED,
                        args->offset);
-        up_write(&current->mm->mmap_sem);
         drm_gem_object_unreference_unlocked(obj);
         if (IS_ERR((void *)addr))
                 return addr;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index a46ed26464f4..206b9bbe6979 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1121,6 +1121,12 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
                         return -EINVAL;
                 }
 
+                if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
+                        DRM_DEBUG("execbuf with %u cliprects\n",
+                                  args->num_cliprects);
+                        return -EINVAL;
+                }
+
                 cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
                                     GFP_KERNEL);
                 if (cliprects == NULL) {
@@ -1393,7 +1399,8 @@ i915_gem_execbuffer2(struct drm_device *dev, void *data,
         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
         int ret;
 
-        if (args->buffer_count < 1) {
+        if (args->buffer_count < 1 ||
+            args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
                 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
                 return -EINVAL;
         }
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 0976137ab79a..417ca99e697d 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -449,8 +449,8 @@ intel_crt_detect(struct drm_connector *connector, bool force)
 {
         struct drm_device *dev = connector->dev;
         struct intel_crt *crt = intel_attached_crt(connector);
-        struct drm_crtc *crtc;
         enum drm_connector_status status;
+        struct intel_load_detect_pipe tmp;
 
         if (I915_HAS_HOTPLUG(dev)) {
                 if (intel_crt_detect_hotplug(connector)) {
@@ -469,23 +469,16 @@ intel_crt_detect(struct drm_connector *connector, bool force)
                 return connector->status;
 
         /* for pre-945g platforms use load detect */
-        crtc = crt->base.base.crtc;
-        if (crtc && crtc->enabled) {
-                status = intel_crt_load_detect(crt);
-        } else {
-                struct intel_load_detect_pipe tmp;
-
-                if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
-                                               &tmp)) {
-                        if (intel_crt_detect_ddc(connector))
-                                status = connector_status_connected;
-                        else
-                                status = intel_crt_load_detect(crt);
-                        intel_release_load_detect_pipe(&crt->base, connector,
-                                                       &tmp);
-                } else
-                        status = connector_status_unknown;
-        }
+        if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
+                                       &tmp)) {
+                if (intel_crt_detect_ddc(connector))
+                        status = connector_status_connected;
+                else
+                        status = intel_crt_load_detect(crt);
+                intel_release_load_detect_pipe(&crt->base, connector,
+                                               &tmp);
+        } else
+                status = connector_status_unknown;
 
         return status;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e20f8042fddd..6b4139064f9c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3150,8 +3150,11 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
                         return false;
         }
 
-        /* All interlaced capable intel hw wants timings in frames. */
-        drm_mode_set_crtcinfo(adjusted_mode, 0);
+        /* All interlaced capable intel hw wants timings in frames. Note though
+         * that intel_lvds_mode_fixup does some funny tricks with the crtc
+         * timings, so we need to be careful not to clobber these.*/
+        if (!(adjusted_mode->private_flags & INTEL_MODE_CRTC_TIMINGS_SET))
+                drm_mode_set_crtcinfo(adjusted_mode, 0);
 
         return true;
 }
@@ -5441,9 +5444,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
         struct drm_device *dev = crtc->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-        int pipe = intel_crtc->pipe;
-        int dpll_reg = DPLL(pipe);
-        int dpll = I915_READ(dpll_reg);
 
         if (HAS_PCH_SPLIT(dev))
                 return;
@@ -5456,10 +5456,15 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
          * the manual case.
          */
         if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
+                int pipe = intel_crtc->pipe;
+                int dpll_reg = DPLL(pipe);
+                int dpll;
+
                 DRM_DEBUG_DRIVER("downclocking LVDS\n");
 
                 assert_panel_unlocked(dev_priv, pipe);
 
+                dpll = I915_READ(dpll_reg);
                 dpll |= DISPLAY_RATE_SELECT_FPA1;
                 I915_WRITE(dpll_reg, dpll);
                 intel_wait_for_vblank(dev, pipe);
@@ -5854,7 +5859,13 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
         intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode);
         intel_ring_emit(ring, obj->gtt_offset);
 
-        pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE;
+        /* Contrary to the suggestions in the documentation,
+         * "Enable Panel Fitter" does not seem to be required when page
+         * flipping with a non-native mode, and worse causes a normal
+         * modeset to fail.
+         * pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE;
+         */
+        pf = 0;
         pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
         intel_ring_emit(ring, pf | pipesrc);
         intel_ring_advance(ring);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cfec4842e0c4..e5ee166e2faf 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -117,6 +117,10 @@
 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
+/* This flag must be set by the encoder's mode_fixup if it changes the crtc
+ * timings in the mode to prevent the crtc fixup from overwriting them.
+ * Currently only lvds needs that. */
+#define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 
 static inline void
 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 71ef2896be96..bf8690720a0c 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -279,6 +279,8 @@ void intel_fb_restore_mode(struct drm_device *dev)
         struct drm_mode_config *config = &dev->mode_config;
         struct drm_plane *plane;
 
+        mutex_lock(&dev->mode_config.mutex);
+
         ret = drm_fb_helper_restore_fbdev_mode(&dev_priv->fbdev->helper);
         if (ret)
                 DRM_DEBUG("failed to restore crtc mode\n");
@@ -286,4 +288,6 @@ void intel_fb_restore_mode(struct drm_device *dev)
         /* Be sure to shut off any planes that may be active */
         list_for_each_entry(plane, &config->plane_list, head)
                 plane->funcs->disable_plane(plane);
+
+        mutex_unlock(&dev->mode_config.mutex);
 }
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 8d2501704182..bf218753cbaf 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -136,7 +136,7 @@ static void i9xx_write_infoframe(struct drm_encoder *encoder,
 
         val &= ~VIDEO_DIP_SELECT_MASK;
 
-        I915_WRITE(VIDEO_DIP_CTL, val | port | flags);
+        I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags);
 
         for (i = 0; i < len; i += 4) {
                 I915_WRITE(VIDEO_DIP_DATA, *data);
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 17a4630cec8a..9dee82350def 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -187,6 +187,8 @@ centre_horizontally(struct drm_display_mode *mode,
 
         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
+
+        mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 }
 
 static void
@@ -208,6 +210,8 @@ centre_vertically(struct drm_display_mode *mode,
 
         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
+
+        mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 }
 
 static inline u32 panel_fitter_scaling(u32 source, u32 target)
@@ -283,6 +287,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
         for_each_pipe(pipe)
                 I915_WRITE(BCLRPAT(pipe), 0);
 
+        drm_mode_set_crtcinfo(adjusted_mode, 0);
+
         switch (intel_lvds->fitting_mode) {
         case DRM_MODE_SCALE_CENTER:
                 /*
@@ -744,7 +750,7 @@ static const struct dmi_system_id intel_no_lvds[] = {
                 .ident = "Hewlett-Packard t5745",
                 .matches = {
                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
-                        DMI_MATCH(DMI_BOARD_NAME, "hp t5745"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
                 },
         },
         {
@@ -752,7 +758,7 @@ static const struct dmi_system_id intel_no_lvds[] = {
                 .ident = "Hewlett-Packard st5747",
                 .matches = {
                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
-                        DMI_MATCH(DMI_BOARD_NAME, "hp st5747"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
                 },
         },
         {
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index cad45ff8251b..2b2e011e9055 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -50,8 +50,6 @@ intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
         adjusted_mode->vtotal = fixed_mode->vtotal;
 
         adjusted_mode->clock = fixed_mode->clock;
-
-        drm_mode_set_crtcinfo(adjusted_mode, 0);
 }
 
 /* adjusted_mode has been preset to be the panel's fixed mode */
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 3aabe8dfe5c5..b59b6d5b7583 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -414,6 +414,16 @@ static int init_render_ring(struct intel_ring_buffer *ring)
                         return ret;
         }
 
+        if (IS_GEN6(dev)) {
+                /* From the Sandybridge PRM, volume 1 part 3, page 24:
+                 * "If this bit is set, STCunit will have LRA as replacement
+                 *  policy. [...] This bit must be reset.  LRA replacement
+                 *  policy is not supported."
+                 */
+                I915_WRITE(CACHE_MODE_0,
+                           _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB));
+        }
+
         if (INTEL_INFO(dev)->gen >= 6)
                 I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
 
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 9b3a5f999ad7..7d3f238e8265 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -745,6 +745,7 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
         uint16_t width, height;
         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
         uint16_t h_sync_offset, v_sync_offset;
+        int mode_clock;
 
         width = mode->hdisplay;
         height = mode->vdisplay;
@@ -759,7 +760,11 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
         h_sync_offset = mode->hsync_start - mode->hdisplay;
         v_sync_offset = mode->vsync_start - mode->vdisplay;
 
-        dtd->part1.clock = mode->clock / 10;
+        mode_clock = mode->clock;
+        mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
+        mode_clock /= 10;
+        dtd->part1.clock = mode_clock;
+
         dtd->part1.h_active = width & 0xff;
         dtd->part1.h_blank = h_blank_len & 0xff;
         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
@@ -1010,7 +1015,7 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
         u32 sdvox;
         struct intel_sdvo_in_out_map in_out;
-        struct intel_sdvo_dtd input_dtd;
+        struct intel_sdvo_dtd input_dtd, output_dtd;
         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
         int rate;
 
@@ -1035,20 +1040,13 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
                                           intel_sdvo->attached_output))
                 return;
 
-        /* We have tried to get input timing in mode_fixup, and filled into
-         * adjusted_mode.
-         */
-        if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
-                input_dtd = intel_sdvo->input_dtd;
-        } else {
-                /* Set the output timing to the screen */
-                if (!intel_sdvo_set_target_output(intel_sdvo,
-                                                  intel_sdvo->attached_output))
-                        return;
-
-                intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
-                (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
-        }
+        /* lvds has a special fixed output timing. */
+        if (intel_sdvo->is_lvds)
+                intel_sdvo_get_dtd_from_mode(&output_dtd,
+                                             intel_sdvo->sdvo_lvds_fixed_mode);
+        else
+                intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
+        (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
 
         /* Set the input timing to the screen. Assume always input 0. */
         if (!intel_sdvo_set_target_input(intel_sdvo))
@@ -1066,6 +1064,10 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
             !intel_sdvo_set_tv_format(intel_sdvo))
                 return;
 
+        /* We have tried to get input timing in mode_fixup, and filled into
+         * adjusted_mode.
+         */
+        intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
 
         switch (pixel_multiplier) {