diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-10-08 13:35:55 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-19 04:16:44 -0400 |
commit | 736085bcf91720fd90175c288c542c721c281bb0 (patch) | |
tree | 893e59a82d08e777bf502a904dfb46dd983a8fd9 /drivers/gpu/drm/i915/intel_dp.c | |
parent | 701394cc534a4a7883ddc4f8f82fb438b3d664ff (diff) |
drm/i915/dp: down the DP link even if the reg indicates it's already down
Since the PLL may still be on, and the training pattern may not be
correct. Fixes suspend/resume on my PCH eDP test system.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: minor merge conflict and silence the compiler]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 128c2fefd541..350c541e8e6c 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -914,8 +914,6 @@ static void intel_dp_prepare(struct drm_encoder *encoder) | |||
914 | { | 914 | { |
915 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); | 915 | struct intel_dp *intel_dp = enc_to_intel_dp(encoder); |
916 | struct drm_device *dev = encoder->dev; | 916 | struct drm_device *dev = encoder->dev; |
917 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
918 | uint32_t dp_reg = I915_READ(intel_dp->output_reg); | ||
919 | 917 | ||
920 | if (is_edp(intel_dp)) { | 918 | if (is_edp(intel_dp)) { |
921 | ironlake_edp_backlight_off(dev); | 919 | ironlake_edp_backlight_off(dev); |
@@ -925,8 +923,7 @@ static void intel_dp_prepare(struct drm_encoder *encoder) | |||
925 | else | 923 | else |
926 | ironlake_edp_pll_off(encoder); | 924 | ironlake_edp_pll_off(encoder); |
927 | } | 925 | } |
928 | if (dp_reg & DP_PORT_EN) | 926 | intel_dp_link_down(intel_dp); |
929 | intel_dp_link_down(intel_dp); | ||
930 | } | 927 | } |
931 | 928 | ||
932 | static void intel_dp_commit(struct drm_encoder *encoder) | 929 | static void intel_dp_commit(struct drm_encoder *encoder) |
@@ -956,21 +953,20 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | |||
956 | if (mode != DRM_MODE_DPMS_ON) { | 953 | if (mode != DRM_MODE_DPMS_ON) { |
957 | if (is_edp(intel_dp)) | 954 | if (is_edp(intel_dp)) |
958 | ironlake_edp_backlight_off(dev); | 955 | ironlake_edp_backlight_off(dev); |
959 | if (dp_reg & DP_PORT_EN) | 956 | intel_dp_link_down(intel_dp); |
960 | intel_dp_link_down(intel_dp); | ||
961 | if (is_edp(intel_dp)) | 957 | if (is_edp(intel_dp)) |
962 | ironlake_edp_panel_off(dev); | 958 | ironlake_edp_panel_off(dev); |
963 | if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) | 959 | if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) |
964 | ironlake_edp_pll_off(encoder); | 960 | ironlake_edp_pll_off(encoder); |
965 | } else { | 961 | } else { |
962 | if (is_edp(intel_dp)) | ||
963 | ironlake_edp_panel_on(intel_dp); | ||
966 | if (!(dp_reg & DP_PORT_EN)) { | 964 | if (!(dp_reg & DP_PORT_EN)) { |
967 | if (is_edp(intel_dp)) | ||
968 | ironlake_edp_panel_on(intel_dp); | ||
969 | intel_dp_start_link_train(intel_dp); | 965 | intel_dp_start_link_train(intel_dp); |
970 | intel_dp_complete_link_train(intel_dp); | 966 | intel_dp_complete_link_train(intel_dp); |
971 | if (is_edp(intel_dp)) | ||
972 | ironlake_edp_backlight_on(dev); | ||
973 | } | 967 | } |
968 | if (is_edp(intel_dp)) | ||
969 | ironlake_edp_backlight_on(dev); | ||
974 | } | 970 | } |
975 | intel_dp->dpms_mode = mode; | 971 | intel_dp->dpms_mode = mode; |
976 | } | 972 | } |