diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-16 19:32:17 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-21 06:19:45 -0400 |
commit | a6c45cf013a57e32ddae43dd4ac911eb4a3919fd (patch) | |
tree | 21ce3ea9dcbeb815c92eb0a17377e5061b33151c /drivers/gpu/drm/i915/intel_crt.c | |
parent | 219adae138513bae20b256f1946b9cb3b75ca05c (diff) |
drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g
Avoid confusion between i965g meaning broadwater and the gen4+ chipset
families.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_crt.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_crt.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 6d3385511663..8e484c9ac1f5 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -79,7 +79,7 @@ static int intel_crt_mode_valid(struct drm_connector *connector, | |||
79 | if (mode->clock < 25000) | 79 | if (mode->clock < 25000) |
80 | return MODE_CLOCK_LOW; | 80 | return MODE_CLOCK_LOW; |
81 | 81 | ||
82 | if (!IS_I9XX(dev)) | 82 | if (IS_GEN2(dev)) |
83 | max_clock = 350000; | 83 | max_clock = 350000; |
84 | else | 84 | else |
85 | max_clock = 400000; | 85 | max_clock = 400000; |
@@ -123,7 +123,7 @@ static void intel_crt_mode_set(struct drm_encoder *encoder, | |||
123 | * Disable separate mode multiplier used when cloning SDVO to CRT | 123 | * Disable separate mode multiplier used when cloning SDVO to CRT |
124 | * XXX this needs to be adjusted when we really are cloning | 124 | * XXX this needs to be adjusted when we really are cloning |
125 | */ | 125 | */ |
126 | if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) { | 126 | if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { |
127 | dpll_md = I915_READ(dpll_md_reg); | 127 | dpll_md = I915_READ(dpll_md_reg); |
128 | I915_WRITE(dpll_md_reg, | 128 | I915_WRITE(dpll_md_reg, |
129 | dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); | 129 | dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); |
@@ -325,7 +325,7 @@ intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder | |||
325 | /* Set the border color to purple. */ | 325 | /* Set the border color to purple. */ |
326 | I915_WRITE(bclrpat_reg, 0x500050); | 326 | I915_WRITE(bclrpat_reg, 0x500050); |
327 | 327 | ||
328 | if (IS_I9XX(dev)) { | 328 | if (!IS_GEN2(dev)) { |
329 | uint32_t pipeconf = I915_READ(pipeconf_reg); | 329 | uint32_t pipeconf = I915_READ(pipeconf_reg); |
330 | I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); | 330 | I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); |
331 | POSTING_READ(pipeconf_reg); | 331 | POSTING_READ(pipeconf_reg); |
@@ -411,7 +411,7 @@ intel_crt_detect(struct drm_connector *connector, bool force) | |||
411 | int dpms_mode; | 411 | int dpms_mode; |
412 | enum drm_connector_status status; | 412 | enum drm_connector_status status; |
413 | 413 | ||
414 | if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) { | 414 | if (I915_HAS_HOTPLUG(dev)) { |
415 | if (intel_crt_detect_hotplug(connector)) | 415 | if (intel_crt_detect_hotplug(connector)) |
416 | return connector_status_connected; | 416 | return connector_status_connected; |
417 | else | 417 | else |