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authorZou Nan hai <nanhai.zou@intel.com>2010-05-20 21:08:55 -0400
committerEric Anholt <eric@anholt.net>2010-05-26 16:24:49 -0400
commit8187a2b70e34c727a06617441f74f202b6fefaf9 (patch)
tree48622c6f95282dc0a0fa668110aac4efa6e89066 /drivers/gpu/drm/i915/i915_drv.h
parentd3301d86b4bf2bcf649982ae464211d8bcf9575a (diff)
drm/i915: introduce intel_ring_buffer structure (V2)
Introduces a more complete intel_ring_buffer structure with callbacks for setup and management of a particular ringbuffer, and converts the render ring buffer consumers to use it. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com> [anholt: Fixed up whitespace fail and rebased against prep patches] Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h80
1 files changed, 25 insertions, 55 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a39440cf1dee..6bb7933d49dc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -31,8 +31,8 @@
31#define _I915_DRV_H_ 31#define _I915_DRV_H_
32 32
33#include "i915_reg.h" 33#include "i915_reg.h"
34#include "i915_drm.h"
35#include "intel_bios.h" 34#include "intel_bios.h"
35#include "intel_ringbuffer.h"
36#include <linux/io-mapping.h> 36#include <linux/io-mapping.h>
37 37
38/* General customization: 38/* General customization:
@@ -92,16 +92,6 @@ struct drm_i915_gem_phys_object {
92 struct drm_gem_object *cur_obj; 92 struct drm_gem_object *cur_obj;
93}; 93};
94 94
95typedef struct _drm_i915_ring_buffer {
96 unsigned long Size;
97 u8 *virtual_start;
98 int head;
99 int tail;
100 int space;
101 drm_local_map_t map;
102 struct drm_gem_object *ring_obj;
103} drm_i915_ring_buffer_t;
104
105struct mem_block { 95struct mem_block {
106 struct mem_block *next; 96 struct mem_block *next;
107 struct mem_block *prev; 97 struct mem_block *prev;
@@ -244,7 +234,7 @@ typedef struct drm_i915_private {
244 void __iomem *regs; 234 void __iomem *regs;
245 235
246 struct pci_dev *bridge_dev; 236 struct pci_dev *bridge_dev;
247 drm_i915_ring_buffer_t render_ring; 237 struct intel_ring_buffer render_ring;
248 238
249 drm_dma_handle_t *status_page_dmah; 239 drm_dma_handle_t *status_page_dmah;
250 void *hw_status_page; 240 void *hw_status_page;
@@ -270,8 +260,6 @@ typedef struct drm_i915_private {
270 atomic_t irq_received; 260 atomic_t irq_received;
271 /** Protects user_irq_refcount and irq_mask_reg */ 261 /** Protects user_irq_refcount and irq_mask_reg */
272 spinlock_t user_irq_lock; 262 spinlock_t user_irq_lock;
273 /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
274 int user_irq_refcount;
275 u32 trace_irq_seqno; 263 u32 trace_irq_seqno;
276 /** Cached value of IMR to avoid reads in updating the bitfield */ 264 /** Cached value of IMR to avoid reads in updating the bitfield */
277 u32 irq_mask_reg; 265 u32 irq_mask_reg;
@@ -832,9 +820,7 @@ extern int i915_irq_emit(struct drm_device *dev, void *data,
832 struct drm_file *file_priv); 820 struct drm_file *file_priv);
833extern int i915_irq_wait(struct drm_device *dev, void *data, 821extern int i915_irq_wait(struct drm_device *dev, void *data,
834 struct drm_file *file_priv); 822 struct drm_file *file_priv);
835void i915_user_irq_get(struct drm_device *dev);
836void i915_trace_irq_get(struct drm_device *dev, u32 seqno); 823void i915_trace_irq_get(struct drm_device *dev, u32 seqno);
837void i915_user_irq_put(struct drm_device *dev);
838extern void i915_enable_interrupt (struct drm_device *dev); 824extern void i915_enable_interrupt (struct drm_device *dev);
839 825
840extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS); 826extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
@@ -853,8 +839,10 @@ extern int i915_vblank_swap(struct drm_device *dev, void *data,
853 struct drm_file *file_priv); 839 struct drm_file *file_priv);
854extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask); 840extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
855extern void i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask); 841extern void i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask);
856void ironlake_enable_graphics_irq(drm_i915_private_t *dev_priv, u32 mask); 842extern void ironlake_enable_graphics_irq(drm_i915_private_t *dev_priv,
857void ironlake_disable_graphics_irq(drm_i915_private_t *dev_priv, u32 mask); 843 u32 mask);
844extern void ironlake_disable_graphics_irq(drm_i915_private_t *dev_priv,
845 u32 mask);
858 846
859void 847void
860i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask); 848i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
@@ -962,8 +950,6 @@ void i915_gem_object_flush_write_domain(struct drm_gem_object *obj);
962 950
963void i915_gem_shrinker_init(void); 951void i915_gem_shrinker_init(void);
964void i915_gem_shrinker_exit(void); 952void i915_gem_shrinker_exit(void);
965int i915_gem_init_pipe_control(struct drm_device *dev);
966void i915_gem_cleanup_pipe_control(struct drm_device *dev);
967 953
968/* i915_gem_tiling.c */ 954/* i915_gem_tiling.c */
969void i915_gem_detect_bit_6_swizzle(struct drm_device *dev); 955void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
@@ -1014,16 +1000,6 @@ static inline void ironlake_opregion_gse_intr(struct drm_device *dev) { return;
1014static inline void opregion_enable_asle(struct drm_device *dev) { return; } 1000static inline void opregion_enable_asle(struct drm_device *dev) { return; }
1015#endif 1001#endif
1016 1002
1017/* intel_ringbuffer.c */
1018extern void i915_gem_flush(struct drm_device *dev,
1019 uint32_t invalidate_domains,
1020 uint32_t flush_domains);
1021extern int i915_dispatch_gem_execbuffer(struct drm_device *dev,
1022 struct drm_i915_gem_execbuffer2 *exec,
1023 struct drm_clip_rect *cliprects,
1024 uint64_t exec_offset);
1025extern uint32_t i915_ring_add_request(struct drm_device *dev);
1026
1027/* modesetting */ 1003/* modesetting */
1028extern void intel_modeset_init(struct drm_device *dev); 1004extern void intel_modeset_init(struct drm_device *dev);
1029extern void intel_modeset_cleanup(struct drm_device *dev); 1005extern void intel_modeset_cleanup(struct drm_device *dev);
@@ -1044,7 +1020,8 @@ extern int intel_trans_dp_port_sel (struct drm_crtc *crtc);
1044 * has access to the ring. 1020 * has access to the ring.
1045 */ 1021 */
1046#define RING_LOCK_TEST_WITH_RETURN(dev, file_priv) do { \ 1022#define RING_LOCK_TEST_WITH_RETURN(dev, file_priv) do { \
1047 if (((drm_i915_private_t *)dev->dev_private)->render_ring.ring_obj == NULL) \ 1023 if (((drm_i915_private_t *)dev->dev_private)->render_ring.gem_object \
1024 == NULL) \
1048 LOCK_TEST_WITH_RETURN(dev, file_priv); \ 1025 LOCK_TEST_WITH_RETURN(dev, file_priv); \
1049} while (0) 1026} while (0)
1050 1027
@@ -1060,32 +1037,27 @@ extern int intel_trans_dp_port_sel (struct drm_crtc *crtc);
1060 1037
1061#define I915_VERBOSE 0 1038#define I915_VERBOSE 0
1062 1039
1063#define RING_LOCALS volatile unsigned int *ring_virt__; 1040#define BEGIN_LP_RING(n) do { \
1064 1041 drm_i915_private_t *dev_priv = dev->dev_private; \
1065#define BEGIN_LP_RING(n) do { \ 1042 if (I915_VERBOSE) \
1066 int bytes__ = 4*(n); \ 1043 DRM_DEBUG(" BEGIN_LP_RING %x\n", (int)(n)); \
1067 if (I915_VERBOSE) DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \ 1044 intel_ring_begin(dev, &dev_priv->render_ring, 4*(n)); \
1068 /* a wrap must occur between instructions so pad beforehand */ \
1069 if (unlikely (dev_priv->render_ring.tail + bytes__ > dev_priv->render_ring.Size)) \
1070 i915_wrap_ring(dev); \
1071 if (unlikely (dev_priv->render_ring.space < bytes__)) \
1072 i915_wait_ring(dev, bytes__, __func__); \
1073 ring_virt__ = (unsigned int *) \
1074 (dev_priv->render_ring.virtual_start + dev_priv->render_ring.tail); \
1075 dev_priv->render_ring.tail += bytes__; \
1076 dev_priv->render_ring.tail &= dev_priv->render_ring.Size - 1; \
1077 dev_priv->render_ring.space -= bytes__; \
1078} while (0) 1045} while (0)
1079 1046
1080#define OUT_RING(n) do { \ 1047
1081 if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ 1048#define OUT_RING(x) do { \
1082 *ring_virt__++ = (n); \ 1049 drm_i915_private_t *dev_priv = dev->dev_private; \
1050 if (I915_VERBOSE) \
1051 DRM_DEBUG(" OUT_RING %x\n", (int)(x)); \
1052 intel_ring_emit(dev, &dev_priv->render_ring, x); \
1083} while (0) 1053} while (0)
1084 1054
1085#define ADVANCE_LP_RING() do { \ 1055#define ADVANCE_LP_RING() do { \
1056 drm_i915_private_t *dev_priv = dev->dev_private; \
1086 if (I915_VERBOSE) \ 1057 if (I915_VERBOSE) \
1087 DRM_DEBUG("ADVANCE_LP_RING %x\n", dev_priv->render_ring.tail); \ 1058 DRM_DEBUG("ADVANCE_LP_RING %x\n", \
1088 I915_WRITE(PRB0_TAIL, dev_priv->render_ring.tail); \ 1059 dev_priv->render_ring.tail); \
1060 intel_ring_advance(dev, &dev_priv->render_ring); \
1089} while(0) 1061} while(0)
1090 1062
1091/** 1063/**
@@ -1103,14 +1075,12 @@ extern int intel_trans_dp_port_sel (struct drm_crtc *crtc);
1103 * 1075 *
1104 * The area from dword 0x20 to 0x3ff is available for driver usage. 1076 * The area from dword 0x20 to 0x3ff is available for driver usage.
1105 */ 1077 */
1106#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg]) 1078#define READ_HWSP(dev_priv, reg) (((volatile u32 *)\
1079 (dev_priv->render_ring.status_page.page_addr))[reg])
1107#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX) 1080#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
1108#define I915_GEM_HWS_INDEX 0x20 1081#define I915_GEM_HWS_INDEX 0x20
1109#define I915_BREADCRUMB_INDEX 0x21 1082#define I915_BREADCRUMB_INDEX 0x21
1110 1083
1111extern int i915_wrap_ring(struct drm_device * dev);
1112extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
1113
1114#define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info) 1084#define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info)
1115 1085
1116#define IS_I830(dev) ((dev)->pci_device == 0x3577) 1086#define IS_I830(dev) ((dev)->pci_device == 0x3577)