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authorEric Anholt <eric@anholt.net>2010-04-02 18:24:27 -0400
committerEric Anholt <eric@anholt.net>2010-04-12 12:23:30 -0400
commit6443170f6d862a1cc89e61e4bb2410b714b875f4 (patch)
tree17767306f21c95f066163d1d7df9c2a2e35bbbc9 /drivers/gpu/drm/i915/dvo_ch7017.c
parent335af9a235a82842854b394507ab5e310d88be42 (diff)
drm/i915: Remove dead KMS encoder save/restore code.
This was brought over from UMS, and used for a while until we decided that drm_helper_resume_force_mode was easier and more reliable, since it didn't require duplicating all the code deleted here. We just forgot to delete all that junk for a while.
Diffstat (limited to 'drivers/gpu/drm/i915/dvo_ch7017.c')
-rw-r--r--drivers/gpu/drm/i915/dvo_ch7017.c46
1 files changed, 1 insertions, 45 deletions
diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c
index 1184c14ba87d..14d59804acd7 100644
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -159,16 +159,7 @@
159#define CH7017_BANG_LIMIT_CONTROL 0x7f 159#define CH7017_BANG_LIMIT_CONTROL 0x7f
160 160
161struct ch7017_priv { 161struct ch7017_priv {
162 uint8_t save_hapi; 162 uint8_t dummy;
163 uint8_t save_vali;
164 uint8_t save_valo;
165 uint8_t save_ailo;
166 uint8_t save_lvds_pll_vco;
167 uint8_t save_feedback_div;
168 uint8_t save_lvds_control_2;
169 uint8_t save_outputs_enable;
170 uint8_t save_lvds_power_down;
171 uint8_t save_power_management;
172}; 163};
173 164
174static void ch7017_dump_regs(struct intel_dvo_device *dvo); 165static void ch7017_dump_regs(struct intel_dvo_device *dvo);
@@ -401,39 +392,6 @@ do { \
401 DUMP(CH7017_LVDS_POWER_DOWN); 392 DUMP(CH7017_LVDS_POWER_DOWN);
402} 393}
403 394
404static void ch7017_save(struct intel_dvo_device *dvo)
405{
406 struct ch7017_priv *priv = dvo->dev_priv;
407
408 ch7017_read(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT, &priv->save_hapi);
409 ch7017_read(dvo, CH7017_VERTICAL_ACTIVE_LINE_OUTPUT, &priv->save_valo);
410 ch7017_read(dvo, CH7017_ACTIVE_INPUT_LINE_OUTPUT, &priv->save_ailo);
411 ch7017_read(dvo, CH7017_LVDS_PLL_VCO_CONTROL, &priv->save_lvds_pll_vco);
412 ch7017_read(dvo, CH7017_LVDS_PLL_FEEDBACK_DIV, &priv->save_feedback_div);
413 ch7017_read(dvo, CH7017_LVDS_CONTROL_2, &priv->save_lvds_control_2);
414 ch7017_read(dvo, CH7017_OUTPUTS_ENABLE, &priv->save_outputs_enable);
415 ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &priv->save_lvds_power_down);
416 ch7017_read(dvo, CH7017_POWER_MANAGEMENT, &priv->save_power_management);
417}
418
419static void ch7017_restore(struct intel_dvo_device *dvo)
420{
421 struct ch7017_priv *priv = dvo->dev_priv;
422
423 /* Power down before changing mode */
424 ch7017_dpms(dvo, DRM_MODE_DPMS_OFF);
425
426 ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT, priv->save_hapi);
427 ch7017_write(dvo, CH7017_VERTICAL_ACTIVE_LINE_OUTPUT, priv->save_valo);
428 ch7017_write(dvo, CH7017_ACTIVE_INPUT_LINE_OUTPUT, priv->save_ailo);
429 ch7017_write(dvo, CH7017_LVDS_PLL_VCO_CONTROL, priv->save_lvds_pll_vco);
430 ch7017_write(dvo, CH7017_LVDS_PLL_FEEDBACK_DIV, priv->save_feedback_div);
431 ch7017_write(dvo, CH7017_LVDS_CONTROL_2, priv->save_lvds_control_2);
432 ch7017_write(dvo, CH7017_OUTPUTS_ENABLE, priv->save_outputs_enable);
433 ch7017_write(dvo, CH7017_LVDS_POWER_DOWN, priv->save_lvds_power_down);
434 ch7017_write(dvo, CH7017_POWER_MANAGEMENT, priv->save_power_management);
435}
436
437static void ch7017_destroy(struct intel_dvo_device *dvo) 395static void ch7017_destroy(struct intel_dvo_device *dvo)
438{ 396{
439 struct ch7017_priv *priv = dvo->dev_priv; 397 struct ch7017_priv *priv = dvo->dev_priv;
@@ -451,7 +409,5 @@ struct intel_dvo_dev_ops ch7017_ops = {
451 .mode_set = ch7017_mode_set, 409 .mode_set = ch7017_mode_set,
452 .dpms = ch7017_dpms, 410 .dpms = ch7017_dpms,
453 .dump_regs = ch7017_dump_regs, 411 .dump_regs = ch7017_dump_regs,
454 .save = ch7017_save,
455 .restore = ch7017_restore,
456 .destroy = ch7017_destroy, 412 .destroy = ch7017_destroy,
457}; 413};