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authorFeng Tang <feng.tang@intel.com>2011-12-13 10:53:49 -0500
committerGrant Likely <grant.likely@secretlab.ca>2011-12-13 13:05:17 -0500
commitf9ea14efa5277c47efec341dee2c408b6b80f854 (patch)
treef81e7113a509893ef0a670445537900fcf3ca527 /drivers/gpio
parentb2888095feb3c651cba5904b0227622e82777b34 (diff)
gpio-ml-ioh: fix a bug in the interrupt handler
GPIO's irq action's dev_id is set to the first struct ioh_gpio chip, so when loop checking the 8 chips, the "chip" should be changed according. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-ml-ioh.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
index ea8e73869250..92b6f51a206e 100644
--- a/drivers/gpio/gpio-ml-ioh.c
+++ b/drivers/gpio/gpio-ml-ioh.c
@@ -339,7 +339,7 @@ static irqreturn_t ioh_gpio_handler(int irq, void *dev_id)
339 int i, j; 339 int i, j;
340 int ret = IRQ_NONE; 340 int ret = IRQ_NONE;
341 341
342 for (i = 0; i < 8; i++) { 342 for (i = 0; i < 8; i++, chip++) {
343 reg_val = ioread32(&chip->reg->regs[i].istatus); 343 reg_val = ioread32(&chip->reg->regs[i].istatus);
344 for (j = 0; j < num_ports[i]; j++) { 344 for (j = 0; j < num_ports[i]; j++) {
345 if (reg_val & BIT(j)) { 345 if (reg_val & BIT(j)) {