Merge branch 'x86/trampoline' into x86/urgent

x86/trampoline contains an urgent commit which is necessarily on a
newer baseline.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>

1 files changed, 36 insertions, 15 deletions

diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c
index 10f15d85fb5e..b613e31c16e5 100644
--- a/drivers/edac/i82875p_edac.c
+++ b/drivers/edac/i82875p_edac.c
@@ -38,7 +38,8 @@
 #endif                          /* PCI_DEVICE_ID_INTEL_82875_6 */
 
 /* four csrows in dual channel, eight in single channel */
-#define I82875P_NR_CSROWS(nr_chans) (8/(nr_chans))
+#define I82875P_NR_DIMMS                8
+#define I82875P_NR_CSROWS(nr_chans)     (I82875P_NR_DIMMS / (nr_chans))
 
 /* Intel 82875p register addresses - device 0 function 0 - DRAM Controller */
 #define I82875P_EAP             0x58    /* Error Address Pointer (32b)
@@ -235,7 +236,9 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,
                 return 1;
 
         if ((info->errsts ^ info->errsts2) & 0x0081) {
-                edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+                                     -1, -1, -1,
+                                     "UE overwrote CE", "", NULL);
                 info->errsts = info->errsts2;
         }
 
@@ -243,11 +246,15 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,
         row = edac_mc_find_csrow_by_page(mci, info->eap);
 
         if (info->errsts & 0x0080)
-                edac_mc_handle_ue(mci, info->eap, 0, row, "i82875p UE");
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                                     info->eap, 0, 0,
+                                     row, -1, -1,
+                                     "i82875p UE", "", NULL);
         else
-                edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
-                                multi_chan ? (info->des & 0x1) : 0,
-                                "i82875p CE");
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                                     info->eap, 0, info->derrsyn,
+                                     row, multi_chan ? (info->des & 0x1) : 0,
+                                     -1, "i82875p CE", "", NULL);
 
         return 1;
 }
@@ -342,11 +349,13 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci,
                                 void __iomem * ovrfl_window, u32 drc)
 {
         struct csrow_info *csrow;
+        struct dimm_info *dimm;
+        unsigned nr_chans = dual_channel_active(drc) + 1;
         unsigned long last_cumul_size;
         u8 value;
         u32 drc_ddim;           /* DRAM Data Integrity Mode 0=none,2=edac */
-        u32 cumul_size;
-        int index;
+        u32 cumul_size, nr_pages;
+        int index, j;
 
         drc_ddim = (drc >> 18) & 0x1;
         last_cumul_size = 0;
@@ -369,12 +378,18 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci,
 
                 csrow->first_page = last_cumul_size;
                 csrow->last_page = cumul_size - 1;
-                csrow->nr_pages = cumul_size - last_cumul_size;
+                nr_pages = cumul_size - last_cumul_size;
                 last_cumul_size = cumul_size;
-                csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
-                csrow->mtype = MEM_DDR;
-                csrow->dtype = DEV_UNKNOWN;
-                csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
+
+                for (j = 0; j < nr_chans; j++) {
+                        dimm = csrow->channels[j].dimm;
+
+                        dimm->nr_pages = nr_pages / nr_chans;
+                        dimm->grain = 1 << 12;  /* I82875P_EAP has 4KiB reolution */
+                        dimm->mtype = MEM_DDR;
+                        dimm->dtype = DEV_UNKNOWN;
+                        dimm->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
+                }
         }
 }
 
@@ -382,6 +397,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 {
         int rc = -ENODEV;
         struct mem_ctl_info *mci;
+        struct edac_mc_layer layers[2];
         struct i82875p_pvt *pvt;
         struct pci_dev *ovrfl_pdev;
         void __iomem *ovrfl_window;
@@ -397,9 +413,14 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
                 return -ENODEV;
         drc = readl(ovrfl_window + I82875P_DRC);
         nr_chans = dual_channel_active(drc) + 1;
-        mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
-                        nr_chans, 0);
 
+        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
+        layers[0].size = I82875P_NR_CSROWS(nr_chans);
+        layers[0].is_virt_csrow = true;
+        layers[1].type = EDAC_MC_LAYER_CHANNEL;
+        layers[1].size = nr_chans;
+        layers[1].is_virt_csrow = false;
+        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));
         if (!mci) {
                 rc = -ENOMEM;
                 goto fail0;