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authorJavier Martin <javier.martin@vista-silicon.com>2012-03-22 09:54:07 -0400
committerVinod Koul <vinod.koul@linux.intel.com>2012-03-26 02:01:31 -0400
commit833bc03bf14ef6d3f82d86845c29aa1f7e2037e3 (patch)
tree9c0a95fcf08ff597457a150a49143f21b5ea9545 /drivers/dma/imx-dma.c
parent359291a1a095a8a402405cd9c4bab46684e7bcfe (diff)
dmaengine: imx-dma: remove sg member from internal structure.
This member is redundant, because it is already present in descriptor structure. Removing it will make further removing of 'internal' structure easier. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'drivers/dma/imx-dma.c')
-rw-r--r--drivers/dma/imx-dma.c42
1 files changed, 18 insertions, 24 deletions
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index 484f35365902..82d4099bd8f4 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -129,7 +129,6 @@ enum imxdma_prep_type {
129 */ 129 */
130 130
131struct imxdma_channel_internal { 131struct imxdma_channel_internal {
132 struct scatterlist *sg;
133 unsigned int resbytes; 132 unsigned int resbytes;
134 133
135 int in_use; 134 int in_use;
@@ -278,11 +277,11 @@ static void imxdma_enable_hw(struct imxdma_desc *d)
278 CCR_ACRPT, DMA_CCR(channel)); 277 CCR_ACRPT, DMA_CCR(channel));
279 278
280 if ((cpu_is_mx21() || cpu_is_mx27()) && 279 if ((cpu_is_mx21() || cpu_is_mx27()) &&
281 imxdmac->internal.sg && imxdma_hw_chain(&imxdmac->internal)) { 280 d->sg && imxdma_hw_chain(&imxdmac->internal)) {
282 imxdmac->internal.sg = sg_next(imxdmac->internal.sg); 281 d->sg = sg_next(d->sg);
283 if (imxdmac->internal.sg) { 282 if (d->sg) {
284 u32 tmp; 283 u32 tmp;
285 imxdma_sg_next(d, imxdmac->internal.sg); 284 imxdma_sg_next(d, d->sg);
286 tmp = imx_dmav1_readl(DMA_CCR(channel)); 285 tmp = imx_dmav1_readl(DMA_CCR(channel));
287 imx_dmav1_writel(tmp | CCR_RPT | CCR_ACRPT, 286 imx_dmav1_writel(tmp | CCR_RPT | CCR_ACRPT,
288 DMA_CCR(channel)); 287 DMA_CCR(channel));
@@ -319,7 +318,6 @@ static void imxdma_watchdog(unsigned long data)
319 318
320 imx_dmav1_writel(0, DMA_CCR(channel)); 319 imx_dmav1_writel(0, DMA_CCR(channel));
321 imxdmac->internal.in_use = 0; 320 imxdmac->internal.in_use = 0;
322 imxdmac->internal.sg = NULL;
323 321
324 /* Tasklet watchdog error handler */ 322 /* Tasklet watchdog error handler */
325 tasklet_schedule(&imxdmac->dma_tasklet); 323 tasklet_schedule(&imxdmac->dma_tasklet);
@@ -387,24 +385,23 @@ static void dma_irq_handle_channel(struct imxdma_channel *imxdmac)
387 int chno = imxdmac->channel; 385 int chno = imxdmac->channel;
388 struct imxdma_desc *desc; 386 struct imxdma_desc *desc;
389 387
390 if (imxdma->sg) { 388 spin_lock(&imxdmac->lock);
391 u32 tmp; 389 if (list_empty(&imxdmac->ld_active)) {
392 imxdma->sg = sg_next(imxdma->sg); 390 spin_unlock(&imxdmac->lock);
393 391 goto out;
394 if (imxdma->sg) { 392 }
395 393
396 spin_lock(&imxdmac->lock); 394 desc = list_first_entry(&imxdmac->ld_active,
397 if (list_empty(&imxdmac->ld_active)) { 395 struct imxdma_desc,
398 spin_unlock(&imxdmac->lock); 396 node);
399 goto out; 397 spin_unlock(&imxdmac->lock);
400 }
401 398
402 desc = list_first_entry(&imxdmac->ld_active, 399 if (desc->sg) {
403 struct imxdma_desc, 400 u32 tmp;
404 node); 401 desc->sg = sg_next(desc->sg);
405 spin_unlock(&imxdmac->lock);
406 402
407 imxdma_sg_next(desc, imxdma->sg); 403 if (desc->sg) {
404 imxdma_sg_next(desc, desc->sg);
408 405
409 tmp = imx_dmav1_readl(DMA_CCR(chno)); 406 tmp = imx_dmav1_readl(DMA_CCR(chno));
410 407
@@ -477,8 +474,6 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
477 /* Configure and enable */ 474 /* Configure and enable */
478 switch (d->type) { 475 switch (d->type) {
479 case IMXDMA_DESC_MEMCPY: 476 case IMXDMA_DESC_MEMCPY:
480 imxdmac->internal.sg = NULL;
481
482 imx_dmav1_writel(d->src, DMA_SAR(imxdmac->channel)); 477 imx_dmav1_writel(d->src, DMA_SAR(imxdmac->channel));
483 imx_dmav1_writel(d->dest, DMA_DAR(imxdmac->channel)); 478 imx_dmav1_writel(d->dest, DMA_DAR(imxdmac->channel));
484 imx_dmav1_writel(d->config_mem | (d->config_port << 2), 479 imx_dmav1_writel(d->config_mem | (d->config_port << 2),
@@ -494,7 +489,6 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
494 /* Cyclic transfer is the same as slave_sg with special sg configuration. */ 489 /* Cyclic transfer is the same as slave_sg with special sg configuration. */
495 case IMXDMA_DESC_CYCLIC: 490 case IMXDMA_DESC_CYCLIC:
496 case IMXDMA_DESC_SLAVE_SG: 491 case IMXDMA_DESC_SLAVE_SG:
497 imxdmac->internal.sg = d->sg;
498 imxdmac->internal.resbytes = d->len; 492 imxdmac->internal.resbytes = d->len;
499 493
500 if (d->direction == DMA_DEV_TO_MEM) { 494 if (d->direction == DMA_DEV_TO_MEM) {