diff options
author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-01-09 02:38:23 -0500 |
---|---|---|
committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-01-09 02:38:23 -0500 |
commit | da733563be5a9da26fe81d9f007262d00b846e22 (patch) | |
tree | db28291df94a2043af2123911984c5c173da4e6f /drivers/char | |
parent | 6ccbcf2cb41131f8d56ef0723bf3f7c1f8486076 (diff) | |
parent | dab78d7924598ea4031663dd10db814e2e324928 (diff) |
Merge branch 'next' into for-linus
Diffstat (limited to 'drivers/char')
-rw-r--r-- | drivers/char/Kconfig | 6 | ||||
-rw-r--r-- | drivers/char/agp/backend.c | 3 | ||||
-rw-r--r-- | drivers/char/agp/hp-agp.c | 6 | ||||
-rw-r--r-- | drivers/char/agp/intel-gtt.c | 33 | ||||
-rw-r--r-- | drivers/char/apm-emulation.c | 21 | ||||
-rw-r--r-- | drivers/char/hw_random/Kconfig | 28 | ||||
-rw-r--r-- | drivers/char/hw_random/Makefile | 1 | ||||
-rw-r--r-- | drivers/char/hw_random/atmel-rng.c | 158 | ||||
-rw-r--r-- | drivers/char/hw_random/virtio-rng.c | 1 | ||||
-rw-r--r-- | drivers/char/ipmi/ipmi_watchdog.c | 33 | ||||
-rw-r--r-- | drivers/char/mem.c | 1 | ||||
-rw-r--r-- | drivers/char/ps3flash.c | 1 | ||||
-rw-r--r-- | drivers/char/ramoops.c | 1 | ||||
-rw-r--r-- | drivers/char/random.c | 23 | ||||
-rw-r--r-- | drivers/char/raw.c | 3 | ||||
-rw-r--r-- | drivers/char/rtc.c | 7 | ||||
-rw-r--r-- | drivers/char/scc.h | 613 | ||||
-rw-r--r-- | drivers/char/tpm/Kconfig | 1 | ||||
-rw-r--r-- | drivers/char/tpm/tpm.c | 12 | ||||
-rw-r--r-- | drivers/char/tpm/tpm_nsc.c | 2 | ||||
-rw-r--r-- | drivers/char/ttyprintk.c | 3 | ||||
-rw-r--r-- | drivers/char/virtio_console.c | 121 |
22 files changed, 367 insertions, 711 deletions
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 423fd56bf612..43643033a3ae 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig | |||
@@ -298,7 +298,7 @@ if RTC_LIB=n | |||
298 | config RTC | 298 | config RTC |
299 | tristate "Enhanced Real Time Clock Support (legacy PC RTC driver)" | 299 | tristate "Enhanced Real Time Clock Support (legacy PC RTC driver)" |
300 | depends on !PPC && !PARISC && !IA64 && !M68K && !SPARC && !FRV \ | 300 | depends on !PPC && !PARISC && !IA64 && !M68K && !SPARC && !FRV \ |
301 | && !ARM && !SUPERH && !S390 && !AVR32 && !BLACKFIN | 301 | && !ARM && !SUPERH && !S390 && !AVR32 && !BLACKFIN && !UML |
302 | ---help--- | 302 | ---help--- |
303 | If you say Y here and create a character special file /dev/rtc with | 303 | If you say Y here and create a character special file /dev/rtc with |
304 | major number 10 and minor number 135 using mknod ("man mknod"), you | 304 | major number 10 and minor number 135 using mknod ("man mknod"), you |
@@ -346,7 +346,7 @@ config JS_RTC | |||
346 | 346 | ||
347 | config GEN_RTC | 347 | config GEN_RTC |
348 | tristate "Generic /dev/rtc emulation" | 348 | tristate "Generic /dev/rtc emulation" |
349 | depends on RTC!=y && !IA64 && !ARM && !M32R && !MIPS && !SPARC && !FRV && !S390 && !SUPERH && !AVR32 && !BLACKFIN | 349 | depends on RTC!=y && !IA64 && !ARM && !M32R && !MIPS && !SPARC && !FRV && !S390 && !SUPERH && !AVR32 && !BLACKFIN && !UML |
350 | ---help--- | 350 | ---help--- |
351 | If you say Y here and create a character special file /dev/rtc with | 351 | If you say Y here and create a character special file /dev/rtc with |
352 | major number 10 and minor number 135 using mknod ("man mknod"), you | 352 | major number 10 and minor number 135 using mknod ("man mknod"), you |
@@ -490,7 +490,7 @@ config SCx200_GPIO | |||
490 | 490 | ||
491 | config PC8736x_GPIO | 491 | config PC8736x_GPIO |
492 | tristate "NatSemi PC8736x GPIO Support" | 492 | tristate "NatSemi PC8736x GPIO Support" |
493 | depends on X86_32 | 493 | depends on X86_32 && !UML |
494 | default SCx200_GPIO # mostly N | 494 | default SCx200_GPIO # mostly N |
495 | select NSC_GPIO # needed for support routines | 495 | select NSC_GPIO # needed for support routines |
496 | help | 496 | help |
diff --git a/drivers/char/agp/backend.c b/drivers/char/agp/backend.c index f27d0d0816d3..4b71647782d0 100644 --- a/drivers/char/agp/backend.c +++ b/drivers/char/agp/backend.c | |||
@@ -171,7 +171,7 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge) | |||
171 | } | 171 | } |
172 | got_gatt = 1; | 172 | got_gatt = 1; |
173 | 173 | ||
174 | bridge->key_list = vmalloc(PAGE_SIZE * 4); | 174 | bridge->key_list = vzalloc(PAGE_SIZE * 4); |
175 | if (bridge->key_list == NULL) { | 175 | if (bridge->key_list == NULL) { |
176 | dev_err(&bridge->dev->dev, | 176 | dev_err(&bridge->dev->dev, |
177 | "can't allocate memory for key lists\n"); | 177 | "can't allocate memory for key lists\n"); |
@@ -181,7 +181,6 @@ static int agp_backend_initialize(struct agp_bridge_data *bridge) | |||
181 | got_keylist = 1; | 181 | got_keylist = 1; |
182 | 182 | ||
183 | /* FIXME vmalloc'd memory not guaranteed contiguous */ | 183 | /* FIXME vmalloc'd memory not guaranteed contiguous */ |
184 | memset(bridge->key_list, 0, PAGE_SIZE * 4); | ||
185 | 184 | ||
186 | if (bridge->driver->configure()) { | 185 | if (bridge->driver->configure()) { |
187 | dev_err(&bridge->dev->dev, "error configuring host chipset\n"); | 186 | dev_err(&bridge->dev->dev, "error configuring host chipset\n"); |
diff --git a/drivers/char/agp/hp-agp.c b/drivers/char/agp/hp-agp.c index 056b289a1e89..3695773ce7c3 100644 --- a/drivers/char/agp/hp-agp.c +++ b/drivers/char/agp/hp-agp.c | |||
@@ -336,7 +336,8 @@ hp_zx1_insert_memory (struct agp_memory *mem, off_t pg_start, int type) | |||
336 | off_t j, io_pg_start; | 336 | off_t j, io_pg_start; |
337 | int io_pg_count; | 337 | int io_pg_count; |
338 | 338 | ||
339 | if (type != 0 || mem->type != 0) { | 339 | if (type != mem->type || |
340 | agp_bridge->driver->agp_type_to_mask_type(agp_bridge, type)) { | ||
340 | return -EINVAL; | 341 | return -EINVAL; |
341 | } | 342 | } |
342 | 343 | ||
@@ -380,7 +381,8 @@ hp_zx1_remove_memory (struct agp_memory *mem, off_t pg_start, int type) | |||
380 | struct _hp_private *hp = &hp_private; | 381 | struct _hp_private *hp = &hp_private; |
381 | int i, io_pg_start, io_pg_count; | 382 | int i, io_pg_start, io_pg_count; |
382 | 383 | ||
383 | if (type != 0 || mem->type != 0) { | 384 | if (type != mem->type || |
385 | agp_bridge->driver->agp_type_to_mask_type(agp_bridge, type)) { | ||
384 | return -EINVAL; | 386 | return -EINVAL; |
385 | } | 387 | } |
386 | 388 | ||
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 85151019dde1..c92424ca1a55 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
@@ -30,10 +30,10 @@ | |||
30 | /* | 30 | /* |
31 | * If we have Intel graphics, we're not going to have anything other than | 31 | * If we have Intel graphics, we're not going to have anything other than |
32 | * an Intel IOMMU. So make the correct use of the PCI DMA API contingent | 32 | * an Intel IOMMU. So make the correct use of the PCI DMA API contingent |
33 | * on the Intel IOMMU support (CONFIG_DMAR). | 33 | * on the Intel IOMMU support (CONFIG_INTEL_IOMMU). |
34 | * Only newer chipsets need to bother with this, of course. | 34 | * Only newer chipsets need to bother with this, of course. |
35 | */ | 35 | */ |
36 | #ifdef CONFIG_DMAR | 36 | #ifdef CONFIG_INTEL_IOMMU |
37 | #define USE_PCI_DMA_API 1 | 37 | #define USE_PCI_DMA_API 1 |
38 | #else | 38 | #else |
39 | #define USE_PCI_DMA_API 0 | 39 | #define USE_PCI_DMA_API 0 |
@@ -923,6 +923,9 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem, | |||
923 | { | 923 | { |
924 | int ret = -EINVAL; | 924 | int ret = -EINVAL; |
925 | 925 | ||
926 | if (intel_private.base.do_idle_maps) | ||
927 | return -ENODEV; | ||
928 | |||
926 | if (intel_private.clear_fake_agp) { | 929 | if (intel_private.clear_fake_agp) { |
927 | int start = intel_private.base.stolen_size / PAGE_SIZE; | 930 | int start = intel_private.base.stolen_size / PAGE_SIZE; |
928 | int end = intel_private.base.gtt_mappable_entries; | 931 | int end = intel_private.base.gtt_mappable_entries; |
@@ -985,6 +988,9 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem, | |||
985 | if (mem->page_count == 0) | 988 | if (mem->page_count == 0) |
986 | return 0; | 989 | return 0; |
987 | 990 | ||
991 | if (intel_private.base.do_idle_maps) | ||
992 | return -ENODEV; | ||
993 | |||
988 | intel_gtt_clear_range(pg_start, mem->page_count); | 994 | intel_gtt_clear_range(pg_start, mem->page_count); |
989 | 995 | ||
990 | if (intel_private.base.needs_dmar) { | 996 | if (intel_private.base.needs_dmar) { |
@@ -1177,6 +1183,26 @@ static void gen6_cleanup(void) | |||
1177 | { | 1183 | { |
1178 | } | 1184 | } |
1179 | 1185 | ||
1186 | /* Certain Gen5 chipsets require require idling the GPU before | ||
1187 | * unmapping anything from the GTT when VT-d is enabled. | ||
1188 | */ | ||
1189 | static inline int needs_idle_maps(void) | ||
1190 | { | ||
1191 | #ifdef CONFIG_INTEL_IOMMU | ||
1192 | const unsigned short gpu_devid = intel_private.pcidev->device; | ||
1193 | extern int intel_iommu_gfx_mapped; | ||
1194 | |||
1195 | /* Query intel_iommu to see if we need the workaround. Presumably that | ||
1196 | * was loaded first. | ||
1197 | */ | ||
1198 | if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB || | ||
1199 | gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) && | ||
1200 | intel_iommu_gfx_mapped) | ||
1201 | return 1; | ||
1202 | #endif | ||
1203 | return 0; | ||
1204 | } | ||
1205 | |||
1180 | static int i9xx_setup(void) | 1206 | static int i9xx_setup(void) |
1181 | { | 1207 | { |
1182 | u32 reg_addr; | 1208 | u32 reg_addr; |
@@ -1211,6 +1237,9 @@ static int i9xx_setup(void) | |||
1211 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; | 1237 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; |
1212 | } | 1238 | } |
1213 | 1239 | ||
1240 | if (needs_idle_maps()) | ||
1241 | intel_private.base.do_idle_maps = 1; | ||
1242 | |||
1214 | intel_i9xx_setup_flush(); | 1243 | intel_i9xx_setup_flush(); |
1215 | 1244 | ||
1216 | return 0; | 1245 | return 0; |
diff --git a/drivers/char/apm-emulation.c b/drivers/char/apm-emulation.c index a7346ab97a3c..f4837a893dfa 100644 --- a/drivers/char/apm-emulation.c +++ b/drivers/char/apm-emulation.c | |||
@@ -40,10 +40,7 @@ | |||
40 | #define APM_MINOR_DEV 134 | 40 | #define APM_MINOR_DEV 134 |
41 | 41 | ||
42 | /* | 42 | /* |
43 | * See Documentation/Config.help for the configuration options. | 43 | * One option can be changed at boot time as follows: |
44 | * | ||
45 | * Various options can be changed at boot time as follows: | ||
46 | * (We allow underscores for compatibility with the modules code) | ||
47 | * apm=on/off enable/disable APM | 44 | * apm=on/off enable/disable APM |
48 | */ | 45 | */ |
49 | 46 | ||
@@ -300,17 +297,13 @@ apm_ioctl(struct file *filp, u_int cmd, u_long arg) | |||
300 | /* | 297 | /* |
301 | * Wait for the suspend/resume to complete. If there | 298 | * Wait for the suspend/resume to complete. If there |
302 | * are pending acknowledges, we wait here for them. | 299 | * are pending acknowledges, we wait here for them. |
300 | * wait_event_freezable() is interruptible and pending | ||
301 | * signal can cause busy looping. We aren't doing | ||
302 | * anything critical, chill a bit on each iteration. | ||
303 | */ | 303 | */ |
304 | freezer_do_not_count(); | 304 | while (wait_event_freezable(apm_suspend_waitqueue, |
305 | 305 | as->suspend_state == SUSPEND_DONE)) | |
306 | wait_event(apm_suspend_waitqueue, | 306 | msleep(10); |
307 | as->suspend_state == SUSPEND_DONE); | ||
308 | |||
309 | /* | ||
310 | * Since we are waiting until the suspend is done, the | ||
311 | * try_to_freeze() in freezer_count() will not trigger | ||
312 | */ | ||
313 | freezer_count(); | ||
314 | break; | 307 | break; |
315 | case SUSPEND_ACKTO: | 308 | case SUSPEND_ACKTO: |
316 | as->suspend_result = -ETIMEDOUT; | 309 | as->suspend_result = -ETIMEDOUT; |
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 1d2ebc7a4947..0689bf6b0183 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig | |||
@@ -60,6 +60,19 @@ config HW_RANDOM_AMD | |||
60 | 60 | ||
61 | If unsure, say Y. | 61 | If unsure, say Y. |
62 | 62 | ||
63 | config HW_RANDOM_ATMEL | ||
64 | tristate "Atmel Random Number Generator support" | ||
65 | depends on HW_RANDOM && ARCH_AT91SAM9G45 | ||
66 | default HW_RANDOM | ||
67 | ---help--- | ||
68 | This driver provides kernel-side support for the Random Number | ||
69 | Generator hardware found on Atmel AT91 devices. | ||
70 | |||
71 | To compile this driver as a module, choose M here: the | ||
72 | module will be called atmel-rng. | ||
73 | |||
74 | If unsure, say Y. | ||
75 | |||
63 | config HW_RANDOM_GEODE | 76 | config HW_RANDOM_GEODE |
64 | tristate "AMD Geode HW Random Number Generator support" | 77 | tristate "AMD Geode HW Random Number Generator support" |
65 | depends on HW_RANDOM && X86_32 && PCI | 78 | depends on HW_RANDOM && X86_32 && PCI |
@@ -222,3 +235,18 @@ config HW_RANDOM_PPC4XX | |||
222 | module will be called ppc4xx-rng. | 235 | module will be called ppc4xx-rng. |
223 | 236 | ||
224 | If unsure, say N. | 237 | If unsure, say N. |
238 | |||
239 | config UML_RANDOM | ||
240 | depends on UML | ||
241 | tristate "Hardware random number generator" | ||
242 | help | ||
243 | This option enables UML's "hardware" random number generator. It | ||
244 | attaches itself to the host's /dev/random, supplying as much entropy | ||
245 | as the host has, rather than the small amount the UML gets from its | ||
246 | own drivers. It registers itself as a standard hardware random number | ||
247 | generator, major 10, minor 183, and the canonical device name is | ||
248 | /dev/hwrng. | ||
249 | The way to make use of this is to install the rng-tools package | ||
250 | (check your distro, or download from | ||
251 | http://sourceforge.net/projects/gkernel/). rngd periodically reads | ||
252 | /dev/hwrng and injects the entropy into /dev/random. | ||
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile index c88f244c8a71..b2ff5265a996 100644 --- a/drivers/char/hw_random/Makefile +++ b/drivers/char/hw_random/Makefile | |||
@@ -7,6 +7,7 @@ rng-core-y := core.o | |||
7 | obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o | 7 | obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o |
8 | obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o | 8 | obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o |
9 | obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o | 9 | obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o |
10 | obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o | ||
10 | obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o | 11 | obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o |
11 | obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o | 12 | obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o |
12 | n2-rng-y := n2-drv.o n2-asm.o | 13 | n2-rng-y := n2-drv.o n2-asm.o |
diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c new file mode 100644 index 000000000000..241df2e76aba --- /dev/null +++ b/drivers/char/hw_random/atmel-rng.c | |||
@@ -0,0 +1,158 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Peter Korsgaard <jacmet@sunsite.dk> | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/slab.h> | ||
12 | #include <linux/err.h> | ||
13 | #include <linux/clk.h> | ||
14 | #include <linux/io.h> | ||
15 | #include <linux/hw_random.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #define TRNG_CR 0x00 | ||
19 | #define TRNG_ISR 0x1c | ||
20 | #define TRNG_ODATA 0x50 | ||
21 | |||
22 | #define TRNG_KEY 0x524e4700 /* RNG */ | ||
23 | |||
24 | struct atmel_trng { | ||
25 | struct clk *clk; | ||
26 | void __iomem *base; | ||
27 | struct hwrng rng; | ||
28 | }; | ||
29 | |||
30 | static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max, | ||
31 | bool wait) | ||
32 | { | ||
33 | struct atmel_trng *trng = container_of(rng, struct atmel_trng, rng); | ||
34 | u32 *data = buf; | ||
35 | |||
36 | /* data ready? */ | ||
37 | if (readl(trng->base + TRNG_ODATA) & 1) { | ||
38 | *data = readl(trng->base + TRNG_ODATA); | ||
39 | return 4; | ||
40 | } else | ||
41 | return 0; | ||
42 | } | ||
43 | |||
44 | static int atmel_trng_probe(struct platform_device *pdev) | ||
45 | { | ||
46 | struct atmel_trng *trng; | ||
47 | struct resource *res; | ||
48 | int ret; | ||
49 | |||
50 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
51 | if (!res) | ||
52 | return -EINVAL; | ||
53 | |||
54 | trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL); | ||
55 | if (!trng) | ||
56 | return -ENOMEM; | ||
57 | |||
58 | if (!devm_request_mem_region(&pdev->dev, res->start, | ||
59 | resource_size(res), pdev->name)) | ||
60 | return -EBUSY; | ||
61 | |||
62 | trng->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); | ||
63 | if (!trng->base) | ||
64 | return -EBUSY; | ||
65 | |||
66 | trng->clk = clk_get(&pdev->dev, NULL); | ||
67 | if (IS_ERR(trng->clk)) | ||
68 | return PTR_ERR(trng->clk); | ||
69 | |||
70 | ret = clk_enable(trng->clk); | ||
71 | if (ret) | ||
72 | goto err_enable; | ||
73 | |||
74 | writel(TRNG_KEY | 1, trng->base + TRNG_CR); | ||
75 | trng->rng.name = pdev->name; | ||
76 | trng->rng.read = atmel_trng_read; | ||
77 | |||
78 | ret = hwrng_register(&trng->rng); | ||
79 | if (ret) | ||
80 | goto err_register; | ||
81 | |||
82 | platform_set_drvdata(pdev, trng); | ||
83 | |||
84 | return 0; | ||
85 | |||
86 | err_register: | ||
87 | clk_disable(trng->clk); | ||
88 | err_enable: | ||
89 | clk_put(trng->clk); | ||
90 | |||
91 | return ret; | ||
92 | } | ||
93 | |||
94 | static int __devexit atmel_trng_remove(struct platform_device *pdev) | ||
95 | { | ||
96 | struct atmel_trng *trng = platform_get_drvdata(pdev); | ||
97 | |||
98 | hwrng_unregister(&trng->rng); | ||
99 | |||
100 | writel(TRNG_KEY, trng->base + TRNG_CR); | ||
101 | clk_disable(trng->clk); | ||
102 | clk_put(trng->clk); | ||
103 | |||
104 | platform_set_drvdata(pdev, NULL); | ||
105 | |||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | #ifdef CONFIG_PM | ||
110 | static int atmel_trng_suspend(struct device *dev) | ||
111 | { | ||
112 | struct atmel_trng *trng = dev_get_drvdata(dev); | ||
113 | |||
114 | clk_disable(trng->clk); | ||
115 | |||
116 | return 0; | ||
117 | } | ||
118 | |||
119 | static int atmel_trng_resume(struct device *dev) | ||
120 | { | ||
121 | struct atmel_trng *trng = dev_get_drvdata(dev); | ||
122 | |||
123 | return clk_enable(trng->clk); | ||
124 | } | ||
125 | |||
126 | static const struct dev_pm_ops atmel_trng_pm_ops = { | ||
127 | .suspend = atmel_trng_suspend, | ||
128 | .resume = atmel_trng_resume, | ||
129 | }; | ||
130 | #endif /* CONFIG_PM */ | ||
131 | |||
132 | static struct platform_driver atmel_trng_driver = { | ||
133 | .probe = atmel_trng_probe, | ||
134 | .remove = __devexit_p(atmel_trng_remove), | ||
135 | .driver = { | ||
136 | .name = "atmel-trng", | ||
137 | .owner = THIS_MODULE, | ||
138 | #ifdef CONFIG_PM | ||
139 | .pm = &atmel_trng_pm_ops, | ||
140 | #endif /* CONFIG_PM */ | ||
141 | }, | ||
142 | }; | ||
143 | |||
144 | static int __init atmel_trng_init(void) | ||
145 | { | ||
146 | return platform_driver_register(&atmel_trng_driver); | ||
147 | } | ||
148 | module_init(atmel_trng_init); | ||
149 | |||
150 | static void __exit atmel_trng_exit(void) | ||
151 | { | ||
152 | platform_driver_unregister(&atmel_trng_driver); | ||
153 | } | ||
154 | module_exit(atmel_trng_exit); | ||
155 | |||
156 | MODULE_LICENSE("GPL"); | ||
157 | MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>"); | ||
158 | MODULE_DESCRIPTION("Atmel true random number generator driver"); | ||
diff --git a/drivers/char/hw_random/virtio-rng.c b/drivers/char/hw_random/virtio-rng.c index 75f1cbd61c17..fd699ccecf5b 100644 --- a/drivers/char/hw_random/virtio-rng.c +++ b/drivers/char/hw_random/virtio-rng.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/spinlock.h> | 23 | #include <linux/spinlock.h> |
24 | #include <linux/virtio.h> | 24 | #include <linux/virtio.h> |
25 | #include <linux/virtio_rng.h> | 25 | #include <linux/virtio_rng.h> |
26 | #include <linux/module.h> | ||
26 | 27 | ||
27 | static struct virtqueue *vq; | 28 | static struct virtqueue *vq; |
28 | static unsigned int data_avail; | 29 | static unsigned int data_avail; |
diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c index 3302586655c4..c2917ffad2c2 100644 --- a/drivers/char/ipmi/ipmi_watchdog.c +++ b/drivers/char/ipmi/ipmi_watchdog.c | |||
@@ -65,6 +65,7 @@ | |||
65 | * mechanism for it at that time. | 65 | * mechanism for it at that time. |
66 | */ | 66 | */ |
67 | #include <asm/kdebug.h> | 67 | #include <asm/kdebug.h> |
68 | #include <asm/nmi.h> | ||
68 | #define HAVE_DIE_NMI | 69 | #define HAVE_DIE_NMI |
69 | #endif | 70 | #endif |
70 | 71 | ||
@@ -1077,17 +1078,8 @@ static void ipmi_unregister_watchdog(int ipmi_intf) | |||
1077 | 1078 | ||
1078 | #ifdef HAVE_DIE_NMI | 1079 | #ifdef HAVE_DIE_NMI |
1079 | static int | 1080 | static int |
1080 | ipmi_nmi(struct notifier_block *self, unsigned long val, void *data) | 1081 | ipmi_nmi(unsigned int val, struct pt_regs *regs) |
1081 | { | 1082 | { |
1082 | struct die_args *args = data; | ||
1083 | |||
1084 | if (val != DIE_NMIUNKNOWN) | ||
1085 | return NOTIFY_OK; | ||
1086 | |||
1087 | /* Hack, if it's a memory or I/O error, ignore it. */ | ||
1088 | if (args->err & 0xc0) | ||
1089 | return NOTIFY_OK; | ||
1090 | |||
1091 | /* | 1083 | /* |
1092 | * If we get here, it's an NMI that's not a memory or I/O | 1084 | * If we get here, it's an NMI that's not a memory or I/O |
1093 | * error. We can't truly tell if it's from IPMI or not | 1085 | * error. We can't truly tell if it's from IPMI or not |
@@ -1097,15 +1089,15 @@ ipmi_nmi(struct notifier_block *self, unsigned long val, void *data) | |||
1097 | 1089 | ||
1098 | if (testing_nmi) { | 1090 | if (testing_nmi) { |
1099 | testing_nmi = 2; | 1091 | testing_nmi = 2; |
1100 | return NOTIFY_STOP; | 1092 | return NMI_HANDLED; |
1101 | } | 1093 | } |
1102 | 1094 | ||
1103 | /* If we are not expecting a timeout, ignore it. */ | 1095 | /* If we are not expecting a timeout, ignore it. */ |
1104 | if (ipmi_watchdog_state == WDOG_TIMEOUT_NONE) | 1096 | if (ipmi_watchdog_state == WDOG_TIMEOUT_NONE) |
1105 | return NOTIFY_OK; | 1097 | return NMI_DONE; |
1106 | 1098 | ||
1107 | if (preaction_val != WDOG_PRETIMEOUT_NMI) | 1099 | if (preaction_val != WDOG_PRETIMEOUT_NMI) |
1108 | return NOTIFY_OK; | 1100 | return NMI_DONE; |
1109 | 1101 | ||
1110 | /* | 1102 | /* |
1111 | * If no one else handled the NMI, we assume it was the IPMI | 1103 | * If no one else handled the NMI, we assume it was the IPMI |
@@ -1120,12 +1112,8 @@ ipmi_nmi(struct notifier_block *self, unsigned long val, void *data) | |||
1120 | panic(PFX "pre-timeout"); | 1112 | panic(PFX "pre-timeout"); |
1121 | } | 1113 | } |
1122 | 1114 | ||
1123 | return NOTIFY_STOP; | 1115 | return NMI_HANDLED; |
1124 | } | 1116 | } |
1125 | |||
1126 | static struct notifier_block ipmi_nmi_handler = { | ||
1127 | .notifier_call = ipmi_nmi | ||
1128 | }; | ||
1129 | #endif | 1117 | #endif |
1130 | 1118 | ||
1131 | static int wdog_reboot_handler(struct notifier_block *this, | 1119 | static int wdog_reboot_handler(struct notifier_block *this, |
@@ -1290,7 +1278,8 @@ static void check_parms(void) | |||
1290 | } | 1278 | } |
1291 | } | 1279 | } |
1292 | if (do_nmi && !nmi_handler_registered) { | 1280 | if (do_nmi && !nmi_handler_registered) { |
1293 | rv = register_die_notifier(&ipmi_nmi_handler); | 1281 | rv = register_nmi_handler(NMI_UNKNOWN, ipmi_nmi, 0, |
1282 | "ipmi"); | ||
1294 | if (rv) { | 1283 | if (rv) { |
1295 | printk(KERN_WARNING PFX | 1284 | printk(KERN_WARNING PFX |
1296 | "Can't register nmi handler\n"); | 1285 | "Can't register nmi handler\n"); |
@@ -1298,7 +1287,7 @@ static void check_parms(void) | |||
1298 | } else | 1287 | } else |
1299 | nmi_handler_registered = 1; | 1288 | nmi_handler_registered = 1; |
1300 | } else if (!do_nmi && nmi_handler_registered) { | 1289 | } else if (!do_nmi && nmi_handler_registered) { |
1301 | unregister_die_notifier(&ipmi_nmi_handler); | 1290 | unregister_nmi_handler(NMI_UNKNOWN, "ipmi"); |
1302 | nmi_handler_registered = 0; | 1291 | nmi_handler_registered = 0; |
1303 | } | 1292 | } |
1304 | #endif | 1293 | #endif |
@@ -1336,7 +1325,7 @@ static int __init ipmi_wdog_init(void) | |||
1336 | if (rv) { | 1325 | if (rv) { |
1337 | #ifdef HAVE_DIE_NMI | 1326 | #ifdef HAVE_DIE_NMI |
1338 | if (nmi_handler_registered) | 1327 | if (nmi_handler_registered) |
1339 | unregister_die_notifier(&ipmi_nmi_handler); | 1328 | unregister_nmi_handler(NMI_UNKNOWN, "ipmi"); |
1340 | #endif | 1329 | #endif |
1341 | atomic_notifier_chain_unregister(&panic_notifier_list, | 1330 | atomic_notifier_chain_unregister(&panic_notifier_list, |
1342 | &wdog_panic_notifier); | 1331 | &wdog_panic_notifier); |
@@ -1357,7 +1346,7 @@ static void __exit ipmi_wdog_exit(void) | |||
1357 | 1346 | ||
1358 | #ifdef HAVE_DIE_NMI | 1347 | #ifdef HAVE_DIE_NMI |
1359 | if (nmi_handler_registered) | 1348 | if (nmi_handler_registered) |
1360 | unregister_die_notifier(&ipmi_nmi_handler); | 1349 | unregister_nmi_handler(NMI_UNKNOWN, "ipmi"); |
1361 | #endif | 1350 | #endif |
1362 | 1351 | ||
1363 | atomic_notifier_chain_unregister(&panic_notifier_list, | 1352 | atomic_notifier_chain_unregister(&panic_notifier_list, |
diff --git a/drivers/char/mem.c b/drivers/char/mem.c index 8fc04b4f311f..145179033716 100644 --- a/drivers/char/mem.c +++ b/drivers/char/mem.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/bootmem.h> | 26 | #include <linux/bootmem.h> |
27 | #include <linux/splice.h> | 27 | #include <linux/splice.h> |
28 | #include <linux/pfn.h> | 28 | #include <linux/pfn.h> |
29 | #include <linux/export.h> | ||
29 | 30 | ||
30 | #include <asm/uaccess.h> | 31 | #include <asm/uaccess.h> |
31 | #include <asm/io.h> | 32 | #include <asm/io.h> |
diff --git a/drivers/char/ps3flash.c b/drivers/char/ps3flash.c index d0c57c2e2909..6abdde4da2b7 100644 --- a/drivers/char/ps3flash.c +++ b/drivers/char/ps3flash.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/miscdevice.h> | 22 | #include <linux/miscdevice.h> |
23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
24 | #include <linux/uaccess.h> | 24 | #include <linux/uaccess.h> |
25 | #include <linux/module.h> | ||
25 | 26 | ||
26 | #include <asm/lv1call.h> | 27 | #include <asm/lv1call.h> |
27 | #include <asm/ps3stor.h> | 28 | #include <asm/ps3stor.h> |
diff --git a/drivers/char/ramoops.c b/drivers/char/ramoops.c index 810aff9e750f..7c7f42a1f880 100644 --- a/drivers/char/ramoops.c +++ b/drivers/char/ramoops.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/module.h> | 26 | #include <linux/module.h> |
27 | #include <linux/kmsg_dump.h> | 27 | #include <linux/kmsg_dump.h> |
28 | #include <linux/time.h> | 28 | #include <linux/time.h> |
29 | #include <linux/err.h> | ||
29 | #include <linux/io.h> | 30 | #include <linux/io.h> |
30 | #include <linux/ioport.h> | 31 | #include <linux/ioport.h> |
31 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
diff --git a/drivers/char/random.c b/drivers/char/random.c index c35a785005b0..6035ab8d5ef7 100644 --- a/drivers/char/random.c +++ b/drivers/char/random.c | |||
@@ -932,7 +932,21 @@ static ssize_t extract_entropy_user(struct entropy_store *r, void __user *buf, | |||
932 | */ | 932 | */ |
933 | void get_random_bytes(void *buf, int nbytes) | 933 | void get_random_bytes(void *buf, int nbytes) |
934 | { | 934 | { |
935 | extract_entropy(&nonblocking_pool, buf, nbytes, 0, 0); | 935 | char *p = buf; |
936 | |||
937 | while (nbytes) { | ||
938 | unsigned long v; | ||
939 | int chunk = min(nbytes, (int)sizeof(unsigned long)); | ||
940 | |||
941 | if (!arch_get_random_long(&v)) | ||
942 | break; | ||
943 | |||
944 | memcpy(p, &v, chunk); | ||
945 | p += chunk; | ||
946 | nbytes -= chunk; | ||
947 | } | ||
948 | |||
949 | extract_entropy(&nonblocking_pool, p, nbytes, 0, 0); | ||
936 | } | 950 | } |
937 | EXPORT_SYMBOL(get_random_bytes); | 951 | EXPORT_SYMBOL(get_random_bytes); |
938 | 952 | ||
@@ -1318,9 +1332,14 @@ late_initcall(random_int_secret_init); | |||
1318 | DEFINE_PER_CPU(__u32 [MD5_DIGEST_WORDS], get_random_int_hash); | 1332 | DEFINE_PER_CPU(__u32 [MD5_DIGEST_WORDS], get_random_int_hash); |
1319 | unsigned int get_random_int(void) | 1333 | unsigned int get_random_int(void) |
1320 | { | 1334 | { |
1321 | __u32 *hash = get_cpu_var(get_random_int_hash); | 1335 | __u32 *hash; |
1322 | unsigned int ret; | 1336 | unsigned int ret; |
1323 | 1337 | ||
1338 | if (arch_get_random_int(&ret)) | ||
1339 | return ret; | ||
1340 | |||
1341 | hash = get_cpu_var(get_random_int_hash); | ||
1342 | |||
1324 | hash[0] += current->pid + jiffies + get_cycles(); | 1343 | hash[0] += current->pid + jiffies + get_cycles(); |
1325 | md5_transform(hash, random_int_secret); | 1344 | md5_transform(hash, random_int_secret); |
1326 | ret = hash[0]; | 1345 | ret = hash[0]; |
diff --git a/drivers/char/raw.c b/drivers/char/raw.c index b33e8ea314ed..b6de2c047145 100644 --- a/drivers/char/raw.c +++ b/drivers/char/raw.c | |||
@@ -324,13 +324,12 @@ static int __init raw_init(void) | |||
324 | max_raw_minors = MAX_RAW_MINORS; | 324 | max_raw_minors = MAX_RAW_MINORS; |
325 | } | 325 | } |
326 | 326 | ||
327 | raw_devices = vmalloc(sizeof(struct raw_device_data) * max_raw_minors); | 327 | raw_devices = vzalloc(sizeof(struct raw_device_data) * max_raw_minors); |
328 | if (!raw_devices) { | 328 | if (!raw_devices) { |
329 | printk(KERN_ERR "Not enough memory for raw device structures\n"); | 329 | printk(KERN_ERR "Not enough memory for raw device structures\n"); |
330 | ret = -ENOMEM; | 330 | ret = -ENOMEM; |
331 | goto error; | 331 | goto error; |
332 | } | 332 | } |
333 | memset(raw_devices, 0, sizeof(struct raw_device_data) * max_raw_minors); | ||
334 | 333 | ||
335 | ret = register_chrdev_region(dev, max_raw_minors, "raw"); | 334 | ret = register_chrdev_region(dev, max_raw_minors, "raw"); |
336 | if (ret) | 335 | if (ret) |
diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c index dfa8b3062fda..ccd124ab7ca7 100644 --- a/drivers/char/rtc.c +++ b/drivers/char/rtc.c | |||
@@ -80,6 +80,7 @@ | |||
80 | #include <linux/bcd.h> | 80 | #include <linux/bcd.h> |
81 | #include <linux/delay.h> | 81 | #include <linux/delay.h> |
82 | #include <linux/uaccess.h> | 82 | #include <linux/uaccess.h> |
83 | #include <linux/ratelimit.h> | ||
83 | 84 | ||
84 | #include <asm/current.h> | 85 | #include <asm/current.h> |
85 | #include <asm/system.h> | 86 | #include <asm/system.h> |
@@ -1195,10 +1196,8 @@ static void rtc_dropped_irq(unsigned long data) | |||
1195 | 1196 | ||
1196 | spin_unlock_irq(&rtc_lock); | 1197 | spin_unlock_irq(&rtc_lock); |
1197 | 1198 | ||
1198 | if (printk_ratelimit()) { | 1199 | printk_ratelimited(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n", |
1199 | printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n", | 1200 | freq); |
1200 | freq); | ||
1201 | } | ||
1202 | 1201 | ||
1203 | /* Now we have new data */ | 1202 | /* Now we have new data */ |
1204 | wake_up_interruptible(&rtc_wait); | 1203 | wake_up_interruptible(&rtc_wait); |
diff --git a/drivers/char/scc.h b/drivers/char/scc.h deleted file mode 100644 index 341b1142bea8..000000000000 --- a/drivers/char/scc.h +++ /dev/null | |||
@@ -1,613 +0,0 @@ | |||
1 | /* | ||
2 | * atari_SCC.h: Definitions for the Am8530 Serial Communications Controller | ||
3 | * | ||
4 | * Copyright 1994 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de> | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file COPYING in the main directory of this archive | ||
8 | * for more details. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | |||
13 | #ifndef _SCC_H | ||
14 | #define _SCC_H | ||
15 | |||
16 | #include <linux/delay.h> | ||
17 | |||
18 | /* Special configuration ioctls for the Atari SCC5380 Serial | ||
19 | * Communications Controller | ||
20 | */ | ||
21 | |||
22 | /* ioctl command codes */ | ||
23 | |||
24 | #define TIOCGATSCC 0x54c0 /* get SCC configuration */ | ||
25 | #define TIOCSATSCC 0x54c1 /* set SCC configuration */ | ||
26 | #define TIOCDATSCC 0x54c2 /* reset configuration to defaults */ | ||
27 | |||
28 | /* Clock sources */ | ||
29 | |||
30 | #define CLK_RTxC 0 | ||
31 | #define CLK_TRxC 1 | ||
32 | #define CLK_PCLK 2 | ||
33 | |||
34 | /* baud_bases for the common clocks in the Atari. These are the real | ||
35 | * frequencies divided by 16. | ||
36 | */ | ||
37 | |||
38 | #define SCC_BAUD_BASE_TIMC 19200 /* 0.3072 MHz from TT-MFP, Timer C */ | ||
39 | #define SCC_BAUD_BASE_BCLK 153600 /* 2.4576 MHz */ | ||
40 | #define SCC_BAUD_BASE_PCLK4 229500 /* 3.6720 MHz */ | ||
41 | #define SCC_BAUD_BASE_PCLK 503374 /* 8.0539763 MHz */ | ||
42 | #define SCC_BAUD_BASE_NONE 0 /* for not connected or unused | ||
43 | * clock sources */ | ||
44 | |||
45 | /* The SCC clock configuration structure */ | ||
46 | |||
47 | struct scc_clock_config { | ||
48 | unsigned RTxC_base; /* base_baud of RTxC */ | ||
49 | unsigned TRxC_base; /* base_baud of TRxC */ | ||
50 | unsigned PCLK_base; /* base_baud of PCLK, both channels! */ | ||
51 | struct { | ||
52 | unsigned clksrc; /* CLK_RTxC, CLK_TRxC or CLK_PCLK */ | ||
53 | unsigned divisor; /* divisor for base baud, valid values: | ||
54 | * see below */ | ||
55 | } baud_table[17]; /* For 50, 75, 110, 135, 150, 200, 300, | ||
56 | * 600, 1200, 1800, 2400, 4800, 9600, | ||
57 | * 19200, 38400, 57600 and 115200 bps. | ||
58 | * The last two could be replaced by | ||
59 | * other rates > 38400 if they're not | ||
60 | * possible. | ||
61 | */ | ||
62 | }; | ||
63 | |||
64 | /* The following divisors are valid: | ||
65 | * | ||
66 | * - CLK_RTxC: 1 or even (1, 2 and 4 are the direct modes, > 4 use | ||
67 | * the BRG) | ||
68 | * | ||
69 | * - CLK_TRxC: 1, 2 or 4 (no BRG, only direct modes possible) | ||
70 | * | ||
71 | * - CLK_PCLK: >= 4 and even (no direct modes, only BRG) | ||
72 | * | ||
73 | */ | ||
74 | |||
75 | struct scc_port { | ||
76 | struct gs_port gs; | ||
77 | volatile unsigned char *ctrlp; | ||
78 | volatile unsigned char *datap; | ||
79 | int x_char; /* xon/xoff character */ | ||
80 | int c_dcd; | ||
81 | int channel; | ||
82 | struct scc_port *port_a; /* Reference to port A and B */ | ||
83 | struct scc_port *port_b; /* structs for reg access */ | ||
84 | }; | ||
85 | |||
86 | #define SCC_MAGIC 0x52696368 | ||
87 | |||
88 | /***********************************************************************/ | ||
89 | /* */ | ||
90 | /* Register Names */ | ||
91 | /* */ | ||
92 | /***********************************************************************/ | ||
93 | |||
94 | /* The SCC documentation gives no explicit names to the registers, | ||
95 | * they're just called WR0..15 and RR0..15. To make the source code | ||
96 | * better readable and make the transparent write reg read access (see | ||
97 | * below) possible, I christen them here with self-invented names. | ||
98 | * Note that (real) read registers are assigned numbers 16..31. WR7' | ||
99 | * has number 33. | ||
100 | */ | ||
101 | |||
102 | #define COMMAND_REG 0 /* wo */ | ||
103 | #define INT_AND_DMA_REG 1 /* wo */ | ||
104 | #define INT_VECTOR_REG 2 /* rw, common to both channels */ | ||
105 | #define RX_CTRL_REG 3 /* rw */ | ||
106 | #define AUX1_CTRL_REG 4 /* rw */ | ||
107 | #define TX_CTRL_REG 5 /* rw */ | ||
108 | #define SYNC_ADR_REG 6 /* wo */ | ||
109 | #define SYNC_CHAR_REG 7 /* wo */ | ||
110 | #define SDLC_OPTION_REG 33 /* wo */ | ||
111 | #define TX_DATA_REG 8 /* wo */ | ||
112 | #define MASTER_INT_CTRL 9 /* wo, common to both channels */ | ||
113 | #define AUX2_CTRL_REG 10 /* rw */ | ||
114 | #define CLK_CTRL_REG 11 /* wo */ | ||
115 | #define TIMER_LOW_REG 12 /* rw */ | ||
116 | #define TIMER_HIGH_REG 13 /* rw */ | ||
117 | #define DPLL_CTRL_REG 14 /* wo */ | ||
118 | #define INT_CTRL_REG 15 /* rw */ | ||
119 | |||
120 | #define STATUS_REG 16 /* ro */ | ||
121 | #define SPCOND_STATUS_REG 17 /* wo */ | ||
122 | /* RR2 is WR2 for Channel A, Channel B gives vector + current status: */ | ||
123 | #define CURR_VECTOR_REG 18 /* Ch. B only, Ch. A for rw */ | ||
124 | #define INT_PENDING_REG 19 /* Channel A only! */ | ||
125 | /* RR4 is WR4, if b6(MR7') == 1 */ | ||
126 | /* RR5 is WR5, if b6(MR7') == 1 */ | ||
127 | #define FS_FIFO_LOW_REG 22 /* ro */ | ||
128 | #define FS_FIFO_HIGH_REG 23 /* ro */ | ||
129 | #define RX_DATA_REG 24 /* ro */ | ||
130 | /* RR9 is WR3, if b6(MR7') == 1 */ | ||
131 | #define DPLL_STATUS_REG 26 /* ro */ | ||
132 | /* RR11 is WR10, if b6(MR7') == 1 */ | ||
133 | /* RR12 is WR12 */ | ||
134 | /* RR13 is WR13 */ | ||
135 | /* RR14 not present */ | ||
136 | /* RR15 is WR15 */ | ||
137 | |||
138 | |||
139 | /***********************************************************************/ | ||
140 | /* */ | ||
141 | /* Register Values */ | ||
142 | /* */ | ||
143 | /***********************************************************************/ | ||
144 | |||
145 | |||
146 | /* WR0: COMMAND_REG "CR" */ | ||
147 | |||
148 | #define CR_RX_CRC_RESET 0x40 | ||
149 | #define CR_TX_CRC_RESET 0x80 | ||
150 | #define CR_TX_UNDERRUN_RESET 0xc0 | ||
151 | |||
152 | #define CR_EXTSTAT_RESET 0x10 | ||
153 | #define CR_SEND_ABORT 0x18 | ||
154 | #define CR_ENAB_INT_NEXT_RX 0x20 | ||
155 | #define CR_TX_PENDING_RESET 0x28 | ||
156 | #define CR_ERROR_RESET 0x30 | ||
157 | #define CR_HIGHEST_IUS_RESET 0x38 | ||
158 | |||
159 | |||
160 | /* WR1: INT_AND_DMA_REG "IDR" */ | ||
161 | |||
162 | #define IDR_EXTSTAT_INT_ENAB 0x01 | ||
163 | #define IDR_TX_INT_ENAB 0x02 | ||
164 | #define IDR_PARERR_AS_SPCOND 0x04 | ||
165 | |||
166 | #define IDR_RX_INT_DISAB 0x00 | ||
167 | #define IDR_RX_INT_FIRST 0x08 | ||
168 | #define IDR_RX_INT_ALL 0x10 | ||
169 | #define IDR_RX_INT_SPCOND 0x18 | ||
170 | #define IDR_RX_INT_MASK 0x18 | ||
171 | |||
172 | #define IDR_WAITREQ_RX 0x20 | ||
173 | #define IDR_WAITREQ_IS_REQ 0x40 | ||
174 | #define IDR_WAITREQ_ENAB 0x80 | ||
175 | |||
176 | |||
177 | /* WR3: RX_CTRL_REG "RCR" */ | ||
178 | |||
179 | #define RCR_RX_ENAB 0x01 | ||
180 | #define RCR_DISCARD_SYNC_CHARS 0x02 | ||
181 | #define RCR_ADDR_SEARCH 0x04 | ||
182 | #define RCR_CRC_ENAB 0x08 | ||
183 | #define RCR_SEARCH_MODE 0x10 | ||
184 | #define RCR_AUTO_ENAB_MODE 0x20 | ||
185 | |||
186 | #define RCR_CHSIZE_MASK 0xc0 | ||
187 | #define RCR_CHSIZE_5 0x00 | ||
188 | #define RCR_CHSIZE_6 0x40 | ||
189 | #define RCR_CHSIZE_7 0x80 | ||
190 | #define RCR_CHSIZE_8 0xc0 | ||
191 | |||
192 | |||
193 | /* WR4: AUX1_CTRL_REG "A1CR" */ | ||
194 | |||
195 | #define A1CR_PARITY_MASK 0x03 | ||
196 | #define A1CR_PARITY_NONE 0x00 | ||
197 | #define A1CR_PARITY_ODD 0x01 | ||
198 | #define A1CR_PARITY_EVEN 0x03 | ||
199 | |||
200 | #define A1CR_MODE_MASK 0x0c | ||
201 | #define A1CR_MODE_SYNCR 0x00 | ||
202 | #define A1CR_MODE_ASYNC_1 0x04 | ||
203 | #define A1CR_MODE_ASYNC_15 0x08 | ||
204 | #define A1CR_MODE_ASYNC_2 0x0c | ||
205 | |||
206 | #define A1CR_SYNCR_MODE_MASK 0x30 | ||
207 | #define A1CR_SYNCR_MONOSYNC 0x00 | ||
208 | #define A1CR_SYNCR_BISYNC 0x10 | ||
209 | #define A1CR_SYNCR_SDLC 0x20 | ||
210 | #define A1CR_SYNCR_EXTCSYNC 0x30 | ||
211 | |||
212 | #define A1CR_CLKMODE_MASK 0xc0 | ||
213 | #define A1CR_CLKMODE_x1 0x00 | ||
214 | #define A1CR_CLKMODE_x16 0x40 | ||
215 | #define A1CR_CLKMODE_x32 0x80 | ||
216 | #define A1CR_CLKMODE_x64 0xc0 | ||
217 | |||
218 | |||
219 | /* WR5: TX_CTRL_REG "TCR" */ | ||
220 | |||
221 | #define TCR_TX_CRC_ENAB 0x01 | ||
222 | #define TCR_RTS 0x02 | ||
223 | #define TCR_USE_CRC_CCITT 0x00 | ||
224 | #define TCR_USE_CRC_16 0x04 | ||
225 | #define TCR_TX_ENAB 0x08 | ||
226 | #define TCR_SEND_BREAK 0x10 | ||
227 | |||
228 | #define TCR_CHSIZE_MASK 0x60 | ||
229 | #define TCR_CHSIZE_5 0x00 | ||
230 | #define TCR_CHSIZE_6 0x20 | ||
231 | #define TCR_CHSIZE_7 0x40 | ||
232 | #define TCR_CHSIZE_8 0x60 | ||
233 | |||
234 | #define TCR_DTR 0x80 | ||
235 | |||
236 | |||
237 | /* WR7': SLDC_OPTION_REG "SOR" */ | ||
238 | |||
239 | #define SOR_AUTO_TX_ENAB 0x01 | ||
240 | #define SOR_AUTO_EOM_RESET 0x02 | ||
241 | #define SOR_AUTO_RTS_MODE 0x04 | ||
242 | #define SOR_NRZI_DISAB_HIGH 0x08 | ||
243 | #define SOR_ALT_DTRREQ_TIMING 0x10 | ||
244 | #define SOR_READ_CRC_CHARS 0x20 | ||
245 | #define SOR_EXTENDED_REG_ACCESS 0x40 | ||
246 | |||
247 | |||
248 | /* WR9: MASTER_INT_CTRL "MIC" */ | ||
249 | |||
250 | #define MIC_VEC_INCL_STAT 0x01 | ||
251 | #define MIC_NO_VECTOR 0x02 | ||
252 | #define MIC_DISAB_LOWER_CHAIN 0x04 | ||
253 | #define MIC_MASTER_INT_ENAB 0x08 | ||
254 | #define MIC_STATUS_HIGH 0x10 | ||
255 | #define MIC_IGN_INTACK 0x20 | ||
256 | |||
257 | #define MIC_NO_RESET 0x00 | ||
258 | #define MIC_CH_A_RESET 0x40 | ||
259 | #define MIC_CH_B_RESET 0x80 | ||
260 | #define MIC_HARD_RESET 0xc0 | ||
261 | |||
262 | |||
263 | /* WR10: AUX2_CTRL_REG "A2CR" */ | ||
264 | |||
265 | #define A2CR_SYNC_6 0x01 | ||
266 | #define A2CR_LOOP_MODE 0x02 | ||
267 | #define A2CR_ABORT_ON_UNDERRUN 0x04 | ||
268 | #define A2CR_MARK_IDLE 0x08 | ||
269 | #define A2CR_GO_ACTIVE_ON_POLL 0x10 | ||
270 | |||
271 | #define A2CR_CODING_MASK 0x60 | ||
272 | #define A2CR_CODING_NRZ 0x00 | ||
273 | #define A2CR_CODING_NRZI 0x20 | ||
274 | #define A2CR_CODING_FM1 0x40 | ||
275 | #define A2CR_CODING_FM0 0x60 | ||
276 | |||
277 | #define A2CR_PRESET_CRC_1 0x80 | ||
278 | |||
279 | |||
280 | /* WR11: CLK_CTRL_REG "CCR" */ | ||
281 | |||
282 | #define CCR_TRxCOUT_MASK 0x03 | ||
283 | #define CCR_TRxCOUT_XTAL 0x00 | ||
284 | #define CCR_TRxCOUT_TXCLK 0x01 | ||
285 | #define CCR_TRxCOUT_BRG 0x02 | ||
286 | #define CCR_TRxCOUT_DPLL 0x03 | ||
287 | |||
288 | #define CCR_TRxC_OUTPUT 0x04 | ||
289 | |||
290 | #define CCR_TXCLK_MASK 0x18 | ||
291 | #define CCR_TXCLK_RTxC 0x00 | ||
292 | #define CCR_TXCLK_TRxC 0x08 | ||
293 | #define CCR_TXCLK_BRG 0x10 | ||
294 | #define CCR_TXCLK_DPLL 0x18 | ||
295 | |||
296 | #define CCR_RXCLK_MASK 0x60 | ||
297 | #define CCR_RXCLK_RTxC 0x00 | ||
298 | #define CCR_RXCLK_TRxC 0x20 | ||
299 | #define CCR_RXCLK_BRG 0x40 | ||
300 | #define CCR_RXCLK_DPLL 0x60 | ||
301 | |||
302 | #define CCR_RTxC_XTAL 0x80 | ||
303 | |||
304 | |||
305 | /* WR14: DPLL_CTRL_REG "DCR" */ | ||
306 | |||
307 | #define DCR_BRG_ENAB 0x01 | ||
308 | #define DCR_BRG_USE_PCLK 0x02 | ||
309 | #define DCR_DTRREQ_IS_REQ 0x04 | ||
310 | #define DCR_AUTO_ECHO 0x08 | ||
311 | #define DCR_LOCAL_LOOPBACK 0x10 | ||
312 | |||
313 | #define DCR_DPLL_EDGE_SEARCH 0x20 | ||
314 | #define DCR_DPLL_ERR_RESET 0x40 | ||
315 | #define DCR_DPLL_DISAB 0x60 | ||
316 | #define DCR_DPLL_CLK_BRG 0x80 | ||
317 | #define DCR_DPLL_CLK_RTxC 0xa0 | ||
318 | #define DCR_DPLL_FM 0xc0 | ||
319 | #define DCR_DPLL_NRZI 0xe0 | ||
320 | |||
321 | |||
322 | /* WR15: INT_CTRL_REG "ICR" */ | ||
323 | |||
324 | #define ICR_OPTIONREG_SELECT 0x01 | ||
325 | #define ICR_ENAB_BRG_ZERO_INT 0x02 | ||
326 | #define ICR_USE_FS_FIFO 0x04 | ||
327 | #define ICR_ENAB_DCD_INT 0x08 | ||
328 | #define ICR_ENAB_SYNC_INT 0x10 | ||
329 | #define ICR_ENAB_CTS_INT 0x20 | ||
330 | #define ICR_ENAB_UNDERRUN_INT 0x40 | ||
331 | #define ICR_ENAB_BREAK_INT 0x80 | ||
332 | |||
333 | |||
334 | /* RR0: STATUS_REG "SR" */ | ||
335 | |||
336 | #define SR_CHAR_AVAIL 0x01 | ||
337 | #define SR_BRG_ZERO 0x02 | ||
338 | #define SR_TX_BUF_EMPTY 0x04 | ||
339 | #define SR_DCD 0x08 | ||
340 | #define SR_SYNC_ABORT 0x10 | ||
341 | #define SR_CTS 0x20 | ||
342 | #define SR_TX_UNDERRUN 0x40 | ||
343 | #define SR_BREAK 0x80 | ||
344 | |||
345 | |||
346 | /* RR1: SPCOND_STATUS_REG "SCSR" */ | ||
347 | |||
348 | #define SCSR_ALL_SENT 0x01 | ||
349 | #define SCSR_RESIDUAL_MASK 0x0e | ||
350 | #define SCSR_PARITY_ERR 0x10 | ||
351 | #define SCSR_RX_OVERRUN 0x20 | ||
352 | #define SCSR_CRC_FRAME_ERR 0x40 | ||
353 | #define SCSR_END_OF_FRAME 0x80 | ||
354 | |||
355 | |||
356 | /* RR3: INT_PENDING_REG "IPR" */ | ||
357 | |||
358 | #define IPR_B_EXTSTAT 0x01 | ||
359 | #define IPR_B_TX 0x02 | ||
360 | #define IPR_B_RX 0x04 | ||
361 | #define IPR_A_EXTSTAT 0x08 | ||
362 | #define IPR_A_TX 0x10 | ||
363 | #define IPR_A_RX 0x20 | ||
364 | |||
365 | |||
366 | /* RR7: FS_FIFO_HIGH_REG "FFHR" */ | ||
367 | |||
368 | #define FFHR_CNT_MASK 0x3f | ||
369 | #define FFHR_IS_FROM_FIFO 0x40 | ||
370 | #define FFHR_FIFO_OVERRUN 0x80 | ||
371 | |||
372 | |||
373 | /* RR10: DPLL_STATUS_REG "DSR" */ | ||
374 | |||
375 | #define DSR_ON_LOOP 0x02 | ||
376 | #define DSR_ON_LOOP_SENDING 0x10 | ||
377 | #define DSR_TWO_CLK_MISSING 0x40 | ||
378 | #define DSR_ONE_CLK_MISSING 0x80 | ||
379 | |||
380 | /***********************************************************************/ | ||
381 | /* */ | ||
382 | /* Register Access */ | ||
383 | /* */ | ||
384 | /***********************************************************************/ | ||
385 | |||
386 | |||
387 | /* The SCC needs 3.5 PCLK cycles recovery time between to register | ||
388 | * accesses. PCLK runs with 8 MHz on an Atari, so this delay is 3.5 * | ||
389 | * 125 ns = 437.5 ns. This is too short for udelay(). | ||
390 | * 10/16/95: A tstb st_mfp.par_dt_reg takes 600ns (sure?) and thus should be | ||
391 | * quite right | ||
392 | */ | ||
393 | |||
394 | #define scc_reg_delay() \ | ||
395 | do { \ | ||
396 | if (MACH_IS_MVME16x || MACH_IS_BVME6000 || MACH_IS_MVME147) \ | ||
397 | __asm__ __volatile__ ( " nop; nop"); \ | ||
398 | else if (MACH_IS_ATARI) \ | ||
399 | __asm__ __volatile__ ( "tstb %0" : : "g" (*_scc_del) : "cc" );\ | ||
400 | } while (0) | ||
401 | |||
402 | static unsigned char scc_shadow[2][16]; | ||
403 | |||
404 | /* The following functions should relax the somehow complicated | ||
405 | * register access of the SCC. _SCCwrite() stores all written values | ||
406 | * (except for WR0 and WR8) in shadow registers for later recall. This | ||
407 | * removes the burden of remembering written values as needed. The | ||
408 | * extra work of storing the value doesn't count, since a delay is | ||
409 | * needed after a SCC access anyway. Additionally, _SCCwrite() manages | ||
410 | * writes to WR0 and WR8 differently, because these can be accessed | ||
411 | * directly with less overhead. Another special case are WR7 and WR7'. | ||
412 | * _SCCwrite automatically checks what of this registers is selected | ||
413 | * and changes b0 of WR15 if needed. | ||
414 | * | ||
415 | * _SCCread() for standard read registers is straightforward, except | ||
416 | * for RR2 (split into two "virtual" registers: one for the value | ||
417 | * written to WR2 (from the shadow) and one for the vector including | ||
418 | * status from RR2, Ch. B) and RR3. The latter must be read from | ||
419 | * Channel A, because it reads as all zeros on Ch. B. RR0 and RR8 can | ||
420 | * be accessed directly as before. | ||
421 | * | ||
422 | * The two inline function contain complicated switch statements. But | ||
423 | * I rely on regno and final_delay being constants, so gcc can reduce | ||
424 | * the whole stuff to just some assembler statements. | ||
425 | * | ||
426 | * _SCCwrite and _SCCread aren't intended to be used directly under | ||
427 | * normal circumstances. The macros SCCread[_ND] and SCCwrite[_ND] are | ||
428 | * for that purpose. They assume that a local variable 'port' is | ||
429 | * declared and pointing to the port's scc_struct entry. The | ||
430 | * variants with "_NB" appended should be used if no other SCC | ||
431 | * accesses follow immediately (within 0.5 usecs). They just skip the | ||
432 | * final delay nops. | ||
433 | * | ||
434 | * Please note that accesses to SCC registers should only take place | ||
435 | * when interrupts are turned off (at least if SCC interrupts are | ||
436 | * enabled). Otherwise, an interrupt could interfere with the | ||
437 | * two-stage accessing process. | ||
438 | * | ||
439 | */ | ||
440 | |||
441 | |||
442 | static __inline__ void _SCCwrite( | ||
443 | struct scc_port *port, | ||
444 | unsigned char *shadow, | ||
445 | volatile unsigned char *_scc_del, | ||
446 | int regno, | ||
447 | unsigned char val, int final_delay ) | ||
448 | { | ||
449 | switch( regno ) { | ||
450 | |||
451 | case COMMAND_REG: | ||
452 | /* WR0 can be written directly without pointing */ | ||
453 | *port->ctrlp = val; | ||
454 | break; | ||
455 | |||
456 | case SYNC_CHAR_REG: | ||
457 | /* For WR7, first set b0 of WR15 to 0, if needed */ | ||
458 | if (shadow[INT_CTRL_REG] & ICR_OPTIONREG_SELECT) { | ||
459 | *port->ctrlp = 15; | ||
460 | shadow[INT_CTRL_REG] &= ~ICR_OPTIONREG_SELECT; | ||
461 | scc_reg_delay(); | ||
462 | *port->ctrlp = shadow[INT_CTRL_REG]; | ||
463 | scc_reg_delay(); | ||
464 | } | ||
465 | goto normal_case; | ||
466 | |||
467 | case SDLC_OPTION_REG: | ||
468 | /* For WR7', first set b0 of WR15 to 1, if needed */ | ||
469 | if (!(shadow[INT_CTRL_REG] & ICR_OPTIONREG_SELECT)) { | ||
470 | *port->ctrlp = 15; | ||
471 | shadow[INT_CTRL_REG] |= ICR_OPTIONREG_SELECT; | ||
472 | scc_reg_delay(); | ||
473 | *port->ctrlp = shadow[INT_CTRL_REG]; | ||
474 | scc_reg_delay(); | ||
475 | } | ||
476 | *port->ctrlp = 7; | ||
477 | shadow[8] = val; /* WR7' shadowed at WR8 */ | ||
478 | scc_reg_delay(); | ||
479 | *port->ctrlp = val; | ||
480 | break; | ||
481 | |||
482 | case TX_DATA_REG: /* WR8 */ | ||
483 | /* TX_DATA_REG can be accessed directly on some h/w */ | ||
484 | if (MACH_IS_MVME16x || MACH_IS_BVME6000 || MACH_IS_MVME147) | ||
485 | { | ||
486 | *port->ctrlp = regno; | ||
487 | scc_reg_delay(); | ||
488 | *port->ctrlp = val; | ||
489 | } | ||
490 | else | ||
491 | *port->datap = val; | ||
492 | break; | ||
493 | |||
494 | case MASTER_INT_CTRL: | ||
495 | *port->ctrlp = regno; | ||
496 | val &= 0x3f; /* bits 6..7 are the reset commands */ | ||
497 | scc_shadow[0][regno] = val; | ||
498 | scc_reg_delay(); | ||
499 | *port->ctrlp = val; | ||
500 | break; | ||
501 | |||
502 | case DPLL_CTRL_REG: | ||
503 | *port->ctrlp = regno; | ||
504 | val &= 0x1f; /* bits 5..7 are the DPLL commands */ | ||
505 | shadow[regno] = val; | ||
506 | scc_reg_delay(); | ||
507 | *port->ctrlp = val; | ||
508 | break; | ||
509 | |||
510 | case 1 ... 6: | ||
511 | case 10 ... 13: | ||
512 | case 15: | ||
513 | normal_case: | ||
514 | *port->ctrlp = regno; | ||
515 | shadow[regno] = val; | ||
516 | scc_reg_delay(); | ||
517 | *port->ctrlp = val; | ||
518 | break; | ||
519 | |||
520 | default: | ||
521 | printk( "Bad SCC write access to WR%d\n", regno ); | ||
522 | break; | ||
523 | |||
524 | } | ||
525 | |||
526 | if (final_delay) | ||
527 | scc_reg_delay(); | ||
528 | } | ||
529 | |||
530 | |||
531 | static __inline__ unsigned char _SCCread( | ||
532 | struct scc_port *port, | ||
533 | unsigned char *shadow, | ||
534 | volatile unsigned char *_scc_del, | ||
535 | int regno, int final_delay ) | ||
536 | { | ||
537 | unsigned char rv; | ||
538 | |||
539 | switch( regno ) { | ||
540 | |||
541 | /* --- real read registers --- */ | ||
542 | case STATUS_REG: | ||
543 | rv = *port->ctrlp; | ||
544 | break; | ||
545 | |||
546 | case INT_PENDING_REG: | ||
547 | /* RR3: read only from Channel A! */ | ||
548 | port = port->port_a; | ||
549 | goto normal_case; | ||
550 | |||
551 | case RX_DATA_REG: | ||
552 | /* RR8 can be accessed directly on some h/w */ | ||
553 | if (MACH_IS_MVME16x || MACH_IS_BVME6000 || MACH_IS_MVME147) | ||
554 | { | ||
555 | *port->ctrlp = 8; | ||
556 | scc_reg_delay(); | ||
557 | rv = *port->ctrlp; | ||
558 | } | ||
559 | else | ||
560 | rv = *port->datap; | ||
561 | break; | ||
562 | |||
563 | case CURR_VECTOR_REG: | ||
564 | /* RR2 (vector including status) from Ch. B */ | ||
565 | port = port->port_b; | ||
566 | goto normal_case; | ||
567 | |||
568 | /* --- reading write registers: access the shadow --- */ | ||
569 | case 1 ... 7: | ||
570 | case 10 ... 15: | ||
571 | return shadow[regno]; /* no final delay! */ | ||
572 | |||
573 | /* WR7' is special, because it is shadowed at the place of WR8 */ | ||
574 | case SDLC_OPTION_REG: | ||
575 | return shadow[8]; /* no final delay! */ | ||
576 | |||
577 | /* WR9 is special too, because it is common for both channels */ | ||
578 | case MASTER_INT_CTRL: | ||
579 | return scc_shadow[0][9]; /* no final delay! */ | ||
580 | |||
581 | default: | ||
582 | printk( "Bad SCC read access to %cR%d\n", (regno & 16) ? 'R' : 'W', | ||
583 | regno & ~16 ); | ||
584 | break; | ||
585 | |||
586 | case SPCOND_STATUS_REG: | ||
587 | case FS_FIFO_LOW_REG: | ||
588 | case FS_FIFO_HIGH_REG: | ||
589 | case DPLL_STATUS_REG: | ||
590 | normal_case: | ||
591 | *port->ctrlp = regno & 0x0f; | ||
592 | scc_reg_delay(); | ||
593 | rv = *port->ctrlp; | ||
594 | break; | ||
595 | |||
596 | } | ||
597 | |||
598 | if (final_delay) | ||
599 | scc_reg_delay(); | ||
600 | return rv; | ||
601 | } | ||
602 | |||
603 | #define SCC_ACCESS_INIT(port) \ | ||
604 | unsigned char *_scc_shadow = &scc_shadow[port->channel][0] | ||
605 | |||
606 | #define SCCwrite(reg,val) _SCCwrite(port,_scc_shadow,scc_del,(reg),(val),1) | ||
607 | #define SCCwrite_NB(reg,val) _SCCwrite(port,_scc_shadow,scc_del,(reg),(val),0) | ||
608 | #define SCCread(reg) _SCCread(port,_scc_shadow,scc_del,(reg),1) | ||
609 | #define SCCread_NB(reg) _SCCread(port,_scc_shadow,scc_del,(reg),0) | ||
610 | |||
611 | #define SCCmod(reg,and,or) SCCwrite((reg),(SCCread(reg)&(and))|(or)) | ||
612 | |||
613 | #endif /* _SCC_H */ | ||
diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig index f6595aba4f0f..fa567f1158c2 100644 --- a/drivers/char/tpm/Kconfig +++ b/drivers/char/tpm/Kconfig | |||
@@ -43,6 +43,7 @@ config TCG_NSC | |||
43 | 43 | ||
44 | config TCG_ATMEL | 44 | config TCG_ATMEL |
45 | tristate "Atmel TPM Interface" | 45 | tristate "Atmel TPM Interface" |
46 | depends on PPC64 || HAS_IOPORT | ||
46 | ---help--- | 47 | ---help--- |
47 | If you have a TPM security chip from Atmel say Yes and it | 48 | If you have a TPM security chip from Atmel say Yes and it |
48 | will be accessible from within Linux. To compile this driver | 49 | will be accessible from within Linux. To compile this driver |
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c index caf8012ef47c..361a1dff8f77 100644 --- a/drivers/char/tpm/tpm.c +++ b/drivers/char/tpm/tpm.c | |||
@@ -383,6 +383,9 @@ static ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf, | |||
383 | u32 count, ordinal; | 383 | u32 count, ordinal; |
384 | unsigned long stop; | 384 | unsigned long stop; |
385 | 385 | ||
386 | if (bufsiz > TPM_BUFSIZE) | ||
387 | bufsiz = TPM_BUFSIZE; | ||
388 | |||
386 | count = be32_to_cpu(*((__be32 *) (buf + 2))); | 389 | count = be32_to_cpu(*((__be32 *) (buf + 2))); |
387 | ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); | 390 | ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); |
388 | if (count == 0) | 391 | if (count == 0) |
@@ -963,6 +966,9 @@ ssize_t tpm_show_durations(struct device *dev, struct device_attribute *attr, | |||
963 | { | 966 | { |
964 | struct tpm_chip *chip = dev_get_drvdata(dev); | 967 | struct tpm_chip *chip = dev_get_drvdata(dev); |
965 | 968 | ||
969 | if (chip->vendor.duration[TPM_LONG] == 0) | ||
970 | return 0; | ||
971 | |||
966 | return sprintf(buf, "%d %d %d [%s]\n", | 972 | return sprintf(buf, "%d %d %d [%s]\n", |
967 | jiffies_to_usecs(chip->vendor.duration[TPM_SHORT]), | 973 | jiffies_to_usecs(chip->vendor.duration[TPM_SHORT]), |
968 | jiffies_to_usecs(chip->vendor.duration[TPM_MEDIUM]), | 974 | jiffies_to_usecs(chip->vendor.duration[TPM_MEDIUM]), |
@@ -1102,6 +1108,7 @@ ssize_t tpm_read(struct file *file, char __user *buf, | |||
1102 | { | 1108 | { |
1103 | struct tpm_chip *chip = file->private_data; | 1109 | struct tpm_chip *chip = file->private_data; |
1104 | ssize_t ret_size; | 1110 | ssize_t ret_size; |
1111 | int rc; | ||
1105 | 1112 | ||
1106 | del_singleshot_timer_sync(&chip->user_read_timer); | 1113 | del_singleshot_timer_sync(&chip->user_read_timer); |
1107 | flush_work_sync(&chip->work); | 1114 | flush_work_sync(&chip->work); |
@@ -1112,8 +1119,11 @@ ssize_t tpm_read(struct file *file, char __user *buf, | |||
1112 | ret_size = size; | 1119 | ret_size = size; |
1113 | 1120 | ||
1114 | mutex_lock(&chip->buffer_mutex); | 1121 | mutex_lock(&chip->buffer_mutex); |
1115 | if (copy_to_user(buf, chip->data_buffer, ret_size)) | 1122 | rc = copy_to_user(buf, chip->data_buffer, ret_size); |
1123 | memset(chip->data_buffer, 0, ret_size); | ||
1124 | if (rc) | ||
1116 | ret_size = -EFAULT; | 1125 | ret_size = -EFAULT; |
1126 | |||
1117 | mutex_unlock(&chip->buffer_mutex); | 1127 | mutex_unlock(&chip->buffer_mutex); |
1118 | } | 1128 | } |
1119 | 1129 | ||
diff --git a/drivers/char/tpm/tpm_nsc.c b/drivers/char/tpm/tpm_nsc.c index 82facc9104c7..4d2464871ada 100644 --- a/drivers/char/tpm/tpm_nsc.c +++ b/drivers/char/tpm/tpm_nsc.c | |||
@@ -396,8 +396,6 @@ static void __exit cleanup_nsc(void) | |||
396 | if (pdev) { | 396 | if (pdev) { |
397 | tpm_nsc_remove(&pdev->dev); | 397 | tpm_nsc_remove(&pdev->dev); |
398 | platform_device_unregister(pdev); | 398 | platform_device_unregister(pdev); |
399 | kfree(pdev); | ||
400 | pdev = NULL; | ||
401 | } | 399 | } |
402 | 400 | ||
403 | platform_driver_unregister(&nsc_drv); | 401 | platform_driver_unregister(&nsc_drv); |
diff --git a/drivers/char/ttyprintk.c b/drivers/char/ttyprintk.c index a1f68af4ccf4..eedd5474850c 100644 --- a/drivers/char/ttyprintk.c +++ b/drivers/char/ttyprintk.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/device.h> | 17 | #include <linux/device.h> |
18 | #include <linux/serial.h> | 18 | #include <linux/serial.h> |
19 | #include <linux/tty.h> | 19 | #include <linux/tty.h> |
20 | #include <linux/export.h> | ||
20 | 21 | ||
21 | struct ttyprintk_port { | 22 | struct ttyprintk_port { |
22 | struct tty_port port; | 23 | struct tty_port port; |
@@ -170,7 +171,7 @@ static const struct tty_operations ttyprintk_ops = { | |||
170 | .ioctl = tpk_ioctl, | 171 | .ioctl = tpk_ioctl, |
171 | }; | 172 | }; |
172 | 173 | ||
173 | struct tty_port_operations null_ops = { }; | 174 | static struct tty_port_operations null_ops = { }; |
174 | 175 | ||
175 | static struct tty_driver *ttyprintk_driver; | 176 | static struct tty_driver *ttyprintk_driver; |
176 | 177 | ||
diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c index fb68b1295373..8e3c46d67cb3 100644 --- a/drivers/char/virtio_console.c +++ b/drivers/char/virtio_console.c | |||
@@ -19,8 +19,10 @@ | |||
19 | */ | 19 | */ |
20 | #include <linux/cdev.h> | 20 | #include <linux/cdev.h> |
21 | #include <linux/debugfs.h> | 21 | #include <linux/debugfs.h> |
22 | #include <linux/completion.h> | ||
22 | #include <linux/device.h> | 23 | #include <linux/device.h> |
23 | #include <linux/err.h> | 24 | #include <linux/err.h> |
25 | #include <linux/freezer.h> | ||
24 | #include <linux/fs.h> | 26 | #include <linux/fs.h> |
25 | #include <linux/init.h> | 27 | #include <linux/init.h> |
26 | #include <linux/list.h> | 28 | #include <linux/list.h> |
@@ -32,6 +34,7 @@ | |||
32 | #include <linux/virtio_console.h> | 34 | #include <linux/virtio_console.h> |
33 | #include <linux/wait.h> | 35 | #include <linux/wait.h> |
34 | #include <linux/workqueue.h> | 36 | #include <linux/workqueue.h> |
37 | #include <linux/module.h> | ||
35 | #include "../tty/hvc/hvc_console.h" | 38 | #include "../tty/hvc/hvc_console.h" |
36 | 39 | ||
37 | /* | 40 | /* |
@@ -73,6 +76,7 @@ struct ports_driver_data { | |||
73 | static struct ports_driver_data pdrvdata; | 76 | static struct ports_driver_data pdrvdata; |
74 | 77 | ||
75 | DEFINE_SPINLOCK(pdrvdata_lock); | 78 | DEFINE_SPINLOCK(pdrvdata_lock); |
79 | DECLARE_COMPLETION(early_console_added); | ||
76 | 80 | ||
77 | /* This struct holds information that's relevant only for console ports */ | 81 | /* This struct holds information that's relevant only for console ports */ |
78 | struct console { | 82 | struct console { |
@@ -151,6 +155,10 @@ struct ports_device { | |||
151 | int chr_major; | 155 | int chr_major; |
152 | }; | 156 | }; |
153 | 157 | ||
158 | struct port_stats { | ||
159 | unsigned long bytes_sent, bytes_received, bytes_discarded; | ||
160 | }; | ||
161 | |||
154 | /* This struct holds the per-port data */ | 162 | /* This struct holds the per-port data */ |
155 | struct port { | 163 | struct port { |
156 | /* Next port in the list, head is in the ports_device */ | 164 | /* Next port in the list, head is in the ports_device */ |
@@ -179,6 +187,13 @@ struct port { | |||
179 | struct dentry *debugfs_file; | 187 | struct dentry *debugfs_file; |
180 | 188 | ||
181 | /* | 189 | /* |
190 | * Keep count of the bytes sent, received and discarded for | ||
191 | * this port for accounting and debugging purposes. These | ||
192 | * counts are not reset across port open / close events. | ||
193 | */ | ||
194 | struct port_stats stats; | ||
195 | |||
196 | /* | ||
182 | * The entries in this struct will be valid if this port is | 197 | * The entries in this struct will be valid if this port is |
183 | * hooked up to an hvc console | 198 | * hooked up to an hvc console |
184 | */ | 199 | */ |
@@ -347,17 +362,19 @@ fail: | |||
347 | } | 362 | } |
348 | 363 | ||
349 | /* Callers should take appropriate locks */ | 364 | /* Callers should take appropriate locks */ |
350 | static void *get_inbuf(struct port *port) | 365 | static struct port_buffer *get_inbuf(struct port *port) |
351 | { | 366 | { |
352 | struct port_buffer *buf; | 367 | struct port_buffer *buf; |
353 | struct virtqueue *vq; | ||
354 | unsigned int len; | 368 | unsigned int len; |
355 | 369 | ||
356 | vq = port->in_vq; | 370 | if (port->inbuf) |
357 | buf = virtqueue_get_buf(vq, &len); | 371 | return port->inbuf; |
372 | |||
373 | buf = virtqueue_get_buf(port->in_vq, &len); | ||
358 | if (buf) { | 374 | if (buf) { |
359 | buf->len = len; | 375 | buf->len = len; |
360 | buf->offset = 0; | 376 | buf->offset = 0; |
377 | port->stats.bytes_received += len; | ||
361 | } | 378 | } |
362 | return buf; | 379 | return buf; |
363 | } | 380 | } |
@@ -384,32 +401,27 @@ static int add_inbuf(struct virtqueue *vq, struct port_buffer *buf) | |||
384 | static void discard_port_data(struct port *port) | 401 | static void discard_port_data(struct port *port) |
385 | { | 402 | { |
386 | struct port_buffer *buf; | 403 | struct port_buffer *buf; |
387 | struct virtqueue *vq; | 404 | unsigned int err; |
388 | unsigned int len; | ||
389 | int ret; | ||
390 | 405 | ||
391 | if (!port->portdev) { | 406 | if (!port->portdev) { |
392 | /* Device has been unplugged. vqs are already gone. */ | 407 | /* Device has been unplugged. vqs are already gone. */ |
393 | return; | 408 | return; |
394 | } | 409 | } |
395 | vq = port->in_vq; | 410 | buf = get_inbuf(port); |
396 | if (port->inbuf) | ||
397 | buf = port->inbuf; | ||
398 | else | ||
399 | buf = virtqueue_get_buf(vq, &len); | ||
400 | 411 | ||
401 | ret = 0; | 412 | err = 0; |
402 | while (buf) { | 413 | while (buf) { |
403 | if (add_inbuf(vq, buf) < 0) { | 414 | port->stats.bytes_discarded += buf->len - buf->offset; |
404 | ret++; | 415 | if (add_inbuf(port->in_vq, buf) < 0) { |
416 | err++; | ||
405 | free_buf(buf); | 417 | free_buf(buf); |
406 | } | 418 | } |
407 | buf = virtqueue_get_buf(vq, &len); | 419 | port->inbuf = NULL; |
420 | buf = get_inbuf(port); | ||
408 | } | 421 | } |
409 | port->inbuf = NULL; | 422 | if (err) |
410 | if (ret) | ||
411 | dev_warn(port->dev, "Errors adding %d buffers back to vq\n", | 423 | dev_warn(port->dev, "Errors adding %d buffers back to vq\n", |
412 | ret); | 424 | err); |
413 | } | 425 | } |
414 | 426 | ||
415 | static bool port_has_data(struct port *port) | 427 | static bool port_has_data(struct port *port) |
@@ -417,18 +429,12 @@ static bool port_has_data(struct port *port) | |||
417 | unsigned long flags; | 429 | unsigned long flags; |
418 | bool ret; | 430 | bool ret; |
419 | 431 | ||
432 | ret = false; | ||
420 | spin_lock_irqsave(&port->inbuf_lock, flags); | 433 | spin_lock_irqsave(&port->inbuf_lock, flags); |
421 | if (port->inbuf) { | ||
422 | ret = true; | ||
423 | goto out; | ||
424 | } | ||
425 | port->inbuf = get_inbuf(port); | 434 | port->inbuf = get_inbuf(port); |
426 | if (port->inbuf) { | 435 | if (port->inbuf) |
427 | ret = true; | 436 | ret = true; |
428 | goto out; | 437 | |
429 | } | ||
430 | ret = false; | ||
431 | out: | ||
432 | spin_unlock_irqrestore(&port->inbuf_lock, flags); | 438 | spin_unlock_irqrestore(&port->inbuf_lock, flags); |
433 | return ret; | 439 | return ret; |
434 | } | 440 | } |
@@ -529,6 +535,8 @@ static ssize_t send_buf(struct port *port, void *in_buf, size_t in_count, | |||
529 | cpu_relax(); | 535 | cpu_relax(); |
530 | done: | 536 | done: |
531 | spin_unlock_irqrestore(&port->outvq_lock, flags); | 537 | spin_unlock_irqrestore(&port->outvq_lock, flags); |
538 | |||
539 | port->stats.bytes_sent += in_count; | ||
532 | /* | 540 | /* |
533 | * We're expected to return the amount of data we wrote -- all | 541 | * We're expected to return the amount of data we wrote -- all |
534 | * of it | 542 | * of it |
@@ -633,8 +641,8 @@ static ssize_t port_fops_read(struct file *filp, char __user *ubuf, | |||
633 | if (filp->f_flags & O_NONBLOCK) | 641 | if (filp->f_flags & O_NONBLOCK) |
634 | return -EAGAIN; | 642 | return -EAGAIN; |
635 | 643 | ||
636 | ret = wait_event_interruptible(port->waitqueue, | 644 | ret = wait_event_freezable(port->waitqueue, |
637 | !will_read_block(port)); | 645 | !will_read_block(port)); |
638 | if (ret < 0) | 646 | if (ret < 0) |
639 | return ret; | 647 | return ret; |
640 | } | 648 | } |
@@ -677,8 +685,8 @@ static ssize_t port_fops_write(struct file *filp, const char __user *ubuf, | |||
677 | if (nonblock) | 685 | if (nonblock) |
678 | return -EAGAIN; | 686 | return -EAGAIN; |
679 | 687 | ||
680 | ret = wait_event_interruptible(port->waitqueue, | 688 | ret = wait_event_freezable(port->waitqueue, |
681 | !will_write_block(port)); | 689 | !will_write_block(port)); |
682 | if (ret < 0) | 690 | if (ret < 0) |
683 | return ret; | 691 | return ret; |
684 | } | 692 | } |
@@ -1059,6 +1067,14 @@ static ssize_t debugfs_read(struct file *filp, char __user *ubuf, | |||
1059 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | 1067 | out_offset += snprintf(buf + out_offset, out_count - out_offset, |
1060 | "outvq_full: %d\n", port->outvq_full); | 1068 | "outvq_full: %d\n", port->outvq_full); |
1061 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | 1069 | out_offset += snprintf(buf + out_offset, out_count - out_offset, |
1070 | "bytes_sent: %lu\n", port->stats.bytes_sent); | ||
1071 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | ||
1072 | "bytes_received: %lu\n", | ||
1073 | port->stats.bytes_received); | ||
1074 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | ||
1075 | "bytes_discarded: %lu\n", | ||
1076 | port->stats.bytes_discarded); | ||
1077 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | ||
1062 | "is_console: %s\n", | 1078 | "is_console: %s\n", |
1063 | is_console_port(port) ? "yes" : "no"); | 1079 | is_console_port(port) ? "yes" : "no"); |
1064 | out_offset += snprintf(buf + out_offset, out_count - out_offset, | 1080 | out_offset += snprintf(buf + out_offset, out_count - out_offset, |
@@ -1143,6 +1159,7 @@ static int add_port(struct ports_device *portdev, u32 id) | |||
1143 | port->cons.ws.ws_row = port->cons.ws.ws_col = 0; | 1159 | port->cons.ws.ws_row = port->cons.ws.ws_col = 0; |
1144 | 1160 | ||
1145 | port->host_connected = port->guest_connected = false; | 1161 | port->host_connected = port->guest_connected = false; |
1162 | port->stats = (struct port_stats) { 0 }; | ||
1146 | 1163 | ||
1147 | port->outvq_full = false; | 1164 | port->outvq_full = false; |
1148 | 1165 | ||
@@ -1352,6 +1369,7 @@ static void handle_control_message(struct ports_device *portdev, | |||
1352 | break; | 1369 | break; |
1353 | 1370 | ||
1354 | init_port_console(port); | 1371 | init_port_console(port); |
1372 | complete(&early_console_added); | ||
1355 | /* | 1373 | /* |
1356 | * Could remove the port here in case init fails - but | 1374 | * Could remove the port here in case init fails - but |
1357 | * have to notify the host first. | 1375 | * have to notify the host first. |
@@ -1394,6 +1412,13 @@ static void handle_control_message(struct ports_device *portdev, | |||
1394 | break; | 1412 | break; |
1395 | case VIRTIO_CONSOLE_PORT_NAME: | 1413 | case VIRTIO_CONSOLE_PORT_NAME: |
1396 | /* | 1414 | /* |
1415 | * If we woke up after hibernation, we can get this | ||
1416 | * again. Skip it in that case. | ||
1417 | */ | ||
1418 | if (port->name) | ||
1419 | break; | ||
1420 | |||
1421 | /* | ||
1397 | * Skip the size of the header and the cpkt to get the size | 1422 | * Skip the size of the header and the cpkt to get the size |
1398 | * of the name that was sent | 1423 | * of the name that was sent |
1399 | */ | 1424 | */ |
@@ -1481,8 +1506,7 @@ static void in_intr(struct virtqueue *vq) | |||
1481 | return; | 1506 | return; |
1482 | 1507 | ||
1483 | spin_lock_irqsave(&port->inbuf_lock, flags); | 1508 | spin_lock_irqsave(&port->inbuf_lock, flags); |
1484 | if (!port->inbuf) | 1509 | port->inbuf = get_inbuf(port); |
1485 | port->inbuf = get_inbuf(port); | ||
1486 | 1510 | ||
1487 | /* | 1511 | /* |
1488 | * Don't queue up data when port is closed. This condition | 1512 | * Don't queue up data when port is closed. This condition |
@@ -1563,7 +1587,7 @@ static int init_vqs(struct ports_device *portdev) | |||
1563 | portdev->out_vqs = kmalloc(nr_ports * sizeof(struct virtqueue *), | 1587 | portdev->out_vqs = kmalloc(nr_ports * sizeof(struct virtqueue *), |
1564 | GFP_KERNEL); | 1588 | GFP_KERNEL); |
1565 | if (!vqs || !io_callbacks || !io_names || !portdev->in_vqs || | 1589 | if (!vqs || !io_callbacks || !io_names || !portdev->in_vqs || |
1566 | !portdev->out_vqs) { | 1590 | !portdev->out_vqs) { |
1567 | err = -ENOMEM; | 1591 | err = -ENOMEM; |
1568 | goto free; | 1592 | goto free; |
1569 | } | 1593 | } |
@@ -1648,6 +1672,10 @@ static int __devinit virtcons_probe(struct virtio_device *vdev) | |||
1648 | struct ports_device *portdev; | 1672 | struct ports_device *portdev; |
1649 | int err; | 1673 | int err; |
1650 | bool multiport; | 1674 | bool multiport; |
1675 | bool early = early_put_chars != NULL; | ||
1676 | |||
1677 | /* Ensure to read early_put_chars now */ | ||
1678 | barrier(); | ||
1651 | 1679 | ||
1652 | portdev = kmalloc(sizeof(*portdev), GFP_KERNEL); | 1680 | portdev = kmalloc(sizeof(*portdev), GFP_KERNEL); |
1653 | if (!portdev) { | 1681 | if (!portdev) { |
@@ -1675,13 +1703,11 @@ static int __devinit virtcons_probe(struct virtio_device *vdev) | |||
1675 | 1703 | ||
1676 | multiport = false; | 1704 | multiport = false; |
1677 | portdev->config.max_nr_ports = 1; | 1705 | portdev->config.max_nr_ports = 1; |
1678 | if (virtio_has_feature(vdev, VIRTIO_CONSOLE_F_MULTIPORT)) { | 1706 | if (virtio_config_val(vdev, VIRTIO_CONSOLE_F_MULTIPORT, |
1707 | offsetof(struct virtio_console_config, | ||
1708 | max_nr_ports), | ||
1709 | &portdev->config.max_nr_ports) == 0) | ||
1679 | multiport = true; | 1710 | multiport = true; |
1680 | vdev->config->get(vdev, offsetof(struct virtio_console_config, | ||
1681 | max_nr_ports), | ||
1682 | &portdev->config.max_nr_ports, | ||
1683 | sizeof(portdev->config.max_nr_ports)); | ||
1684 | } | ||
1685 | 1711 | ||
1686 | err = init_vqs(portdev); | 1712 | err = init_vqs(portdev); |
1687 | if (err < 0) { | 1713 | if (err < 0) { |
@@ -1719,6 +1745,19 @@ static int __devinit virtcons_probe(struct virtio_device *vdev) | |||
1719 | 1745 | ||
1720 | __send_control_msg(portdev, VIRTIO_CONSOLE_BAD_ID, | 1746 | __send_control_msg(portdev, VIRTIO_CONSOLE_BAD_ID, |
1721 | VIRTIO_CONSOLE_DEVICE_READY, 1); | 1747 | VIRTIO_CONSOLE_DEVICE_READY, 1); |
1748 | |||
1749 | /* | ||
1750 | * If there was an early virtio console, assume that there are no | ||
1751 | * other consoles. We need to wait until the hvc_alloc matches the | ||
1752 | * hvc_instantiate, otherwise tty_open will complain, resulting in | ||
1753 | * a "Warning: unable to open an initial console" boot failure. | ||
1754 | * Without multiport this is done in add_port above. With multiport | ||
1755 | * this might take some host<->guest communication - thus we have to | ||
1756 | * wait. | ||
1757 | */ | ||
1758 | if (multiport && early) | ||
1759 | wait_for_completion(&early_console_added); | ||
1760 | |||
1722 | return 0; | 1761 | return 0; |
1723 | 1762 | ||
1724 | free_vqs: | 1763 | free_vqs: |